2 * madgemc.c: Driver for the Madge Smart 16/4 MC16 MCA token ring card.
4 * Written 2000 by Adam Fritzler
6 * This software may be used and distributed according to the terms
7 * of the GNU General Public License, incorporated herein by reference.
9 * This driver module supports the following cards:
10 * - Madge Smart 16/4 Ringnode MC16
11 * - Madge Smart 16/4 Ringnode MC32 (??)
14 * AF Adam Fritzler mid@auk.cx
16 * Modification History:
17 * 16-Jan-00 AF Created
20 static const char version
[] = "madgemc.c: v0.91 23/01/2000 by Adam Fritzler\n";
22 #include <linux/module.h>
23 #include <linux/mca.h>
24 #include <linux/kernel.h>
25 #include <linux/errno.h>
26 #include <linux/init.h>
27 #include <linux/netdevice.h>
28 #include <linux/trdevice.h>
30 #include <asm/system.h>
35 #include "madgemc.h" /* Madge-specific constants */
37 #define MADGEMC_IO_EXTENT 32
38 #define MADGEMC_SIF_OFFSET 0x08
42 * These are read from the BIA ROM.
45 unsigned int cardtype
;
50 * These are read from the MCA POS registers.
52 unsigned int burstmode
:2;
53 unsigned int fairness
:1; /* 0 = Fair, 1 = Unfair */
54 unsigned int arblevel
:4;
55 unsigned int ringspeed
:2; /* 0 = 4mb, 1 = 16, 2 = Auto/none */
56 unsigned int cabletype
:1; /* 0 = RJ45, 1 = DB9 */
59 static int madgemc_open(struct net_device
*dev
);
60 static int madgemc_close(struct net_device
*dev
);
61 static int madgemc_chipset_init(struct net_device
*dev
);
62 static void madgemc_read_rom(struct net_device
*dev
, struct card_info
*card
);
63 static unsigned short madgemc_setnselout_pins(struct net_device
*dev
);
64 static void madgemc_setcabletype(struct net_device
*dev
, int type
);
66 static int madgemc_mcaproc(char *buf
, int slot
, void *d
);
68 static void madgemc_setregpage(struct net_device
*dev
, int page
);
69 static void madgemc_setsifsel(struct net_device
*dev
, int val
);
70 static void madgemc_setint(struct net_device
*dev
, int val
);
72 static irqreturn_t
madgemc_interrupt(int irq
, void *dev_id
);
75 * These work around paging, however they don't guarentee you're on the
78 #define SIFREADB(reg) (inb(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
79 #define SIFWRITEB(val, reg) (outb(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
80 #define SIFREADW(reg) (inw(dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
81 #define SIFWRITEW(val, reg) (outw(val, dev->base_addr + ((reg<0x8)?reg:reg-0x8)))
84 * Read a byte-length value from the register.
86 static unsigned short madgemc_sifreadb(struct net_device
*dev
, unsigned short reg
)
92 madgemc_setregpage(dev
, 1);
94 madgemc_setregpage(dev
, 0);
100 * Write a byte-length value to a register.
102 static void madgemc_sifwriteb(struct net_device
*dev
, unsigned short val
, unsigned short reg
)
107 madgemc_setregpage(dev
, 1);
109 madgemc_setregpage(dev
, 0);
115 * Read a word-length value from a register
117 static unsigned short madgemc_sifreadw(struct net_device
*dev
, unsigned short reg
)
123 madgemc_setregpage(dev
, 1);
125 madgemc_setregpage(dev
, 0);
131 * Write a word-length value to a register.
133 static void madgemc_sifwritew(struct net_device
*dev
, unsigned short val
, unsigned short reg
)
138 madgemc_setregpage(dev
, 1);
140 madgemc_setregpage(dev
, 0);
147 static int __devinit
madgemc_probe(struct device
*device
)
149 static int versionprinted
;
150 struct net_device
*dev
;
151 struct net_local
*tp
;
152 struct card_info
*card
;
153 struct mca_device
*mdev
= to_mca_device(device
);
155 DECLARE_MAC_BUF(mac
);
157 if (versionprinted
++ == 0)
158 printk("%s", version
);
160 if(mca_device_claimed(mdev
))
162 mca_device_set_claim(mdev
, 1);
164 dev
= alloc_trdev(sizeof(struct net_local
));
166 printk("madgemc: unable to allocate dev space\n");
167 mca_device_set_claim(mdev
, 0);
174 card
= kmalloc(sizeof(struct card_info
), GFP_KERNEL
);
176 printk("madgemc: unable to allocate card struct\n");
182 * Parse configuration information. This all comes
183 * directly from the publicly available @002d.ADF.
184 * Get it from Madge or your local ADF library.
190 dev
->base_addr
= 0x0a20 +
191 ((mdev
->pos
[2] & MC16_POS2_ADDR2
)?0x0400:0) +
192 ((mdev
->pos
[0] & MC16_POS0_ADDR1
)?0x1000:0) +
193 ((mdev
->pos
[3] & MC16_POS3_ADDR3
)?0x2000:0);
198 switch(mdev
->pos
[0] >> 6) { /* upper two bits */
199 case 0x1: dev
->irq
= 3; break;
200 case 0x2: dev
->irq
= 9; break; /* IRQ 2 = IRQ 9 */
201 case 0x3: dev
->irq
= 10; break;
202 default: dev
->irq
= 0; break;
206 printk("%s: invalid IRQ\n", dev
->name
);
211 if (!request_region(dev
->base_addr
, MADGEMC_IO_EXTENT
,
213 printk(KERN_INFO
"madgemc: unable to setup Smart MC in slot %d because of I/O base conflict at 0x%04lx\n", mdev
->slot
, dev
->base_addr
);
214 dev
->base_addr
+= MADGEMC_SIF_OFFSET
;
218 dev
->base_addr
+= MADGEMC_SIF_OFFSET
;
223 card
->arblevel
= ((mdev
->pos
[0] >> 1) & 0x7) + 8;
226 * Burst mode and Fairness
228 card
->burstmode
= ((mdev
->pos
[2] >> 6) & 0x3);
229 card
->fairness
= ((mdev
->pos
[2] >> 4) & 0x1);
234 if ((mdev
->pos
[1] >> 2)&0x1)
235 card
->ringspeed
= 2; /* not selected */
236 else if ((mdev
->pos
[2] >> 5) & 0x1)
237 card
->ringspeed
= 1; /* 16Mb */
239 card
->ringspeed
= 0; /* 4Mb */
244 if ((mdev
->pos
[1] >> 6)&0x1)
245 card
->cabletype
= 1; /* STP/DB9 */
247 card
->cabletype
= 0; /* UTP/RJ-45 */
251 * ROM Info. This requires us to actually twiddle
252 * bits on the card, so we must ensure above that
253 * the base address is free of conflict (request_region above).
255 madgemc_read_rom(dev
, card
);
257 if (card
->manid
!= 0x4d) { /* something went wrong */
258 printk(KERN_INFO
"%s: Madge MC ROM read failed (unknown manufacturer ID %02x)\n", dev
->name
, card
->manid
);
262 if ((card
->cardtype
!= 0x08) && (card
->cardtype
!= 0x0d)) {
263 printk(KERN_INFO
"%s: Madge MC ROM read failed (unknown card ID %02x)\n", dev
->name
, card
->cardtype
);
268 /* All cards except Rev 0 and 1 MC16's have 256kb of RAM */
269 if ((card
->cardtype
== 0x08) && (card
->cardrev
<= 0x01))
274 printk("%s: %s Rev %d at 0x%04lx IRQ %d\n",
276 (card
->cardtype
== 0x08)?MADGEMC16_CARDNAME
:
277 MADGEMC32_CARDNAME
, card
->cardrev
,
278 dev
->base_addr
, dev
->irq
);
280 if (card
->cardtype
== 0x0d)
281 printk("%s: Warning: MC32 support is experimental and highly untested\n", dev
->name
);
283 if (card
->ringspeed
==2) { /* Unknown */
284 printk("%s: Warning: Ring speed not set in POS -- Please run the reference disk and set it!\n", dev
->name
);
285 card
->ringspeed
= 1; /* default to 16mb */
288 printk("%s: RAM Size: %dKB\n", dev
->name
, card
->ramsize
);
290 printk("%s: Ring Speed: %dMb/sec on %s\n", dev
->name
,
291 (card
->ringspeed
)?16:4,
292 card
->cabletype
?"STP/DB9":"UTP/RJ-45");
293 printk("%s: Arbitration Level: %d\n", dev
->name
,
296 printk("%s: Burst Mode: ", dev
->name
);
297 switch(card
->burstmode
) {
298 case 0: printk("Cycle steal"); break;
299 case 1: printk("Limited burst"); break;
300 case 2: printk("Delayed release"); break;
301 case 3: printk("Immediate release"); break;
303 printk(" (%s)\n", (card
->fairness
)?"Unfair":"Fair");
307 * Enable SIF before we assign the interrupt handler,
308 * just in case we get spurious interrupts that need
311 outb(0, dev
->base_addr
+ MC_CONTROL_REG0
); /* sanity */
312 madgemc_setsifsel(dev
, 1);
313 if (request_irq(dev
->irq
, madgemc_interrupt
, IRQF_SHARED
,
319 madgemc_chipset_init(dev
); /* enables interrupts! */
320 madgemc_setcabletype(dev
, card
->cabletype
);
322 /* Setup MCA structures */
323 mca_device_set_name(mdev
, (card
->cardtype
== 0x08)?MADGEMC16_CARDNAME
:MADGEMC32_CARDNAME
);
324 mca_set_adapter_procfn(mdev
->slot
, madgemc_mcaproc
, dev
);
326 printk("%s: Ring Station Address: %s\n",
327 dev
->name
, print_mac(mac
, dev
->dev_addr
));
329 if (tmsdev_init(dev
, device
)) {
330 printk("%s: unable to get memory for dev->priv.\n",
335 tp
= netdev_priv(dev
);
338 * The MC16 is physically a 32bit card. However, Madge
339 * insists on calling it 16bit, so I'll assume here that
340 * they know what they're talking about. Cut off DMA
343 tp
->setnselout
= madgemc_setnselout_pins
;
344 tp
->sifwriteb
= madgemc_sifwriteb
;
345 tp
->sifreadb
= madgemc_sifreadb
;
346 tp
->sifwritew
= madgemc_sifwritew
;
347 tp
->sifreadw
= madgemc_sifreadw
;
348 tp
->DataRate
= (card
->ringspeed
)?SPEED_16
:SPEED_4
;
350 memcpy(tp
->ProductID
, "Madge MCA 16/4 ", PROD_ID_SIZE
+ 1);
352 dev
->open
= madgemc_open
;
353 dev
->stop
= madgemc_close
;
356 dev_set_drvdata(device
, dev
);
358 if (register_netdev(dev
) == 0)
361 dev_set_drvdata(device
, NULL
);
364 free_irq(dev
->irq
, dev
);
366 release_region(dev
->base_addr
-MADGEMC_SIF_OFFSET
,
373 mca_device_set_claim(mdev
, 0);
378 * Handle interrupts generated by the card
380 * The MicroChannel Madge cards need slightly more handling
381 * after an interrupt than other TMS380 cards do.
383 * First we must make sure it was this card that generated the
384 * interrupt (since interrupt sharing is allowed). Then,
385 * because we're using level-triggered interrupts (as is
386 * standard on MCA), we must toggle the interrupt line
387 * on the card in order to claim and acknowledge the interrupt.
388 * Once that is done, the interrupt should be handlable in
389 * the normal tms380tr_interrupt() routine.
391 * There's two ways we can check to see if the interrupt is ours,
392 * both with their own disadvantages...
394 * 1) Read in the SIFSTS register from the TMS controller. This
395 * is guarenteed to be accurate, however, there's a fairly
396 * large performance penalty for doing so: the Madge chips
397 * must request the register from the Eagle, the Eagle must
398 * read them from its internal bus, and then take the route
399 * back out again, for a 16bit read.
401 * 2) Use the MC_CONTROL_REG0_SINTR bit from the Madge ASICs.
402 * The major disadvantage here is that the accuracy of the
403 * bit is in question. However, it cuts out the extra read
404 * cycles it takes to read the Eagle's SIF, as its only an
405 * 8bit read, and theoretically the Madge bit is directly
406 * connected to the interrupt latch coming out of the Eagle
407 * hardware (that statement is not verified).
409 * I can't determine which of these methods has the best win. For now,
410 * we make a compromise. Use the Madge way for the first interrupt,
411 * which should be the fast-path, and then once we hit the first
412 * interrupt, keep on trying using the SIF method until we've
413 * exhausted all contiguous interrupts.
416 static irqreturn_t
madgemc_interrupt(int irq
, void *dev_id
)
419 struct net_device
*dev
;
422 printk("madgemc_interrupt: was not passed a dev_id!\n");
426 dev
= (struct net_device
*)dev_id
;
428 /* Make sure its really us. -- the Madge way */
429 pending
= inb(dev
->base_addr
+ MC_CONTROL_REG0
);
430 if (!(pending
& MC_CONTROL_REG0_SINTR
))
431 return IRQ_NONE
; /* not our interrupt */
434 * Since we're level-triggered, we may miss the rising edge
435 * of the next interrupt while we're off handling this one,
436 * so keep checking until the SIF verifies that it has nothing
439 pending
= STS_SYSTEM_IRQ
;
441 if (pending
& STS_SYSTEM_IRQ
) {
443 /* Toggle the interrupt to reset the latch on card */
444 reg1
= inb(dev
->base_addr
+ MC_CONTROL_REG1
);
445 outb(reg1
^ MC_CONTROL_REG1_SINTEN
,
446 dev
->base_addr
+ MC_CONTROL_REG1
);
447 outb(reg1
, dev
->base_addr
+ MC_CONTROL_REG1
);
449 /* Continue handling as normal */
450 tms380tr_interrupt(irq
, dev_id
);
452 pending
= SIFREADW(SIFSTS
); /* restart - the SIF way */
458 return IRQ_HANDLED
; /* not reachable */
462 * Set the card to the prefered ring speed.
464 * Unlike newer cards, the MC16/32 have their speed selection
465 * circuit connected to the Madge ASICs and not to the TMS380
466 * NSELOUT pins. Set the ASIC bits correctly here, and return
467 * zero to leave the TMS NSELOUT bits unaffected.
470 unsigned short madgemc_setnselout_pins(struct net_device
*dev
)
473 struct net_local
*tp
= netdev_priv(dev
);
475 reg1
= inb(dev
->base_addr
+ MC_CONTROL_REG1
);
477 if(tp
->DataRate
== SPEED_16
)
478 reg1
|= MC_CONTROL_REG1_SPEED_SEL
; /* add for 16mb */
479 else if (reg1
& MC_CONTROL_REG1_SPEED_SEL
)
480 reg1
^= MC_CONTROL_REG1_SPEED_SEL
; /* remove for 4mb */
481 outb(reg1
, dev
->base_addr
+ MC_CONTROL_REG1
);
483 return 0; /* no change */
487 * Set the register page. This equates to the SRSX line
490 * Register selection is normally done via three contiguous
491 * bits. However, some boards (such as the MC16/32) use only
492 * two bits, plus a separate bit in the glue chip. This
493 * sets the SRSX bit (the top bit). See page 4-17 in the
494 * Yellow Book for which registers are affected.
497 static void madgemc_setregpage(struct net_device
*dev
, int page
)
501 reg1
= inb(dev
->base_addr
+ MC_CONTROL_REG1
);
502 if ((page
== 0) && (reg1
& MC_CONTROL_REG1_SRSX
)) {
503 outb(reg1
^ MC_CONTROL_REG1_SRSX
,
504 dev
->base_addr
+ MC_CONTROL_REG1
);
506 else if (page
== 1) {
507 outb(reg1
| MC_CONTROL_REG1_SRSX
,
508 dev
->base_addr
+ MC_CONTROL_REG1
);
510 reg1
= inb(dev
->base_addr
+ MC_CONTROL_REG1
);
516 * The SIF registers are not mapped into register space by default
517 * Set this to 1 to map them, 0 to map the BIA ROM.
520 static void madgemc_setsifsel(struct net_device
*dev
, int val
)
524 reg0
= inb(dev
->base_addr
+ MC_CONTROL_REG0
);
525 if ((val
== 0) && (reg0
& MC_CONTROL_REG0_SIFSEL
)) {
526 outb(reg0
^ MC_CONTROL_REG0_SIFSEL
,
527 dev
->base_addr
+ MC_CONTROL_REG0
);
528 } else if (val
== 1) {
529 outb(reg0
| MC_CONTROL_REG0_SIFSEL
,
530 dev
->base_addr
+ MC_CONTROL_REG0
);
532 reg0
= inb(dev
->base_addr
+ MC_CONTROL_REG0
);
538 * Enable SIF interrupts
540 * This does not enable interrupts in the SIF, but rather
541 * enables SIF interrupts to be passed onto the host.
544 static void madgemc_setint(struct net_device
*dev
, int val
)
548 reg1
= inb(dev
->base_addr
+ MC_CONTROL_REG1
);
549 if ((val
== 0) && (reg1
& MC_CONTROL_REG1_SINTEN
)) {
550 outb(reg1
^ MC_CONTROL_REG1_SINTEN
,
551 dev
->base_addr
+ MC_CONTROL_REG1
);
552 } else if (val
== 1) {
553 outb(reg1
| MC_CONTROL_REG1_SINTEN
,
554 dev
->base_addr
+ MC_CONTROL_REG1
);
561 * Cable type is set via control register 7. Bit zero high
562 * for UTP, low for STP.
564 static void madgemc_setcabletype(struct net_device
*dev
, int type
)
566 outb((type
==0)?MC_CONTROL_REG7_CABLEUTP
:MC_CONTROL_REG7_CABLESTP
,
567 dev
->base_addr
+ MC_CONTROL_REG7
);
571 * Enable the functions of the Madge chipset needed for
572 * full working order.
574 static int madgemc_chipset_init(struct net_device
*dev
)
576 outb(0, dev
->base_addr
+ MC_CONTROL_REG1
); /* pull SRESET low */
577 tms380tr_wait(100); /* wait for card to reset */
579 /* bring back into normal operating mode */
580 outb(MC_CONTROL_REG1_NSRESET
, dev
->base_addr
+ MC_CONTROL_REG1
);
582 /* map SIF registers */
583 madgemc_setsifsel(dev
, 1);
585 /* enable SIF interrupts */
586 madgemc_setint(dev
, 1);
592 * Disable the board, and put back into power-up state.
594 static void madgemc_chipset_close(struct net_device
*dev
)
596 /* disable interrupts */
597 madgemc_setint(dev
, 0);
598 /* unmap SIF registers */
599 madgemc_setsifsel(dev
, 0);
605 * Read the card type (MC16 or MC32) from the card.
607 * The configuration registers are stored in two separate
608 * pages. Pages are flipped by clearing bit 3 of CONTROL_REG0 (PAGE)
609 * for page zero, or setting bit 3 for page one.
611 * Page zero contains the following data:
612 * Byte 0: Manufacturer ID (0x4D -- ASCII "M")
616 * Byte 2: Card revision
617 * Byte 3: Mirror of POS config register 0
618 * Byte 4: Mirror of POS 1
619 * Byte 5: Mirror of POS 2
621 * Page one contains the following data:
623 * Byte 1-6: BIA, MSB to LSB.
625 * Note that to read the BIA, we must unmap the SIF registers
626 * by clearing bit 2 of CONTROL_REG0 (SIFSEL), as the data
627 * will reside in the same logical location. For this reason,
628 * _never_ read the BIA while the Eagle processor is running!
629 * The SIF will be completely inaccessible until the BIA operation
633 static void madgemc_read_rom(struct net_device
*dev
, struct card_info
*card
)
635 unsigned long ioaddr
;
636 unsigned char reg0
, reg1
, tmpreg0
, i
;
638 ioaddr
= dev
->base_addr
;
640 reg0
= inb(ioaddr
+ MC_CONTROL_REG0
);
641 reg1
= inb(ioaddr
+ MC_CONTROL_REG1
);
643 /* Switch to page zero and unmap SIF */
644 tmpreg0
= reg0
& ~(MC_CONTROL_REG0_PAGE
+ MC_CONTROL_REG0_SIFSEL
);
645 outb(tmpreg0
, ioaddr
+ MC_CONTROL_REG0
);
647 card
->manid
= inb(ioaddr
+ MC_ROM_MANUFACTURERID
);
648 card
->cardtype
= inb(ioaddr
+ MC_ROM_ADAPTERID
);
649 card
->cardrev
= inb(ioaddr
+ MC_ROM_REVISION
);
651 /* Switch to rom page one */
652 outb(tmpreg0
| MC_CONTROL_REG0_PAGE
, ioaddr
+ MC_CONTROL_REG0
);
656 for (i
= 0; i
< 6; i
++)
657 dev
->dev_addr
[i
] = inb(ioaddr
+ MC_ROM_BIA_START
+ i
);
659 /* Restore original register values */
660 outb(reg0
, ioaddr
+ MC_CONTROL_REG0
);
661 outb(reg1
, ioaddr
+ MC_CONTROL_REG1
);
666 static int madgemc_open(struct net_device
*dev
)
669 * Go ahead and reinitialize the chipset again, just to
670 * make sure we didn't get left in a bad state.
672 madgemc_chipset_init(dev
);
677 static int madgemc_close(struct net_device
*dev
)
680 madgemc_chipset_close(dev
);
685 * Give some details available from /proc/mca/slotX
687 static int madgemc_mcaproc(char *buf
, int slot
, void *d
)
689 struct net_device
*dev
= (struct net_device
*)d
;
690 struct net_local
*tp
= netdev_priv(dev
);
691 struct card_info
*curcard
= tp
->tmspriv
;
693 DECLARE_MAC_BUF(mac
);
695 len
+= sprintf(buf
+len
, "-------\n");
697 struct net_local
*tp
= netdev_priv(dev
);
699 len
+= sprintf(buf
+len
, "Card Revision: %d\n", curcard
->cardrev
);
700 len
+= sprintf(buf
+len
, "RAM Size: %dkb\n", curcard
->ramsize
);
701 len
+= sprintf(buf
+len
, "Cable type: %s\n", (curcard
->cabletype
)?"STP/DB9":"UTP/RJ-45");
702 len
+= sprintf(buf
+len
, "Configured ring speed: %dMb/sec\n", (curcard
->ringspeed
)?16:4);
703 len
+= sprintf(buf
+len
, "Running ring speed: %dMb/sec\n", (tp
->DataRate
==SPEED_16
)?16:4);
704 len
+= sprintf(buf
+len
, "Device: %s\n", dev
->name
);
705 len
+= sprintf(buf
+len
, "IO Port: 0x%04lx\n", dev
->base_addr
);
706 len
+= sprintf(buf
+len
, "IRQ: %d\n", dev
->irq
);
707 len
+= sprintf(buf
+len
, "Arbitration Level: %d\n", curcard
->arblevel
);
708 len
+= sprintf(buf
+len
, "Burst Mode: ");
709 switch(curcard
->burstmode
) {
710 case 0: len
+= sprintf(buf
+len
, "Cycle steal"); break;
711 case 1: len
+= sprintf(buf
+len
, "Limited burst"); break;
712 case 2: len
+= sprintf(buf
+len
, "Delayed release"); break;
713 case 3: len
+= sprintf(buf
+len
, "Immediate release"); break;
715 len
+= sprintf(buf
+len
, " (%s)\n", (curcard
->fairness
)?"Unfair":"Fair");
717 len
+= sprintf(buf
+len
, "Ring Station Address: %s\n",
718 print_mac(mac
, dev
->dev_addr
));
720 len
+= sprintf(buf
+len
, "Card not configured\n");
725 static int __devexit
madgemc_remove(struct device
*device
)
727 struct net_device
*dev
= dev_get_drvdata(device
);
728 struct net_local
*tp
;
729 struct card_info
*card
;
733 tp
= netdev_priv(dev
);
738 unregister_netdev(dev
);
739 release_region(dev
->base_addr
-MADGEMC_SIF_OFFSET
, MADGEMC_IO_EXTENT
);
740 free_irq(dev
->irq
, dev
);
743 dev_set_drvdata(device
, NULL
);
748 static short madgemc_adapter_ids
[] __initdata
= {
753 static struct mca_driver madgemc_driver
= {
754 .id_table
= madgemc_adapter_ids
,
757 .bus
= &mca_bus_type
,
758 .probe
= madgemc_probe
,
759 .remove
= __devexit_p(madgemc_remove
),
763 static int __init
madgemc_init (void)
765 return mca_register_driver (&madgemc_driver
);
768 static void __exit
madgemc_exit (void)
770 mca_unregister_driver (&madgemc_driver
);
773 module_init(madgemc_init
);
774 module_exit(madgemc_exit
);
776 MODULE_LICENSE("GPL");