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Pull bugzilla-9429 into release branch
[pv_ops_mirror.git] / drivers / net / wireless / iwlwifi / iwl-4965.c
blob891f90d2f019d9860cf2d5e554b5ec6052b762a6
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <net/mac80211.h>
38 #include <linux/etherdevice.h>
39
40 #define IWL 4965
41
42 #include "iwlwifi.h"
43 #include "iwl-4965.h"
44 #include "iwl-helpers.h"
45
46 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
47 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
48 IWL_RATE_SISO_##s##M_PLCP, \
49 IWL_RATE_MIMO_##s##M_PLCP, \
50 IWL_RATE_##r##M_IEEE, \
51 IWL_RATE_##ip##M_INDEX, \
52 IWL_RATE_##in##M_INDEX, \
53 IWL_RATE_##rp##M_INDEX, \
54 IWL_RATE_##rn##M_INDEX, \
55 IWL_RATE_##pp##M_INDEX, \
56 IWL_RATE_##np##M_INDEX }
57
58 /*
59 * Parameter order:
60 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
61 *
62 * If there isn't a valid next or previous rate then INV is used which
63 * maps to IWL_RATE_INVALID
64 *
65 */
66 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
67 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
68 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
69 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
70 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
71 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
72 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
73 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
74 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
75 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
76 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
77 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
78 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
79 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
80 };
81
82 static int is_fat_channel(__le32 rxon_flags)
83 {
84 return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
85 (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
86 }
87
88 static u8 is_single_stream(struct iwl_priv *priv)
89 {
90 #ifdef CONFIG_IWLWIFI_HT
91 if (!priv->is_ht_enabled || !priv->current_assoc_ht.is_ht ||
92 (priv->active_rate_ht[1] == 0) ||
93 (priv->ps_mode == IWL_MIMO_PS_STATIC))
94 return 1;
95 #else
96 return 1;
97 #endif /*CONFIG_IWLWIFI_HT */
98 return 0;
99 }
100
101 /*
102 * Determine how many receiver/antenna chains to use.
103 * More provides better reception via diversity. Fewer saves power.
104 * MIMO (dual stream) requires at least 2, but works better with 3.
105 * This does not determine *which* chains to use, just how many.
106 */
107 static int iwl4965_get_rx_chain_counter(struct iwl_priv *priv,
108 u8 *idle_state, u8 *rx_state)
109 {
110 u8 is_single = is_single_stream(priv);
111 u8 is_cam = test_bit(STATUS_POWER_PMI, &priv->status) ? 0 : 1;
112
113 /* # of Rx chains to use when expecting MIMO. */
114 if (is_single || (!is_cam && (priv->ps_mode == IWL_MIMO_PS_STATIC)))
115 *rx_state = 2;
116 else
117 *rx_state = 3;
118
119 /* # Rx chains when idling and maybe trying to save power */
120 switch (priv->ps_mode) {
121 case IWL_MIMO_PS_STATIC:
122 case IWL_MIMO_PS_DYNAMIC:
123 *idle_state = (is_cam) ? 2 : 1;
124 break;
125 case IWL_MIMO_PS_NONE:
126 *idle_state = (is_cam) ? *rx_state : 1;
127 break;
128 default:
129 *idle_state = 1;
130 break;
131 }
132
133 return 0;
134 }
135
136 int iwl_hw_rxq_stop(struct iwl_priv *priv)
137 {
138 int rc;
139 unsigned long flags;
140
141 spin_lock_irqsave(&priv->lock, flags);
142 rc = iwl_grab_restricted_access(priv);
143 if (rc) {
144 spin_unlock_irqrestore(&priv->lock, flags);
145 return rc;
146 }
147
148 /* stop HW */
149 iwl_write_restricted(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
150 rc = iwl_poll_restricted_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
151 (1 << 24), 1000);
152 if (rc < 0)
153 IWL_ERROR("Can't stop Rx DMA.\n");
154
155 iwl_release_restricted_access(priv);
156 spin_unlock_irqrestore(&priv->lock, flags);
157
158 return 0;
159 }
160
161 u8 iwl_hw_find_station(struct iwl_priv *priv, const u8 *addr)
162 {
163 int i;
164 int start = 0;
165 int ret = IWL_INVALID_STATION;
166 unsigned long flags;
167 DECLARE_MAC_BUF(mac);
168
169 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) ||
170 (priv->iw_mode == IEEE80211_IF_TYPE_AP))
171 start = IWL_STA_ID;
172
173 if (is_broadcast_ether_addr(addr))
174 return IWL4965_BROADCAST_ID;
175
176 spin_lock_irqsave(&priv->sta_lock, flags);
177 for (i = start; i < priv->hw_setting.max_stations; i++)
178 if ((priv->stations[i].used) &&
179 (!compare_ether_addr
180 (priv->stations[i].sta.sta.addr, addr))) {
181 ret = i;
182 goto out;
183 }
184
185 IWL_DEBUG_ASSOC_LIMIT("can not find STA %s total %d\n",
186 print_mac(mac, addr), priv->num_stations);
187
188 out:
189 spin_unlock_irqrestore(&priv->sta_lock, flags);
190 return ret;
191 }
192
193 static int iwl4965_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max)
194 {
195 int rc = 0;
196 unsigned long flags;
197
198 spin_lock_irqsave(&priv->lock, flags);
199 rc = iwl_grab_restricted_access(priv);
200 if (rc) {
201 spin_unlock_irqrestore(&priv->lock, flags);
202 return rc;
203 }
204
205 if (!pwr_max) {
206 u32 val;
207
208 rc = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
209 &val);
210
211 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
212 iwl_set_bits_mask_restricted_reg(
213 priv, APMG_PS_CTRL_REG,
214 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
215 ~APMG_PS_CTRL_MSK_PWR_SRC);
216 } else
217 iwl_set_bits_mask_restricted_reg(
218 priv, APMG_PS_CTRL_REG,
219 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
220 ~APMG_PS_CTRL_MSK_PWR_SRC);
221
222 iwl_release_restricted_access(priv);
223 spin_unlock_irqrestore(&priv->lock, flags);
224
225 return rc;
226 }
227
228 static int iwl4965_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
229 {
230 int rc;
231 unsigned long flags;
232
233 spin_lock_irqsave(&priv->lock, flags);
234 rc = iwl_grab_restricted_access(priv);
235 if (rc) {
236 spin_unlock_irqrestore(&priv->lock, flags);
237 return rc;
238 }
239
240 /* stop HW */
241 iwl_write_restricted(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
242
243 iwl_write_restricted(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
244 iwl_write_restricted(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
245 rxq->dma_addr >> 8);
246
247 iwl_write_restricted(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
248 (priv->hw_setting.shared_phys +
249 offsetof(struct iwl_shared, val0)) >> 4);
250
251 iwl_write_restricted(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
252 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
253 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
254 IWL_FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K |
255 /*0x10 << 4 | */
256 (RX_QUEUE_SIZE_LOG <<
257 FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
258
259 /*
260 * iwl_write32(priv,CSR_INT_COAL_REG,0);
261 */
262
263 iwl_release_restricted_access(priv);
264 spin_unlock_irqrestore(&priv->lock, flags);
265
266 return 0;
267 }
268
269 static int iwl4965_kw_init(struct iwl_priv *priv)
270 {
271 unsigned long flags;
272 int rc;
273
274 spin_lock_irqsave(&priv->lock, flags);
275 rc = iwl_grab_restricted_access(priv);
276 if (rc)
277 goto out;
278
279 iwl_write_restricted(priv, IWL_FH_KW_MEM_ADDR_REG,
280 priv->kw.dma_addr >> 4);
281 iwl_release_restricted_access(priv);
282 out:
283 spin_unlock_irqrestore(&priv->lock, flags);
284 return rc;
285 }
286
287 static int iwl4965_kw_alloc(struct iwl_priv *priv)
288 {
289 struct pci_dev *dev = priv->pci_dev;
290 struct iwl_kw *kw = &priv->kw;
291
292 kw->size = IWL4965_KW_SIZE; /* TBW need set somewhere else */
293 kw->v_addr = pci_alloc_consistent(dev, kw->size, &kw->dma_addr);
294 if (!kw->v_addr)
295 return -ENOMEM;
296
297 return 0;
298 }
299
300 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
301 ? # x " " : "")
302
303 int iwl4965_set_fat_chan_info(struct iwl_priv *priv, int phymode, u16 channel,
304 const struct iwl_eeprom_channel *eeprom_ch,
305 u8 fat_extension_channel)
306 {
307 struct iwl_channel_info *ch_info;
308
309 ch_info = (struct iwl_channel_info *)
310 iwl_get_channel_info(priv, phymode, channel);
311
312 if (!is_channel_valid(ch_info))
313 return -1;
314
315 IWL_DEBUG_INFO("FAT Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
316 " %ddBm): Ad-Hoc %ssupported\n",
317 ch_info->channel,
318 is_channel_a_band(ch_info) ?
319 "5.2" : "2.4",
320 CHECK_AND_PRINT(IBSS),
321 CHECK_AND_PRINT(ACTIVE),
322 CHECK_AND_PRINT(RADAR),
323 CHECK_AND_PRINT(WIDE),
324 CHECK_AND_PRINT(NARROW),
325 CHECK_AND_PRINT(DFS),
326 eeprom_ch->flags,
327 eeprom_ch->max_power_avg,
328 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS)
329 && !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ?
330 "" : "not ");
331
332 ch_info->fat_eeprom = *eeprom_ch;
333 ch_info->fat_max_power_avg = eeprom_ch->max_power_avg;
334 ch_info->fat_curr_txpow = eeprom_ch->max_power_avg;
335 ch_info->fat_min_power = 0;
336 ch_info->fat_scan_power = eeprom_ch->max_power_avg;
337 ch_info->fat_flags = eeprom_ch->flags;
338 ch_info->fat_extension_channel = fat_extension_channel;
339
340 return 0;
341 }
342
343 static void iwl4965_kw_free(struct iwl_priv *priv)
344 {
345 struct pci_dev *dev = priv->pci_dev;
346 struct iwl_kw *kw = &priv->kw;
347
348 if (kw->v_addr) {
349 pci_free_consistent(dev, kw->size, kw->v_addr, kw->dma_addr);
350 memset(kw, 0, sizeof(*kw));
351 }
352 }
353
354 /**
355 * iwl4965_txq_ctx_reset - Reset TX queue context
356 * Destroys all DMA structures and initialise them again
357 *
358 * @param priv
359 * @return error code
360 */
361 static int iwl4965_txq_ctx_reset(struct iwl_priv *priv)
362 {
363 int rc = 0;
364 int txq_id, slots_num;
365 unsigned long flags;
366
367 iwl4965_kw_free(priv);
368
369 iwl_hw_txq_ctx_free(priv);
370
371 /* Tx CMD queue */
372 rc = iwl4965_kw_alloc(priv);
373 if (rc) {
374 IWL_ERROR("Keep Warm allocation failed");
375 goto error_kw;
376 }
377
378 spin_lock_irqsave(&priv->lock, flags);
379
380 rc = iwl_grab_restricted_access(priv);
381 if (unlikely(rc)) {
382 IWL_ERROR("TX reset failed");
383 spin_unlock_irqrestore(&priv->lock, flags);
384 goto error_reset;
385 }
386
387 iwl_write_restricted_reg(priv, SCD_TXFACT, 0);
388 iwl_release_restricted_access(priv);
389 spin_unlock_irqrestore(&priv->lock, flags);
390
391 rc = iwl4965_kw_init(priv);
392 if (rc) {
393 IWL_ERROR("kw_init failed\n");
394 goto error_reset;
395 }
396
397 /* Tx queue(s) */
398 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
399 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
400 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
401 rc = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
402 txq_id);
403 if (rc) {
404 IWL_ERROR("Tx %d queue init failed\n", txq_id);
405 goto error;
406 }
407 }
408
409 return rc;
410
411 error:
412 iwl_hw_txq_ctx_free(priv);
413 error_reset:
414 iwl4965_kw_free(priv);
415 error_kw:
416 return rc;
417 }
418
419 int iwl_hw_nic_init(struct iwl_priv *priv)
420 {
421 int rc;
422 unsigned long flags;
423 struct iwl_rx_queue *rxq = &priv->rxq;
424 u8 rev_id;
425 u32 val;
426 u8 val_link;
427
428 iwl_power_init_handle(priv);
429
430 /* nic_init */
431 spin_lock_irqsave(&priv->lock, flags);
432
433 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
434 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
435
436 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
437 rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
438 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
439 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
440 if (rc < 0) {
441 spin_unlock_irqrestore(&priv->lock, flags);
442 IWL_DEBUG_INFO("Failed to init the card\n");
443 return rc;
444 }
445
446 rc = iwl_grab_restricted_access(priv);
447 if (rc) {
448 spin_unlock_irqrestore(&priv->lock, flags);
449 return rc;
450 }
451
452 iwl_read_restricted_reg(priv, APMG_CLK_CTRL_REG);
453
454 iwl_write_restricted_reg(priv, APMG_CLK_CTRL_REG,
455 APMG_CLK_VAL_DMA_CLK_RQT |
456 APMG_CLK_VAL_BSM_CLK_RQT);
457 iwl_read_restricted_reg(priv, APMG_CLK_CTRL_REG);
458
459 udelay(20);
460
461 iwl_set_bits_restricted_reg(priv, APMG_PCIDEV_STT_REG,
462 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
463
464 iwl_release_restricted_access(priv);
465 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
466 spin_unlock_irqrestore(&priv->lock, flags);
467
468 /* Determine HW type */
469 rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
470 if (rc)
471 return rc;
472
473 IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
474
475 iwl4965_nic_set_pwr_src(priv, 1);
476 spin_lock_irqsave(&priv->lock, flags);
477
478 if ((rev_id & 0x80) == 0x80 && (rev_id & 0x7f) < 8) {
479 pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
480 /* Enable No Snoop field */
481 pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
482 val & ~(1 << 11));
483 }
484
485 spin_unlock_irqrestore(&priv->lock, flags);
486
487 /* Read the EEPROM */
488 rc = iwl_eeprom_init(priv);
489 if (rc)
490 return rc;
491
492 if (priv->eeprom.calib_version < EEPROM_TX_POWER_VERSION_NEW) {
493 IWL_ERROR("Older EEPROM detected! Aborting.\n");
494 return -EINVAL;
495 }
496
497 pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
498
499 /* disable L1 entry -- workaround for pre-B1 */
500 pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);
501
502 spin_lock_irqsave(&priv->lock, flags);
503
504 /* set CSR_HW_CONFIG_REG for uCode use */
505
506 iwl_set_bit(priv, CSR_SW_VER, CSR_HW_IF_CONFIG_REG_BIT_KEDRON_R |
507 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
508 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
509
510 rc = iwl_grab_restricted_access(priv);
511 if (rc < 0) {
512 spin_unlock_irqrestore(&priv->lock, flags);
513 IWL_DEBUG_INFO("Failed to init the card\n");
514 return rc;
515 }
516
517 iwl_read_restricted_reg(priv, APMG_PS_CTRL_REG);
518 iwl_set_bits_restricted_reg(priv, APMG_PS_CTRL_REG,
519 APMG_PS_CTRL_VAL_RESET_REQ);
520 udelay(5);
521 iwl_clear_bits_restricted_reg(priv, APMG_PS_CTRL_REG,
522 APMG_PS_CTRL_VAL_RESET_REQ);
523
524 iwl_release_restricted_access(priv);
525 spin_unlock_irqrestore(&priv->lock, flags);
526
527 iwl_hw_card_show_info(priv);
528
529 /* end nic_init */
530
531 /* Allocate the RX queue, or reset if it is already allocated */
532 if (!rxq->bd) {
533 rc = iwl_rx_queue_alloc(priv);
534 if (rc) {
535 IWL_ERROR("Unable to initialize Rx queue\n");
536 return -ENOMEM;
537 }
538 } else
539 iwl_rx_queue_reset(priv, rxq);
540
541 iwl_rx_replenish(priv);
542
543 iwl4965_rx_init(priv, rxq);
544
545 spin_lock_irqsave(&priv->lock, flags);
546
547 rxq->need_update = 1;
548 iwl_rx_queue_update_write_ptr(priv, rxq);
549
550 spin_unlock_irqrestore(&priv->lock, flags);
551 rc = iwl4965_txq_ctx_reset(priv);
552 if (rc)
553 return rc;
554
555 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
556 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
557
558 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
559 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
560
561 set_bit(STATUS_INIT, &priv->status);
562
563 return 0;
564 }
565
566 int iwl_hw_nic_stop_master(struct iwl_priv *priv)
567 {
568 int rc = 0;
569 u32 reg_val;
570 unsigned long flags;
571
572 spin_lock_irqsave(&priv->lock, flags);
573
574 /* set stop master bit */
575 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
576
577 reg_val = iwl_read32(priv, CSR_GP_CNTRL);
578
579 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
580 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
581 IWL_DEBUG_INFO("Card in power save, master is already "
582 "stopped\n");
583 else {
584 rc = iwl_poll_bit(priv, CSR_RESET,
585 CSR_RESET_REG_FLAG_MASTER_DISABLED,
586 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
587 if (rc < 0) {
588 spin_unlock_irqrestore(&priv->lock, flags);
589 return rc;
590 }
591 }
592
593 spin_unlock_irqrestore(&priv->lock, flags);
594 IWL_DEBUG_INFO("stop master\n");
595
596 return rc;
597 }
598
599 void iwl_hw_txq_ctx_stop(struct iwl_priv *priv)
600 {
601
602 int txq_id;
603 unsigned long flags;
604
605 /* reset TFD queues */
606 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
607 spin_lock_irqsave(&priv->lock, flags);
608 if (iwl_grab_restricted_access(priv)) {
609 spin_unlock_irqrestore(&priv->lock, flags);
610 continue;
611 }
612
613 iwl_write_restricted(priv,
614 IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
615 0x0);
616 iwl_poll_restricted_bit(priv, IWL_FH_TSSR_TX_STATUS_REG,
617 IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
618 (txq_id), 200);
619 iwl_release_restricted_access(priv);
620 spin_unlock_irqrestore(&priv->lock, flags);
621 }
622
623 iwl_hw_txq_ctx_free(priv);
624 }
625
626 int iwl_hw_nic_reset(struct iwl_priv *priv)
627 {
628 int rc = 0;
629 unsigned long flags;
630
631 iwl_hw_nic_stop_master(priv);
632
633 spin_lock_irqsave(&priv->lock, flags);
634
635 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
636
637 udelay(10);
638
639 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
640 rc = iwl_poll_bit(priv, CSR_RESET,
641 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
642 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
643
644 udelay(10);
645
646 rc = iwl_grab_restricted_access(priv);
647 if (!rc) {
648 iwl_write_restricted_reg(priv, APMG_CLK_EN_REG,
649 APMG_CLK_VAL_DMA_CLK_RQT |
650 APMG_CLK_VAL_BSM_CLK_RQT);
651
652 udelay(10);
653
654 iwl_set_bits_restricted_reg(priv, APMG_PCIDEV_STT_REG,
655 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
656
657 iwl_release_restricted_access(priv);
658 }
659
660 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
661 wake_up_interruptible(&priv->wait_command_queue);
662
663 spin_unlock_irqrestore(&priv->lock, flags);
664
665 return rc;
666
667 }
668
669 #define REG_RECALIB_PERIOD (60)
670
671 /**
672 * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
673 *
674 * This callback is provided in order to queue the statistics_work
675 * in work_queue context (v. softirq)
676 *
677 * This timer function is continually reset to execute within
678 * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
679 * was received. We need to ensure we receive the statistics in order
680 * to update the temperature used for calibrating the TXPOWER. However,
681 * we can't send the statistics command from softirq context (which
682 * is the context which timers run at) so we have to queue off the
683 * statistics_work to actually send the command to the hardware.
684 */
685 static void iwl4965_bg_statistics_periodic(unsigned long data)
686 {
687 struct iwl_priv *priv = (struct iwl_priv *)data;
688
689 queue_work(priv->workqueue, &priv->statistics_work);
690 }
691
692 /**
693 * iwl4965_bg_statistics_work - Send the statistics request to the hardware.
694 *
695 * This is queued by iwl_bg_statistics_periodic.
696 */
697 static void iwl4965_bg_statistics_work(struct work_struct *work)
698 {
699 struct iwl_priv *priv = container_of(work, struct iwl_priv,
700 statistics_work);
701
702 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
703 return;
704
705 mutex_lock(&priv->mutex);
706 iwl_send_statistics_request(priv);
707 mutex_unlock(&priv->mutex);
708 }
709
710 #define CT_LIMIT_CONST 259
711 #define TM_CT_KILL_THRESHOLD 110
712
713 void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
714 {
715 struct iwl_ct_kill_config cmd;
716 u32 R1, R2, R3;
717 u32 temp_th;
718 u32 crit_temperature;
719 unsigned long flags;
720 int rc = 0;
721
722 spin_lock_irqsave(&priv->lock, flags);
723 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
724 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
725 spin_unlock_irqrestore(&priv->lock, flags);
726
727 if (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK) {
728 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
729 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
730 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
731 } else {
732 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
733 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
734 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
735 }
736
737 temp_th = CELSIUS_TO_KELVIN(TM_CT_KILL_THRESHOLD);
738
739 crit_temperature = ((temp_th * (R3-R1))/CT_LIMIT_CONST) + R2;
740 cmd.critical_temperature_R = cpu_to_le32(crit_temperature);
741 rc = iwl_send_cmd_pdu(priv,
742 REPLY_CT_KILL_CONFIG_CMD, sizeof(cmd), &cmd);
743 if (rc)
744 IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
745 else
746 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded\n");
747 }
748
749 #ifdef CONFIG_IWLWIFI_SENSITIVITY
750
751 /* "false alarms" are signals that our DSP tries to lock onto,
752 * but then determines that they are either noise, or transmissions
753 * from a distant wireless network (also "noise", really) that get
754 * "stepped on" by stronger transmissions within our own network.
755 * This algorithm attempts to set a sensitivity level that is high
756 * enough to receive all of our own network traffic, but not so
757 * high that our DSP gets too busy trying to lock onto non-network
758 * activity/noise. */
759 static int iwl4965_sens_energy_cck(struct iwl_priv *priv,
760 u32 norm_fa,
761 u32 rx_enable_time,
762 struct statistics_general_data *rx_info)
763 {
764 u32 max_nrg_cck = 0;
765 int i = 0;
766 u8 max_silence_rssi = 0;
767 u32 silence_ref = 0;
768 u8 silence_rssi_a = 0;
769 u8 silence_rssi_b = 0;
770 u8 silence_rssi_c = 0;
771 u32 val;
772
773 /* "false_alarms" values below are cross-multiplications to assess the
774 * numbers of false alarms within the measured period of actual Rx
775 * (Rx is off when we're txing), vs the min/max expected false alarms
776 * (some should be expected if rx is sensitive enough) in a
777 * hypothetical listening period of 200 time units (TU), 204.8 msec:
778 *
779 * MIN_FA/fixed-time < false_alarms/actual-rx-time < MAX_FA/beacon-time
780 *
781 * */
782 u32 false_alarms = norm_fa * 200 * 1024;
783 u32 max_false_alarms = MAX_FA_CCK * rx_enable_time;
784 u32 min_false_alarms = MIN_FA_CCK * rx_enable_time;
785 struct iwl_sensitivity_data *data = NULL;
786
787 data = &(priv->sensitivity_data);
788
789 data->nrg_auto_corr_silence_diff = 0;
790
791 /* Find max silence rssi among all 3 receivers.
792 * This is background noise, which may include transmissions from other
793 * networks, measured during silence before our network's beacon */
794 silence_rssi_a = (u8)((rx_info->beacon_silence_rssi_a &
795 ALL_BAND_FILTER)>>8);
796 silence_rssi_b = (u8)((rx_info->beacon_silence_rssi_b &
797 ALL_BAND_FILTER)>>8);
798 silence_rssi_c = (u8)((rx_info->beacon_silence_rssi_c &
799 ALL_BAND_FILTER)>>8);
800
801 val = max(silence_rssi_b, silence_rssi_c);
802 max_silence_rssi = max(silence_rssi_a, (u8) val);
803
804 /* Store silence rssi in 20-beacon history table */
805 data->nrg_silence_rssi[data->nrg_silence_idx] = max_silence_rssi;
806 data->nrg_silence_idx++;
807 if (data->nrg_silence_idx >= NRG_NUM_PREV_STAT_L)
808 data->nrg_silence_idx = 0;
809
810 /* Find max silence rssi across 20 beacon history */
811 for (i = 0; i < NRG_NUM_PREV_STAT_L; i++) {
812 val = data->nrg_silence_rssi[i];
813 silence_ref = max(silence_ref, val);
814 }
815 IWL_DEBUG_CALIB("silence a %u, b %u, c %u, 20-bcn max %u\n",
816 silence_rssi_a, silence_rssi_b, silence_rssi_c,
817 silence_ref);
818
819 /* Find max rx energy (min value!) among all 3 receivers,
820 * measured during beacon frame.
821 * Save it in 10-beacon history table. */
822 i = data->nrg_energy_idx;
823 val = min(rx_info->beacon_energy_b, rx_info->beacon_energy_c);
824 data->nrg_value[i] = min(rx_info->beacon_energy_a, val);
825
826 data->nrg_energy_idx++;
827 if (data->nrg_energy_idx >= 10)
828 data->nrg_energy_idx = 0;
829
830 /* Find min rx energy (max value) across 10 beacon history.
831 * This is the minimum signal level that we want to receive well.
832 * Add backoff (margin so we don't miss slightly lower energy frames).
833 * This establishes an upper bound (min value) for energy threshold. */
834 max_nrg_cck = data->nrg_value[0];
835 for (i = 1; i < 10; i++)
836 max_nrg_cck = (u32) max(max_nrg_cck, (data->nrg_value[i]));
837 max_nrg_cck += 6;
838
839 IWL_DEBUG_CALIB("rx energy a %u, b %u, c %u, 10-bcn max/min %u\n",
840 rx_info->beacon_energy_a, rx_info->beacon_energy_b,
841 rx_info->beacon_energy_c, max_nrg_cck - 6);
842
843 /* Count number of consecutive beacons with fewer-than-desired
844 * false alarms. */
845 if (false_alarms < min_false_alarms)
846 data->num_in_cck_no_fa++;
847 else
848 data->num_in_cck_no_fa = 0;
849 IWL_DEBUG_CALIB("consecutive bcns with few false alarms = %u\n",
850 data->num_in_cck_no_fa);
851
852 /* If we got too many false alarms this time, reduce sensitivity */
853 if (false_alarms > max_false_alarms) {
854 IWL_DEBUG_CALIB("norm FA %u > max FA %u\n",
855 false_alarms, max_false_alarms);
856 IWL_DEBUG_CALIB("... reducing sensitivity\n");
857 data->nrg_curr_state = IWL_FA_TOO_MANY;
858
859 if (data->auto_corr_cck > AUTO_CORR_MAX_TH_CCK) {
860 /* Store for "fewer than desired" on later beacon */
861 data->nrg_silence_ref = silence_ref;
862
863 /* increase energy threshold (reduce nrg value)
864 * to decrease sensitivity */
865 if (data->nrg_th_cck > (NRG_MAX_CCK + NRG_STEP_CCK))
866 data->nrg_th_cck = data->nrg_th_cck
867 - NRG_STEP_CCK;
868 }
869
870 /* increase auto_corr values to decrease sensitivity */
871 if (data->auto_corr_cck < AUTO_CORR_MAX_TH_CCK)
872 data->auto_corr_cck = AUTO_CORR_MAX_TH_CCK + 1;
873 else {
874 val = data->auto_corr_cck + AUTO_CORR_STEP_CCK;
875 data->auto_corr_cck = min((u32)AUTO_CORR_MAX_CCK, val);
876 }
877 val = data->auto_corr_cck_mrc + AUTO_CORR_STEP_CCK;
878 data->auto_corr_cck_mrc = min((u32)AUTO_CORR_MAX_CCK_MRC, val);
879
880 /* Else if we got fewer than desired, increase sensitivity */
881 } else if (false_alarms < min_false_alarms) {
882 data->nrg_curr_state = IWL_FA_TOO_FEW;
883
884 /* Compare silence level with silence level for most recent
885 * healthy number or too many false alarms */
886 data->nrg_auto_corr_silence_diff = (s32)data->nrg_silence_ref -
887 (s32)silence_ref;
888
889 IWL_DEBUG_CALIB("norm FA %u < min FA %u, silence diff %d\n",
890 false_alarms, min_false_alarms,
891 data->nrg_auto_corr_silence_diff);
892
893 /* Increase value to increase sensitivity, but only if:
894 * 1a) previous beacon did *not* have *too many* false alarms
895 * 1b) AND there's a significant difference in Rx levels
896 * from a previous beacon with too many, or healthy # FAs
897 * OR 2) We've seen a lot of beacons (100) with too few
898 * false alarms */
899 if ((data->nrg_prev_state != IWL_FA_TOO_MANY) &&
900 ((data->nrg_auto_corr_silence_diff > NRG_DIFF) ||
901 (data->num_in_cck_no_fa > MAX_NUMBER_CCK_NO_FA))) {
902
903 IWL_DEBUG_CALIB("... increasing sensitivity\n");
904 /* Increase nrg value to increase sensitivity */
905 val = data->nrg_th_cck + NRG_STEP_CCK;
906 data->nrg_th_cck = min((u32)NRG_MIN_CCK, val);
907
908 /* Decrease auto_corr values to increase sensitivity */
909 val = data->auto_corr_cck - AUTO_CORR_STEP_CCK;
910 data->auto_corr_cck = max((u32)AUTO_CORR_MIN_CCK, val);
911
912 val = data->auto_corr_cck_mrc - AUTO_CORR_STEP_CCK;
913 data->auto_corr_cck_mrc =
914 max((u32)AUTO_CORR_MIN_CCK_MRC, val);
915
916 } else
917 IWL_DEBUG_CALIB("... but not changing sensitivity\n");
918
919 /* Else we got a healthy number of false alarms, keep status quo */
920 } else {
921 IWL_DEBUG_CALIB(" FA in safe zone\n");
922 data->nrg_curr_state = IWL_FA_GOOD_RANGE;
923
924 /* Store for use in "fewer than desired" with later beacon */
925 data->nrg_silence_ref = silence_ref;
926
927 /* If previous beacon had too many false alarms,
928 * give it some extra margin by reducing sensitivity again
929 * (but don't go below measured energy of desired Rx) */
930 if (IWL_FA_TOO_MANY == data->nrg_prev_state) {
931 IWL_DEBUG_CALIB("... increasing margin\n");
932 data->nrg_th_cck -= NRG_MARGIN;
933 }
934 }
935
936 /* Make sure the energy threshold does not go above the measured
937 * energy of the desired Rx signals (reduced by backoff margin),
938 * or else we might start missing Rx frames.
939 * Lower value is higher energy, so we use max()!
940 */
941 data->nrg_th_cck = max(max_nrg_cck, data->nrg_th_cck);
942 IWL_DEBUG_CALIB("new nrg_th_cck %u\n", data->nrg_th_cck);
943
944 data->nrg_prev_state = data->nrg_curr_state;
945
946 return 0;
947 }
948
949
950 static int iwl4965_sens_auto_corr_ofdm(struct iwl_priv *priv,
951 u32 norm_fa,
952 u32 rx_enable_time)
953 {
954 u32 val;
955 u32 false_alarms = norm_fa * 200 * 1024;
956 u32 max_false_alarms = MAX_FA_OFDM * rx_enable_time;
957 u32 min_false_alarms = MIN_FA_OFDM * rx_enable_time;
958 struct iwl_sensitivity_data *data = NULL;
959
960 data = &(priv->sensitivity_data);
961
962 /* If we got too many false alarms this time, reduce sensitivity */
963 if (false_alarms > max_false_alarms) {
964
965 IWL_DEBUG_CALIB("norm FA %u > max FA %u)\n",
966 false_alarms, max_false_alarms);
967
968 val = data->auto_corr_ofdm + AUTO_CORR_STEP_OFDM;
969 data->auto_corr_ofdm =
970 min((u32)AUTO_CORR_MAX_OFDM, val);
971
972 val = data->auto_corr_ofdm_mrc + AUTO_CORR_STEP_OFDM;
973 data->auto_corr_ofdm_mrc =
974 min((u32)AUTO_CORR_MAX_OFDM_MRC, val);
975
976 val = data->auto_corr_ofdm_x1 + AUTO_CORR_STEP_OFDM;
977 data->auto_corr_ofdm_x1 =
978 min((u32)AUTO_CORR_MAX_OFDM_X1, val);
979
980 val = data->auto_corr_ofdm_mrc_x1 + AUTO_CORR_STEP_OFDM;
981 data->auto_corr_ofdm_mrc_x1 =
982 min((u32)AUTO_CORR_MAX_OFDM_MRC_X1, val);
983 }
984
985 /* Else if we got fewer than desired, increase sensitivity */
986 else if (false_alarms < min_false_alarms) {
987
988 IWL_DEBUG_CALIB("norm FA %u < min FA %u\n",
989 false_alarms, min_false_alarms);
990
991 val = data->auto_corr_ofdm - AUTO_CORR_STEP_OFDM;
992 data->auto_corr_ofdm =
993 max((u32)AUTO_CORR_MIN_OFDM, val);
994
995 val = data->auto_corr_ofdm_mrc - AUTO_CORR_STEP_OFDM;
996 data->auto_corr_ofdm_mrc =
997 max((u32)AUTO_CORR_MIN_OFDM_MRC, val);
998
999 val = data->auto_corr_ofdm_x1 - AUTO_CORR_STEP_OFDM;
1000 data->auto_corr_ofdm_x1 =
1001 max((u32)AUTO_CORR_MIN_OFDM_X1, val);
1002
1003 val = data->auto_corr_ofdm_mrc_x1 - AUTO_CORR_STEP_OFDM;
1004 data->auto_corr_ofdm_mrc_x1 =
1005 max((u32)AUTO_CORR_MIN_OFDM_MRC_X1, val);
1006 }
1007
1008 else
1009 IWL_DEBUG_CALIB("min FA %u < norm FA %u < max FA %u OK\n",
1010 min_false_alarms, false_alarms, max_false_alarms);
1011
1012 return 0;
1013 }
1014
1015 static int iwl_sensitivity_callback(struct iwl_priv *priv,
1016 struct iwl_cmd *cmd, struct sk_buff *skb)
1017 {
1018 /* We didn't cache the SKB; let the caller free it */
1019 return 1;
1020 }
1021
1022 /* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */
1023 static int iwl4965_sensitivity_write(struct iwl_priv *priv, u8 flags)
1024 {
1025 int rc = 0;
1026 struct iwl_sensitivity_cmd cmd ;
1027 struct iwl_sensitivity_data *data = NULL;
1028 struct iwl_host_cmd cmd_out = {
1029 .id = SENSITIVITY_CMD,
1030 .len = sizeof(struct iwl_sensitivity_cmd),
1031 .meta.flags = flags,
1032 .data = &cmd,
1033 };
1034
1035 data = &(priv->sensitivity_data);
1036
1037 memset(&cmd, 0, sizeof(cmd));
1038
1039 cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX] =
1040 cpu_to_le16((u16)data->auto_corr_ofdm);
1041 cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX] =
1042 cpu_to_le16((u16)data->auto_corr_ofdm_mrc);
1043 cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX] =
1044 cpu_to_le16((u16)data->auto_corr_ofdm_x1);
1045 cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX] =
1046 cpu_to_le16((u16)data->auto_corr_ofdm_mrc_x1);
1047
1048 cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX] =
1049 cpu_to_le16((u16)data->auto_corr_cck);
1050 cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX] =
1051 cpu_to_le16((u16)data->auto_corr_cck_mrc);
1052
1053 cmd.table[HD_MIN_ENERGY_CCK_DET_INDEX] =
1054 cpu_to_le16((u16)data->nrg_th_cck);
1055 cmd.table[HD_MIN_ENERGY_OFDM_DET_INDEX] =
1056 cpu_to_le16((u16)data->nrg_th_ofdm);
1057
1058 cmd.table[HD_BARKER_CORR_TH_ADD_MIN_INDEX] =
1059 __constant_cpu_to_le16(190);
1060 cmd.table[HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX] =
1061 __constant_cpu_to_le16(390);
1062 cmd.table[HD_OFDM_ENERGY_TH_IN_INDEX] =
1063 __constant_cpu_to_le16(62);
1064
1065 IWL_DEBUG_CALIB("ofdm: ac %u mrc %u x1 %u mrc_x1 %u thresh %u\n",
1066 data->auto_corr_ofdm, data->auto_corr_ofdm_mrc,
1067 data->auto_corr_ofdm_x1, data->auto_corr_ofdm_mrc_x1,
1068 data->nrg_th_ofdm);
1069
1070 IWL_DEBUG_CALIB("cck: ac %u mrc %u thresh %u\n",
1071 data->auto_corr_cck, data->auto_corr_cck_mrc,
1072 data->nrg_th_cck);
1073
1074 cmd.control = SENSITIVITY_CMD_CONTROL_WORK_TABLE;
1075
1076 if (flags & CMD_ASYNC)
1077 cmd_out.meta.u.callback = iwl_sensitivity_callback;
1078
1079 /* Don't send command to uCode if nothing has changed */
1080 if (!memcmp(&cmd.table[0], &(priv->sensitivity_tbl[0]),
1081 sizeof(u16)*HD_TABLE_SIZE)) {
1082 IWL_DEBUG_CALIB("No change in SENSITIVITY_CMD\n");
1083 return 0;
1084 }
1085
1086 /* Copy table for comparison next time */
1087 memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]),
1088 sizeof(u16)*HD_TABLE_SIZE);
1089
1090 rc = iwl_send_cmd(priv, &cmd_out);
1091 if (!rc) {
1092 IWL_DEBUG_CALIB("SENSITIVITY_CMD succeeded\n");
1093 return rc;
1094 }
1095
1096 return 0;
1097 }
1098
1099 void iwl4965_init_sensitivity(struct iwl_priv *priv, u8 flags, u8 force)
1100 {
1101 int rc = 0;
1102 int i;
1103 struct iwl_sensitivity_data *data = NULL;
1104
1105 IWL_DEBUG_CALIB("Start iwl4965_init_sensitivity\n");
1106
1107 if (force)
1108 memset(&(priv->sensitivity_tbl[0]), 0,
1109 sizeof(u16)*HD_TABLE_SIZE);
1110
1111 /* Clear driver's sensitivity algo data */
1112 data = &(priv->sensitivity_data);
1113 memset(data, 0, sizeof(struct iwl_sensitivity_data));
1114
1115 data->num_in_cck_no_fa = 0;
1116 data->nrg_curr_state = IWL_FA_TOO_MANY;
1117 data->nrg_prev_state = IWL_FA_TOO_MANY;
1118 data->nrg_silence_ref = 0;
1119 data->nrg_silence_idx = 0;
1120 data->nrg_energy_idx = 0;
1121
1122 for (i = 0; i < 10; i++)
1123 data->nrg_value[i] = 0;
1124
1125 for (i = 0; i < NRG_NUM_PREV_STAT_L; i++)
1126 data->nrg_silence_rssi[i] = 0;
1127
1128 data->auto_corr_ofdm = 90;
1129 data->auto_corr_ofdm_mrc = 170;
1130 data->auto_corr_ofdm_x1 = 105;
1131 data->auto_corr_ofdm_mrc_x1 = 220;
1132 data->auto_corr_cck = AUTO_CORR_CCK_MIN_VAL_DEF;
1133 data->auto_corr_cck_mrc = 200;
1134 data->nrg_th_cck = 100;
1135 data->nrg_th_ofdm = 100;
1136
1137 data->last_bad_plcp_cnt_ofdm = 0;
1138 data->last_fa_cnt_ofdm = 0;
1139 data->last_bad_plcp_cnt_cck = 0;
1140 data->last_fa_cnt_cck = 0;
1141
1142 /* Clear prior Sensitivity command data to force send to uCode */
1143 if (force)
1144 memset(&(priv->sensitivity_tbl[0]), 0,
1145 sizeof(u16)*HD_TABLE_SIZE);
1146
1147 rc |= iwl4965_sensitivity_write(priv, flags);
1148 IWL_DEBUG_CALIB("<<return 0x%X\n", rc);
1149
1150 return;
1151 }
1152
1153
1154 /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
1155 * Called after every association, but this runs only once!
1156 * ... once chain noise is calibrated the first time, it's good forever. */
1157 void iwl4965_chain_noise_reset(struct iwl_priv *priv)
1158 {
1159 struct iwl_chain_noise_data *data = NULL;
1160 int rc = 0;
1161
1162 data = &(priv->chain_noise_data);
1163 if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
1164 struct iwl_calibration_cmd cmd;
1165
1166 memset(&cmd, 0, sizeof(cmd));
1167 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
1168 cmd.diff_gain_a = 0;
1169 cmd.diff_gain_b = 0;
1170 cmd.diff_gain_c = 0;
1171 rc = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
1172 sizeof(cmd), &cmd);
1173 msleep(4);
1174 data->state = IWL_CHAIN_NOISE_ACCUMULATE;
1175 IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
1176 }
1177 return;
1178 }
1179
1180 /*
1181 * Accumulate 20 beacons of signal and noise statistics for each of
1182 * 3 receivers/antennas/rx-chains, then figure out:
1183 * 1) Which antennas are connected.
1184 * 2) Differential rx gain settings to balance the 3 receivers.
1185 */
1186 static void iwl4965_noise_calibration(struct iwl_priv *priv,
1187 struct iwl_notif_statistics *stat_resp)
1188 {
1189 struct iwl_chain_noise_data *data = NULL;
1190 int rc = 0;
1191
1192 u32 chain_noise_a;
1193 u32 chain_noise_b;
1194 u32 chain_noise_c;
1195 u32 chain_sig_a;
1196 u32 chain_sig_b;
1197 u32 chain_sig_c;
1198 u32 average_sig[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
1199 u32 average_noise[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
1200 u32 max_average_sig;
1201 u16 max_average_sig_antenna_i;
1202 u32 min_average_noise = MIN_AVERAGE_NOISE_MAX_VALUE;
1203 u16 min_average_noise_antenna_i = INITIALIZATION_VALUE;
1204 u16 i = 0;
1205 u16 chan_num = INITIALIZATION_VALUE;
1206 u32 band = INITIALIZATION_VALUE;
1207 u32 active_chains = 0;
1208 unsigned long flags;
1209 struct statistics_rx_non_phy *rx_info = &(stat_resp->rx.general);
1210
1211 data = &(priv->chain_noise_data);
1212
1213 /* Accumulate just the first 20 beacons after the first association,
1214 * then we're done forever. */
1215 if (data->state != IWL_CHAIN_NOISE_ACCUMULATE) {
1216 if (data->state == IWL_CHAIN_NOISE_ALIVE)
1217 IWL_DEBUG_CALIB("Wait for noise calib reset\n");
1218 return;
1219 }
1220
1221 spin_lock_irqsave(&priv->lock, flags);
1222 if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
1223 IWL_DEBUG_CALIB(" << Interference data unavailable\n");
1224 spin_unlock_irqrestore(&priv->lock, flags);
1225 return;
1226 }
1227
1228 band = (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) ? 0 : 1;
1229 chan_num = le16_to_cpu(priv->staging_rxon.channel);
1230
1231 /* Make sure we accumulate data for just the associated channel
1232 * (even if scanning). */
1233 if ((chan_num != (le32_to_cpu(stat_resp->flag) >> 16)) ||
1234 ((STATISTICS_REPLY_FLG_BAND_24G_MSK ==
1235 (stat_resp->flag & STATISTICS_REPLY_FLG_BAND_24G_MSK)) && band)) {
1236 IWL_DEBUG_CALIB("Stats not from chan=%d, band=%d\n",
1237 chan_num, band);
1238 spin_unlock_irqrestore(&priv->lock, flags);
1239 return;
1240 }
1241
1242 /* Accumulate beacon statistics values across 20 beacons */
1243 chain_noise_a = le32_to_cpu(rx_info->beacon_silence_rssi_a) &
1244 IN_BAND_FILTER;
1245 chain_noise_b = le32_to_cpu(rx_info->beacon_silence_rssi_b) &
1246 IN_BAND_FILTER;
1247 chain_noise_c = le32_to_cpu(rx_info->beacon_silence_rssi_c) &
1248 IN_BAND_FILTER;
1249
1250 chain_sig_a = le32_to_cpu(rx_info->beacon_rssi_a) & IN_BAND_FILTER;
1251 chain_sig_b = le32_to_cpu(rx_info->beacon_rssi_b) & IN_BAND_FILTER;
1252 chain_sig_c = le32_to_cpu(rx_info->beacon_rssi_c) & IN_BAND_FILTER;
1253
1254 spin_unlock_irqrestore(&priv->lock, flags);
1255
1256 data->beacon_count++;
1257
1258 data->chain_noise_a = (chain_noise_a + data->chain_noise_a);
1259 data->chain_noise_b = (chain_noise_b + data->chain_noise_b);
1260 data->chain_noise_c = (chain_noise_c + data->chain_noise_c);
1261
1262 data->chain_signal_a = (chain_sig_a + data->chain_signal_a);
1263 data->chain_signal_b = (chain_sig_b + data->chain_signal_b);
1264 data->chain_signal_c = (chain_sig_c + data->chain_signal_c);
1265
1266 IWL_DEBUG_CALIB("chan=%d, band=%d, beacon=%d\n", chan_num, band,
1267 data->beacon_count);
1268 IWL_DEBUG_CALIB("chain_sig: a %d b %d c %d\n",
1269 chain_sig_a, chain_sig_b, chain_sig_c);
1270 IWL_DEBUG_CALIB("chain_noise: a %d b %d c %d\n",
1271 chain_noise_a, chain_noise_b, chain_noise_c);
1272
1273 /* If this is the 20th beacon, determine:
1274 * 1) Disconnected antennas (using signal strengths)
1275 * 2) Differential gain (using silence noise) to balance receivers */
1276 if (data->beacon_count == CAL_NUM_OF_BEACONS) {
1277
1278 /* Analyze signal for disconnected antenna */
1279 average_sig[0] = (data->chain_signal_a) / CAL_NUM_OF_BEACONS;
1280 average_sig[1] = (data->chain_signal_b) / CAL_NUM_OF_BEACONS;
1281 average_sig[2] = (data->chain_signal_c) / CAL_NUM_OF_BEACONS;
1282
1283 if (average_sig[0] >= average_sig[1]) {
1284 max_average_sig = average_sig[0];
1285 max_average_sig_antenna_i = 0;
1286 active_chains = (1 << max_average_sig_antenna_i);
1287 } else {
1288 max_average_sig = average_sig[1];
1289 max_average_sig_antenna_i = 1;
1290 active_chains = (1 << max_average_sig_antenna_i);
1291 }
1292
1293 if (average_sig[2] >= max_average_sig) {
1294 max_average_sig = average_sig[2];
1295 max_average_sig_antenna_i = 2;
1296 active_chains = (1 << max_average_sig_antenna_i);
1297 }
1298
1299 IWL_DEBUG_CALIB("average_sig: a %d b %d c %d\n",
1300 average_sig[0], average_sig[1], average_sig[2]);
1301 IWL_DEBUG_CALIB("max_average_sig = %d, antenna %d\n",
1302 max_average_sig, max_average_sig_antenna_i);
1303
1304 /* Compare signal strengths for all 3 receivers. */
1305 for (i = 0; i < NUM_RX_CHAINS; i++) {
1306 if (i != max_average_sig_antenna_i) {
1307 s32 rssi_delta = (max_average_sig -
1308 average_sig[i]);
1309
1310 /* If signal is very weak, compared with
1311 * strongest, mark it as disconnected. */
1312 if (rssi_delta > MAXIMUM_ALLOWED_PATHLOSS)
1313 data->disconn_array[i] = 1;
1314 else
1315 active_chains |= (1 << i);
1316 IWL_DEBUG_CALIB("i = %d rssiDelta = %d "
1317 "disconn_array[i] = %d\n",
1318 i, rssi_delta, data->disconn_array[i]);
1319 }
1320 }
1321
1322 /*If both chains A & B are disconnected -
1323 * connect B and leave A as is */
1324 if (data->disconn_array[CHAIN_A] &&
1325 data->disconn_array[CHAIN_B]) {
1326 data->disconn_array[CHAIN_B] = 0;
1327 active_chains |= (1 << CHAIN_B);
1328 IWL_DEBUG_CALIB("both A & B chains are disconnected! "
1329 "W/A - declare B as connected\n");
1330 }
1331
1332 IWL_DEBUG_CALIB("active_chains (bitwise) = 0x%x\n",
1333 active_chains);
1334
1335 /* Save for use within RXON, TX, SCAN commands, etc. */
1336 priv->valid_antenna = active_chains;
1337
1338 /* Analyze noise for rx balance */
1339 average_noise[0] = ((data->chain_noise_a)/CAL_NUM_OF_BEACONS);
1340 average_noise[1] = ((data->chain_noise_b)/CAL_NUM_OF_BEACONS);
1341 average_noise[2] = ((data->chain_noise_c)/CAL_NUM_OF_BEACONS);
1342
1343 for (i = 0; i < NUM_RX_CHAINS; i++) {
1344 if (!(data->disconn_array[i]) &&
1345 (average_noise[i] <= min_average_noise)) {
1346 /* This means that chain i is active and has
1347 * lower noise values so far: */
1348 min_average_noise = average_noise[i];
1349 min_average_noise_antenna_i = i;
1350 }
1351 }
1352
1353 data->delta_gain_code[min_average_noise_antenna_i] = 0;
1354
1355 IWL_DEBUG_CALIB("average_noise: a %d b %d c %d\n",
1356 average_noise[0], average_noise[1],
1357 average_noise[2]);
1358
1359 IWL_DEBUG_CALIB("min_average_noise = %d, antenna %d\n",
1360 min_average_noise, min_average_noise_antenna_i);
1361
1362 for (i = 0; i < NUM_RX_CHAINS; i++) {
1363 s32 delta_g = 0;
1364
1365 if (!(data->disconn_array[i]) &&
1366 (data->delta_gain_code[i] ==
1367 CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
1368 delta_g = average_noise[i] - min_average_noise;
1369 data->delta_gain_code[i] = (u8)((delta_g *
1370 10) / 15);
1371 if (CHAIN_NOISE_MAX_DELTA_GAIN_CODE <
1372 data->delta_gain_code[i])
1373 data->delta_gain_code[i] =
1374 CHAIN_NOISE_MAX_DELTA_GAIN_CODE;
1375
1376 data->delta_gain_code[i] =
1377 (data->delta_gain_code[i] | (1 << 2));
1378 } else
1379 data->delta_gain_code[i] = 0;
1380 }
1381 IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
1382 data->delta_gain_code[0],
1383 data->delta_gain_code[1],
1384 data->delta_gain_code[2]);
1385
1386 /* Differential gain gets sent to uCode only once */
1387 if (!data->radio_write) {
1388 struct iwl_calibration_cmd cmd;
1389 data->radio_write = 1;
1390
1391 memset(&cmd, 0, sizeof(cmd));
1392 cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
1393 cmd.diff_gain_a = data->delta_gain_code[0];
1394 cmd.diff_gain_b = data->delta_gain_code[1];
1395 cmd.diff_gain_c = data->delta_gain_code[2];
1396 rc = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
1397 sizeof(cmd), &cmd);
1398 if (rc)
1399 IWL_DEBUG_CALIB("fail sending cmd "
1400 "REPLY_PHY_CALIBRATION_CMD \n");
1401
1402 /* TODO we might want recalculate
1403 * rx_chain in rxon cmd */
1404
1405 /* Mark so we run this algo only once! */
1406 data->state = IWL_CHAIN_NOISE_CALIBRATED;
1407 }
1408 data->chain_noise_a = 0;
1409 data->chain_noise_b = 0;
1410 data->chain_noise_c = 0;
1411 data->chain_signal_a = 0;
1412 data->chain_signal_b = 0;
1413 data->chain_signal_c = 0;
1414 data->beacon_count = 0;
1415 }
1416 return;
1417 }
1418
1419 static void iwl4965_sensitivity_calibration(struct iwl_priv *priv,
1420 struct iwl_notif_statistics *resp)
1421 {
1422 int rc = 0;
1423 u32 rx_enable_time;
1424 u32 fa_cck;
1425 u32 fa_ofdm;
1426 u32 bad_plcp_cck;
1427 u32 bad_plcp_ofdm;
1428 u32 norm_fa_ofdm;
1429 u32 norm_fa_cck;
1430 struct iwl_sensitivity_data *data = NULL;
1431 struct statistics_rx_non_phy *rx_info = &(resp->rx.general);
1432 struct statistics_rx *statistics = &(resp->rx);
1433 unsigned long flags;
1434 struct statistics_general_data statis;
1435
1436 data = &(priv->sensitivity_data);
1437
1438 if (!iwl_is_associated(priv)) {
1439 IWL_DEBUG_CALIB("<< - not associated\n");
1440 return;
1441 }
1442
1443 spin_lock_irqsave(&priv->lock, flags);
1444 if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
1445 IWL_DEBUG_CALIB("<< invalid data.\n");
1446 spin_unlock_irqrestore(&priv->lock, flags);
1447 return;
1448 }
1449
1450 /* Extract Statistics: */
1451 rx_enable_time = le32_to_cpu(rx_info->channel_load);
1452 fa_cck = le32_to_cpu(statistics->cck.false_alarm_cnt);
1453 fa_ofdm = le32_to_cpu(statistics->ofdm.false_alarm_cnt);
1454 bad_plcp_cck = le32_to_cpu(statistics->cck.plcp_err);
1455 bad_plcp_ofdm = le32_to_cpu(statistics->ofdm.plcp_err);
1456
1457 statis.beacon_silence_rssi_a =
1458 le32_to_cpu(statistics->general.beacon_silence_rssi_a);
1459 statis.beacon_silence_rssi_b =
1460 le32_to_cpu(statistics->general.beacon_silence_rssi_b);
1461 statis.beacon_silence_rssi_c =
1462 le32_to_cpu(statistics->general.beacon_silence_rssi_c);
1463 statis.beacon_energy_a =
1464 le32_to_cpu(statistics->general.beacon_energy_a);
1465 statis.beacon_energy_b =
1466 le32_to_cpu(statistics->general.beacon_energy_b);
1467 statis.beacon_energy_c =
1468 le32_to_cpu(statistics->general.beacon_energy_c);
1469
1470 spin_unlock_irqrestore(&priv->lock, flags);
1471
1472 IWL_DEBUG_CALIB("rx_enable_time = %u usecs\n", rx_enable_time);
1473
1474 if (!rx_enable_time) {
1475 IWL_DEBUG_CALIB("<< RX Enable Time == 0! \n");
1476 return;
1477 }
1478
1479 /* These statistics increase monotonically, and do not reset
1480 * at each beacon. Calculate difference from last value, or just
1481 * use the new statistics value if it has reset or wrapped around. */
1482 if (data->last_bad_plcp_cnt_cck > bad_plcp_cck)
1483 data->last_bad_plcp_cnt_cck = bad_plcp_cck;
1484 else {
1485 bad_plcp_cck -= data->last_bad_plcp_cnt_cck;
1486 data->last_bad_plcp_cnt_cck += bad_plcp_cck;
1487 }
1488
1489 if (data->last_bad_plcp_cnt_ofdm > bad_plcp_ofdm)
1490 data->last_bad_plcp_cnt_ofdm = bad_plcp_ofdm;
1491 else {
1492 bad_plcp_ofdm -= data->last_bad_plcp_cnt_ofdm;
1493 data->last_bad_plcp_cnt_ofdm += bad_plcp_ofdm;
1494 }
1495
1496 if (data->last_fa_cnt_ofdm > fa_ofdm)
1497 data->last_fa_cnt_ofdm = fa_ofdm;
1498 else {
1499 fa_ofdm -= data->last_fa_cnt_ofdm;
1500 data->last_fa_cnt_ofdm += fa_ofdm;
1501 }
1502
1503 if (data->last_fa_cnt_cck > fa_cck)
1504 data->last_fa_cnt_cck = fa_cck;
1505 else {
1506 fa_cck -= data->last_fa_cnt_cck;
1507 data->last_fa_cnt_cck += fa_cck;
1508 }
1509
1510 /* Total aborted signal locks */
1511 norm_fa_ofdm = fa_ofdm + bad_plcp_ofdm;
1512 norm_fa_cck = fa_cck + bad_plcp_cck;
1513
1514 IWL_DEBUG_CALIB("cck: fa %u badp %u ofdm: fa %u badp %u\n", fa_cck,
1515 bad_plcp_cck, fa_ofdm, bad_plcp_ofdm);
1516
1517 iwl4965_sens_auto_corr_ofdm(priv, norm_fa_ofdm, rx_enable_time);
1518 iwl4965_sens_energy_cck(priv, norm_fa_cck, rx_enable_time, &statis);
1519 rc |= iwl4965_sensitivity_write(priv, CMD_ASYNC);
1520
1521 return;
1522 }
1523
1524 static void iwl4965_bg_sensitivity_work(struct work_struct *work)
1525 {
1526 struct iwl_priv *priv = container_of(work, struct iwl_priv,
1527 sensitivity_work);
1528
1529 mutex_lock(&priv->mutex);
1530
1531 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1532 test_bit(STATUS_SCANNING, &priv->status)) {
1533 mutex_unlock(&priv->mutex);
1534 return;
1535 }
1536
1537 if (priv->start_calib) {
1538 iwl4965_noise_calibration(priv, &priv->statistics);
1539
1540 if (priv->sensitivity_data.state ==
1541 IWL_SENS_CALIB_NEED_REINIT) {
1542 iwl4965_init_sensitivity(priv, CMD_ASYNC, 0);
1543 priv->sensitivity_data.state = IWL_SENS_CALIB_ALLOWED;
1544 } else
1545 iwl4965_sensitivity_calibration(priv,
1546 &priv->statistics);
1547 }
1548
1549 mutex_unlock(&priv->mutex);
1550 return;
1551 }
1552 #endif /*CONFIG_IWLWIFI_SENSITIVITY*/
1553
1554 static void iwl4965_bg_txpower_work(struct work_struct *work)
1555 {
1556 struct iwl_priv *priv = container_of(work, struct iwl_priv,
1557 txpower_work);
1558
1559 /* If a scan happened to start before we got here
1560 * then just return; the statistics notification will
1561 * kick off another scheduled work to compensate for
1562 * any temperature delta we missed here. */
1563 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
1564 test_bit(STATUS_SCANNING, &priv->status))
1565 return;
1566
1567 mutex_lock(&priv->mutex);
1568
1569 /* Regardless of if we are assocaited, we must reconfigure the
1570 * TX power since frames can be sent on non-radar channels while
1571 * not associated */
1572 iwl_hw_reg_send_txpower(priv);
1573
1574 /* Update last_temperature to keep is_calib_needed from running
1575 * when it isn't needed... */
1576 priv->last_temperature = priv->temperature;
1577
1578 mutex_unlock(&priv->mutex);
1579 }
1580
1581 /*
1582 * Acquire priv->lock before calling this function !
1583 */
1584 static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
1585 {
1586 iwl_write_restricted(priv, HBUS_TARG_WRPTR,
1587 (index & 0xff) | (txq_id << 8));
1588 iwl_write_restricted_reg(priv, SCD_QUEUE_RDPTR(txq_id), index);
1589 }
1590
1591 /*
1592 * Acquire priv->lock before calling this function !
1593 */
1594 static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
1595 struct iwl_tx_queue *txq,
1596 int tx_fifo_id, int scd_retry)
1597 {
1598 int txq_id = txq->q.id;
1599 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
1600
1601 iwl_write_restricted_reg(priv, SCD_QUEUE_STATUS_BITS(txq_id),
1602 (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) |
1603 (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) |
1604 (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) |
1605 (scd_retry << SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
1606 SCD_QUEUE_STTS_REG_MSK);
1607
1608 txq->sched_retry = scd_retry;
1609
1610 IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
1611 active ? "Activete" : "Deactivate",
1612 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
1613 }
1614
1615 static const u16 default_queue_to_tx_fifo[] = {
1616 IWL_TX_FIFO_AC3,
1617 IWL_TX_FIFO_AC2,
1618 IWL_TX_FIFO_AC1,
1619 IWL_TX_FIFO_AC0,
1620 IWL_CMD_FIFO_NUM,
1621 IWL_TX_FIFO_HCCA_1,
1622 IWL_TX_FIFO_HCCA_2
1623 };
1624
1625 static inline void iwl4965_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
1626 {
1627 set_bit(txq_id, &priv->txq_ctx_active_msk);
1628 }
1629
1630 static inline void iwl4965_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
1631 {
1632 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1633 }
1634
1635 int iwl4965_alive_notify(struct iwl_priv *priv)
1636 {
1637 u32 a;
1638 int i = 0;
1639 unsigned long flags;
1640 int rc;
1641
1642 spin_lock_irqsave(&priv->lock, flags);
1643
1644 #ifdef CONFIG_IWLWIFI_SENSITIVITY
1645 memset(&(priv->sensitivity_data), 0,
1646 sizeof(struct iwl_sensitivity_data));
1647 memset(&(priv->chain_noise_data), 0,
1648 sizeof(struct iwl_chain_noise_data));
1649 for (i = 0; i < NUM_RX_CHAINS; i++)
1650 priv->chain_noise_data.delta_gain_code[i] =
1651 CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
1652 #endif /* CONFIG_IWLWIFI_SENSITIVITY*/
1653 rc = iwl_grab_restricted_access(priv);
1654 if (rc) {
1655 spin_unlock_irqrestore(&priv->lock, flags);
1656 return rc;
1657 }
1658
1659 priv->scd_base_addr = iwl_read_restricted_reg(priv, SCD_SRAM_BASE_ADDR);
1660 a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET;
1661 for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4)
1662 iwl_write_restricted_mem(priv, a, 0);
1663 for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4)
1664 iwl_write_restricted_mem(priv, a, 0);
1665 for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4)
1666 iwl_write_restricted_mem(priv, a, 0);
1667
1668 iwl_write_restricted_reg(priv, SCD_DRAM_BASE_ADDR,
1669 (priv->hw_setting.shared_phys +
1670 offsetof(struct iwl_shared, queues_byte_cnt_tbls)) >> 10);
1671 iwl_write_restricted_reg(priv, SCD_QUEUECHAIN_SEL, 0);
1672
1673 /* initiate the queues */
1674 for (i = 0; i < priv->hw_setting.max_txq_num; i++) {
1675 iwl_write_restricted_reg(priv, SCD_QUEUE_RDPTR(i), 0);
1676 iwl_write_restricted(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
1677 iwl_write_restricted_mem(priv, priv->scd_base_addr +
1678 SCD_CONTEXT_QUEUE_OFFSET(i),
1679 (SCD_WIN_SIZE <<
1680 SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1681 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1682 iwl_write_restricted_mem(priv, priv->scd_base_addr +
1683 SCD_CONTEXT_QUEUE_OFFSET(i) +
1684 sizeof(u32),
1685 (SCD_FRAME_LIMIT <<
1686 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
1687 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1688
1689 }
1690 iwl_write_restricted_reg(priv, SCD_INTERRUPT_MASK,
1691 (1 << priv->hw_setting.max_txq_num) - 1);
1692
1693 iwl_write_restricted_reg(priv, SCD_TXFACT,
1694 SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
1695
1696 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
1697 /* map qos queues to fifos one-to-one */
1698 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
1699 int ac = default_queue_to_tx_fifo[i];
1700 iwl4965_txq_ctx_activate(priv, i);
1701 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
1702 }
1703
1704 iwl_release_restricted_access(priv);
1705 spin_unlock_irqrestore(&priv->lock, flags);
1706
1707 return 0;
1708 }
1709
1710 int iwl_hw_set_hw_setting(struct iwl_priv *priv)
1711 {
1712 priv->hw_setting.shared_virt =
1713 pci_alloc_consistent(priv->pci_dev,
1714 sizeof(struct iwl_shared),
1715 &priv->hw_setting.shared_phys);
1716
1717 if (!priv->hw_setting.shared_virt)
1718 return -1;
1719
1720 memset(priv->hw_setting.shared_virt, 0, sizeof(struct iwl_shared));
1721
1722 priv->hw_setting.max_txq_num = iwl_param_queues_num;
1723 priv->hw_setting.ac_queue_count = AC_NUM;
1724
1725 priv->hw_setting.cck_flag = RATE_MCS_CCK_MSK;
1726 priv->hw_setting.tx_cmd_len = sizeof(struct iwl_tx_cmd);
1727 priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
1728 priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
1729
1730 priv->hw_setting.max_stations = IWL4965_STATION_COUNT;
1731 priv->hw_setting.bcast_sta_id = IWL4965_BROADCAST_ID;
1732 return 0;
1733 }
1734
1735 /**
1736 * iwl_hw_txq_ctx_free - Free TXQ Context
1737 *
1738 * Destroy all TX DMA queues and structures
1739 */
1740 void iwl_hw_txq_ctx_free(struct iwl_priv *priv)
1741 {
1742 int txq_id;
1743
1744 /* Tx queues */
1745 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
1746 iwl_tx_queue_free(priv, &priv->txq[txq_id]);
1747
1748 iwl4965_kw_free(priv);
1749 }
1750
1751 /**
1752 * iwl_hw_txq_free_tfd - Free one TFD, those at index [txq->q.last_used]
1753 *
1754 * Does NOT advance any indexes
1755 */
1756 int iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
1757 {
1758 struct iwl_tfd_frame *bd_tmp = (struct iwl_tfd_frame *)&txq->bd[0];
1759 struct iwl_tfd_frame *bd = &bd_tmp[txq->q.last_used];
1760 struct pci_dev *dev = priv->pci_dev;
1761 int i;
1762 int counter = 0;
1763 int index, is_odd;
1764
1765 /* classify bd */
1766 if (txq->q.id == IWL_CMD_QUEUE_NUM)
1767 /* nothing to cleanup after for host commands */
1768 return 0;
1769
1770 /* sanity check */
1771 counter = IWL_GET_BITS(*bd, num_tbs);
1772 if (counter > MAX_NUM_OF_TBS) {
1773 IWL_ERROR("Too many chunks: %i\n", counter);
1774 /* @todo issue fatal error, it is quite serious situation */
1775 return 0;
1776 }
1777
1778 /* unmap chunks if any */
1779
1780 for (i = 0; i < counter; i++) {
1781 index = i / 2;
1782 is_odd = i & 0x1;
1783
1784 if (is_odd)
1785 pci_unmap_single(
1786 dev,
1787 IWL_GET_BITS(bd->pa[index], tb2_addr_lo16) |
1788 (IWL_GET_BITS(bd->pa[index],
1789 tb2_addr_hi20) << 16),
1790 IWL_GET_BITS(bd->pa[index], tb2_len),
1791 PCI_DMA_TODEVICE);
1792
1793 else if (i > 0)
1794 pci_unmap_single(dev,
1795 le32_to_cpu(bd->pa[index].tb1_addr),
1796 IWL_GET_BITS(bd->pa[index], tb1_len),
1797 PCI_DMA_TODEVICE);
1798
1799 if (txq->txb[txq->q.last_used].skb[i]) {
1800 struct sk_buff *skb = txq->txb[txq->q.last_used].skb[i];
1801
1802 dev_kfree_skb(skb);
1803 txq->txb[txq->q.last_used].skb[i] = NULL;
1804 }
1805 }
1806 return 0;
1807 }
1808
1809 int iwl_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1810 {
1811 IWL_ERROR("TODO: Implement iwl_hw_reg_set_txpower!\n");
1812 return -EINVAL;
1813 }
1814
1815 static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
1816 {
1817 s32 sign = 1;
1818
1819 if (num < 0) {
1820 sign = -sign;
1821 num = -num;
1822 }
1823 if (denom < 0) {
1824 sign = -sign;
1825 denom = -denom;
1826 }
1827 *res = 1;
1828 *res = ((num * 2 + denom) / (denom * 2)) * sign;
1829
1830 return 1;
1831 }
1832
1833 static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
1834 s32 current_voltage)
1835 {
1836 s32 comp = 0;
1837
1838 if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
1839 (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
1840 return 0;
1841
1842 iwl4965_math_div_round(current_voltage - eeprom_voltage,
1843 TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
1844
1845 if (current_voltage > eeprom_voltage)
1846 comp *= 2;
1847 if ((comp < -2) || (comp > 2))
1848 comp = 0;
1849
1850 return comp;
1851 }
1852
1853 static const struct iwl_channel_info *
1854 iwl4965_get_channel_txpower_info(struct iwl_priv *priv, u8 phymode, u16 channel)
1855 {
1856 const struct iwl_channel_info *ch_info;
1857
1858 ch_info = iwl_get_channel_info(priv, phymode, channel);
1859
1860 if (!is_channel_valid(ch_info))
1861 return NULL;
1862
1863 return ch_info;
1864 }
1865
1866 static s32 iwl4965_get_tx_atten_grp(u16 channel)
1867 {
1868 if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
1869 channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
1870 return CALIB_CH_GROUP_5;
1871
1872 if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
1873 channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
1874 return CALIB_CH_GROUP_1;
1875
1876 if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
1877 channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
1878 return CALIB_CH_GROUP_2;
1879
1880 if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
1881 channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
1882 return CALIB_CH_GROUP_3;
1883
1884 if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
1885 channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
1886 return CALIB_CH_GROUP_4;
1887
1888 IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
1889 return -1;
1890 }
1891
1892 static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
1893 {
1894 s32 b = -1;
1895
1896 for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
1897 if (priv->eeprom.calib_info.band_info[b].ch_from == 0)
1898 continue;
1899
1900 if ((channel >= priv->eeprom.calib_info.band_info[b].ch_from)
1901 && (channel <= priv->eeprom.calib_info.band_info[b].ch_to))
1902 break;
1903 }
1904
1905 return b;
1906 }
1907
1908 static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
1909 {
1910 s32 val;
1911
1912 if (x2 == x1)
1913 return y1;
1914 else {
1915 iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
1916 return val + y2;
1917 }
1918 }
1919
1920 static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
1921 struct iwl_eeprom_calib_ch_info *chan_info)
1922 {
1923 s32 s = -1;
1924 u32 c;
1925 u32 m;
1926 const struct iwl_eeprom_calib_measure *m1;
1927 const struct iwl_eeprom_calib_measure *m2;
1928 struct iwl_eeprom_calib_measure *omeas;
1929 u32 ch_i1;
1930 u32 ch_i2;
1931
1932 s = iwl4965_get_sub_band(priv, channel);
1933 if (s >= EEPROM_TX_POWER_BANDS) {
1934 IWL_ERROR("Tx Power can not find channel %d ", channel);
1935 return -1;
1936 }
1937
1938 ch_i1 = priv->eeprom.calib_info.band_info[s].ch1.ch_num;
1939 ch_i2 = priv->eeprom.calib_info.band_info[s].ch2.ch_num;
1940 chan_info->ch_num = (u8) channel;
1941
1942 IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
1943 channel, s, ch_i1, ch_i2);
1944
1945 for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
1946 for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
1947 m1 = &(priv->eeprom.calib_info.band_info[s].ch1.
1948 measurements[c][m]);
1949 m2 = &(priv->eeprom.calib_info.band_info[s].ch2.
1950 measurements[c][m]);
1951 omeas = &(chan_info->measurements[c][m]);
1952
1953 omeas->actual_pow =
1954 (u8) iwl4965_interpolate_value(channel, ch_i1,
1955 m1->actual_pow,
1956 ch_i2,
1957 m2->actual_pow);
1958 omeas->gain_idx =
1959 (u8) iwl4965_interpolate_value(channel, ch_i1,
1960 m1->gain_idx, ch_i2,
1961 m2->gain_idx);
1962 omeas->temperature =
1963 (u8) iwl4965_interpolate_value(channel, ch_i1,
1964 m1->temperature,
1965 ch_i2,
1966 m2->temperature);
1967 omeas->pa_det =
1968 (s8) iwl4965_interpolate_value(channel, ch_i1,
1969 m1->pa_det, ch_i2,
1970 m2->pa_det);
1971
1972 IWL_DEBUG_TXPOWER
1973 ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
1974 m1->actual_pow, m2->actual_pow, omeas->actual_pow);
1975 IWL_DEBUG_TXPOWER
1976 ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
1977 m1->gain_idx, m2->gain_idx, omeas->gain_idx);
1978 IWL_DEBUG_TXPOWER
1979 ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
1980 m1->pa_det, m2->pa_det, omeas->pa_det);
1981 IWL_DEBUG_TXPOWER
1982 ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
1983 m1->temperature, m2->temperature,
1984 omeas->temperature);
1985 }
1986 }
1987
1988 return 0;
1989 }
1990
1991 /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
1992 * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
1993 static s32 back_off_table[] = {
1994 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
1995 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
1996 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
1997 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
1998 10 /* CCK */
1999 };
2000
2001 /* Thermal compensation values for txpower for various frequency ranges ...
2002 * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
2003 static struct iwl_txpower_comp_entry {
2004 s32 degrees_per_05db_a;
2005 s32 degrees_per_05db_a_denom;
2006 } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
2007 {9, 2}, /* group 0 5.2, ch 34-43 */
2008 {4, 1}, /* group 1 5.2, ch 44-70 */
2009 {4, 1}, /* group 2 5.2, ch 71-124 */
2010 {4, 1}, /* group 3 5.2, ch 125-200 */
2011 {3, 1} /* group 4 2.4, ch all */
2012 };
2013
2014 static s32 get_min_power_index(s32 rate_power_index, u32 band)
2015 {
2016 if (!band) {
2017 if ((rate_power_index & 7) <= 4)
2018 return MIN_TX_GAIN_INDEX_52GHZ_EXT;
2019 }
2020 return MIN_TX_GAIN_INDEX;
2021 }
2022
2023 struct gain_entry {
2024 u8 dsp;
2025 u8 radio;
2026 };
2027
2028 static const struct gain_entry gain_table[2][108] = {
2029 /* 5.2GHz power gain index table */
2030 {
2031 {123, 0x3F}, /* highest txpower */
2032 {117, 0x3F},
2033 {110, 0x3F},
2034 {104, 0x3F},
2035 {98, 0x3F},
2036 {110, 0x3E},
2037 {104, 0x3E},
2038 {98, 0x3E},
2039 {110, 0x3D},
2040 {104, 0x3D},
2041 {98, 0x3D},
2042 {110, 0x3C},
2043 {104, 0x3C},
2044 {98, 0x3C},
2045 {110, 0x3B},
2046 {104, 0x3B},
2047 {98, 0x3B},
2048 {110, 0x3A},
2049 {104, 0x3A},
2050 {98, 0x3A},
2051 {110, 0x39},
2052 {104, 0x39},
2053 {98, 0x39},
2054 {110, 0x38},
2055 {104, 0x38},
2056 {98, 0x38},
2057 {110, 0x37},
2058 {104, 0x37},
2059 {98, 0x37},
2060 {110, 0x36},
2061 {104, 0x36},
2062 {98, 0x36},
2063 {110, 0x35},
2064 {104, 0x35},
2065 {98, 0x35},
2066 {110, 0x34},
2067 {104, 0x34},
2068 {98, 0x34},
2069 {110, 0x33},
2070 {104, 0x33},
2071 {98, 0x33},
2072 {110, 0x32},
2073 {104, 0x32},
2074 {98, 0x32},
2075 {110, 0x31},
2076 {104, 0x31},
2077 {98, 0x31},
2078 {110, 0x30},
2079 {104, 0x30},
2080 {98, 0x30},
2081 {110, 0x25},
2082 {104, 0x25},
2083 {98, 0x25},
2084 {110, 0x24},
2085 {104, 0x24},
2086 {98, 0x24},
2087 {110, 0x23},
2088 {104, 0x23},
2089 {98, 0x23},
2090 {110, 0x22},
2091 {104, 0x18},
2092 {98, 0x18},
2093 {110, 0x17},
2094 {104, 0x17},
2095 {98, 0x17},
2096 {110, 0x16},
2097 {104, 0x16},
2098 {98, 0x16},
2099 {110, 0x15},
2100 {104, 0x15},
2101 {98, 0x15},
2102 {110, 0x14},
2103 {104, 0x14},
2104 {98, 0x14},
2105 {110, 0x13},
2106 {104, 0x13},
2107 {98, 0x13},
2108 {110, 0x12},
2109 {104, 0x08},
2110 {98, 0x08},
2111 {110, 0x07},
2112 {104, 0x07},
2113 {98, 0x07},
2114 {110, 0x06},
2115 {104, 0x06},
2116 {98, 0x06},
2117 {110, 0x05},
2118 {104, 0x05},
2119 {98, 0x05},
2120 {110, 0x04},
2121 {104, 0x04},
2122 {98, 0x04},
2123 {110, 0x03},
2124 {104, 0x03},
2125 {98, 0x03},
2126 {110, 0x02},
2127 {104, 0x02},
2128 {98, 0x02},
2129 {110, 0x01},
2130 {104, 0x01},
2131 {98, 0x01},
2132 {110, 0x00},
2133 {104, 0x00},
2134 {98, 0x00},
2135 {93, 0x00},
2136 {88, 0x00},
2137 {83, 0x00},
2138 {78, 0x00},
2139 },
2140 /* 2.4GHz power gain index table */
2141 {
2142 {110, 0x3f}, /* highest txpower */
2143 {104, 0x3f},
2144 {98, 0x3f},
2145 {110, 0x3e},
2146 {104, 0x3e},
2147 {98, 0x3e},
2148 {110, 0x3d},
2149 {104, 0x3d},
2150 {98, 0x3d},
2151 {110, 0x3c},
2152 {104, 0x3c},
2153 {98, 0x3c},
2154 {110, 0x3b},
2155 {104, 0x3b},
2156 {98, 0x3b},
2157 {110, 0x3a},
2158 {104, 0x3a},
2159 {98, 0x3a},
2160 {110, 0x39},
2161 {104, 0x39},
2162 {98, 0x39},
2163 {110, 0x38},
2164 {104, 0x38},
2165 {98, 0x38},
2166 {110, 0x37},
2167 {104, 0x37},
2168 {98, 0x37},
2169 {110, 0x36},
2170 {104, 0x36},
2171 {98, 0x36},
2172 {110, 0x35},
2173 {104, 0x35},
2174 {98, 0x35},
2175 {110, 0x34},
2176 {104, 0x34},
2177 {98, 0x34},
2178 {110, 0x33},
2179 {104, 0x33},
2180 {98, 0x33},
2181 {110, 0x32},
2182 {104, 0x32},
2183 {98, 0x32},
2184 {110, 0x31},
2185 {104, 0x31},
2186 {98, 0x31},
2187 {110, 0x30},
2188 {104, 0x30},
2189 {98, 0x30},
2190 {110, 0x6},
2191 {104, 0x6},
2192 {98, 0x6},
2193 {110, 0x5},
2194 {104, 0x5},
2195 {98, 0x5},
2196 {110, 0x4},
2197 {104, 0x4},
2198 {98, 0x4},
2199 {110, 0x3},
2200 {104, 0x3},
2201 {98, 0x3},
2202 {110, 0x2},
2203 {104, 0x2},
2204 {98, 0x2},
2205 {110, 0x1},
2206 {104, 0x1},
2207 {98, 0x1},
2208 {110, 0x0},
2209 {104, 0x0},
2210 {98, 0x0},
2211 {97, 0},
2212 {96, 0},
2213 {95, 0},
2214 {94, 0},
2215 {93, 0},
2216 {92, 0},
2217 {91, 0},
2218 {90, 0},
2219 {89, 0},
2220 {88, 0},
2221 {87, 0},
2222 {86, 0},
2223 {85, 0},
2224 {84, 0},
2225 {83, 0},
2226 {82, 0},
2227 {81, 0},
2228 {80, 0},
2229 {79, 0},
2230 {78, 0},
2231 {77, 0},
2232 {76, 0},
2233 {75, 0},
2234 {74, 0},
2235 {73, 0},
2236 {72, 0},
2237 {71, 0},
2238 {70, 0},
2239 {69, 0},
2240 {68, 0},
2241 {67, 0},
2242 {66, 0},
2243 {65, 0},
2244 {64, 0},
2245 {63, 0},
2246 {62, 0},
2247 {61, 0},
2248 {60, 0},
2249 {59, 0},
2250 }
2251 };
2252
2253 static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
2254 u8 is_fat, u8 ctrl_chan_high,
2255 struct iwl_tx_power_db *tx_power_tbl)
2256 {
2257 u8 saturation_power;
2258 s32 target_power;
2259 s32 user_target_power;
2260 s32 power_limit;
2261 s32 current_temp;
2262 s32 reg_limit;
2263 s32 current_regulatory;
2264 s32 txatten_grp = CALIB_CH_GROUP_MAX;
2265 int i;
2266 int c;
2267 const struct iwl_channel_info *ch_info = NULL;
2268 struct iwl_eeprom_calib_ch_info ch_eeprom_info;
2269 const struct iwl_eeprom_calib_measure *measurement;
2270 s16 voltage;
2271 s32 init_voltage;
2272 s32 voltage_compensation;
2273 s32 degrees_per_05db_num;
2274 s32 degrees_per_05db_denom;
2275 s32 factory_temp;
2276 s32 temperature_comp[2];
2277 s32 factory_gain_index[2];
2278 s32 factory_actual_pwr[2];
2279 s32 power_index;
2280
2281 /* Sanity check requested level (dBm) */
2282 if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
2283 IWL_WARNING("Requested user TXPOWER %d below limit.\n",
2284 priv->user_txpower_limit);
2285 return -EINVAL;
2286 }
2287 if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
2288 IWL_WARNING("Requested user TXPOWER %d above limit.\n",
2289 priv->user_txpower_limit);
2290 return -EINVAL;
2291 }
2292
2293 /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
2294 * are used for indexing into txpower table) */
2295 user_target_power = 2 * priv->user_txpower_limit;
2296
2297 /* Get current (RXON) channel, band, width */
2298 ch_info =
2299 iwl4965_get_channel_txpower_info(priv, priv->phymode, channel);
2300
2301 IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
2302 is_fat);
2303
2304 if (!ch_info)
2305 return -EINVAL;
2306
2307 /* get txatten group, used to select 1) thermal txpower adjustment
2308 * and 2) mimo txpower balance between Tx chains. */
2309 txatten_grp = iwl4965_get_tx_atten_grp(channel);
2310 if (txatten_grp < 0)
2311 return -EINVAL;
2312
2313 IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
2314 channel, txatten_grp);
2315
2316 if (is_fat) {
2317 if (ctrl_chan_high)
2318 channel -= 2;
2319 else
2320 channel += 2;
2321 }
2322
2323 /* hardware txpower limits ...
2324 * saturation (clipping distortion) txpowers are in half-dBm */
2325 if (band)
2326 saturation_power = priv->eeprom.calib_info.saturation_power24;
2327 else
2328 saturation_power = priv->eeprom.calib_info.saturation_power52;
2329
2330 if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
2331 saturation_power > IWL_TX_POWER_SATURATION_MAX) {
2332 if (band)
2333 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
2334 else
2335 saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
2336 }
2337
2338 /* regulatory txpower limits ... reg_limit values are in half-dBm,
2339 * max_power_avg values are in dBm, convert * 2 */
2340 if (is_fat)
2341 reg_limit = ch_info->fat_max_power_avg * 2;
2342 else
2343 reg_limit = ch_info->max_power_avg * 2;
2344
2345 if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
2346 (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
2347 if (band)
2348 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
2349 else
2350 reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
2351 }
2352
2353 /* Interpolate txpower calibration values for this channel,
2354 * based on factory calibration tests on spaced channels. */
2355 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
2356
2357 /* calculate tx gain adjustment based on power supply voltage */
2358 voltage = priv->eeprom.calib_info.voltage;
2359 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
2360 voltage_compensation =
2361 iwl4965_get_voltage_compensation(voltage, init_voltage);
2362
2363 IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
2364 init_voltage,
2365 voltage, voltage_compensation);
2366
2367 /* get current temperature (Celsius) */
2368 current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
2369 current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
2370 current_temp = KELVIN_TO_CELSIUS(current_temp);
2371
2372 /* select thermal txpower adjustment params, based on channel group
2373 * (same frequency group used for mimo txatten adjustment) */
2374 degrees_per_05db_num =
2375 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
2376 degrees_per_05db_denom =
2377 tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
2378
2379 /* get per-chain txpower values from factory measurements */
2380 for (c = 0; c < 2; c++) {
2381 measurement = &ch_eeprom_info.measurements[c][1];
2382
2383 /* txgain adjustment (in half-dB steps) based on difference
2384 * between factory and current temperature */
2385 factory_temp = measurement->temperature;
2386 iwl4965_math_div_round((current_temp - factory_temp) *
2387 degrees_per_05db_denom,
2388 degrees_per_05db_num,
2389 &temperature_comp[c]);
2390
2391 factory_gain_index[c] = measurement->gain_idx;
2392 factory_actual_pwr[c] = measurement->actual_pow;
2393
2394 IWL_DEBUG_TXPOWER("chain = %d\n", c);
2395 IWL_DEBUG_TXPOWER("fctry tmp %d, "
2396 "curr tmp %d, comp %d steps\n",
2397 factory_temp, current_temp,
2398 temperature_comp[c]);
2399
2400 IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
2401 factory_gain_index[c],
2402 factory_actual_pwr[c]);
2403 }
2404
2405 /* for each of 33 bit-rates (including 1 for CCK) */
2406 for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
2407 u8 is_mimo_rate;
2408 union iwl_tx_power_dual_stream tx_power;
2409
2410 /* for mimo, reduce each chain's txpower by half
2411 * (3dB, 6 steps), so total output power is regulatory
2412 * compliant. */
2413 if (i & 0x8) {
2414 current_regulatory = reg_limit -
2415 IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
2416 is_mimo_rate = 1;
2417 } else {
2418 current_regulatory = reg_limit;
2419 is_mimo_rate = 0;
2420 }
2421
2422 /* find txpower limit, either hardware or regulatory */
2423 power_limit = saturation_power - back_off_table[i];
2424 if (power_limit > current_regulatory)
2425 power_limit = current_regulatory;
2426
2427 /* reduce user's txpower request if necessary
2428 * for this rate on this channel */
2429 target_power = user_target_power;
2430 if (target_power > power_limit)
2431 target_power = power_limit;
2432
2433 IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
2434 i, saturation_power - back_off_table[i],
2435 current_regulatory, user_target_power,
2436 target_power);
2437
2438 /* for each of 2 Tx chains (radio transmitters) */
2439 for (c = 0; c < 2; c++) {
2440 s32 atten_value;
2441
2442 if (is_mimo_rate)
2443 atten_value =
2444 (s32)le32_to_cpu(priv->card_alive_init.
2445 tx_atten[txatten_grp][c]);
2446 else
2447 atten_value = 0;
2448
2449 /* calculate index; higher index means lower txpower */
2450 power_index = (u8) (factory_gain_index[c] -
2451 (target_power -
2452 factory_actual_pwr[c]) -
2453 temperature_comp[c] -
2454 voltage_compensation +
2455 atten_value);
2456
2457 /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
2458 power_index); */
2459
2460 if (power_index < get_min_power_index(i, band))
2461 power_index = get_min_power_index(i, band);
2462
2463 /* adjust 5 GHz index to support negative indexes */
2464 if (!band)
2465 power_index += 9;
2466
2467 /* CCK, rate 32, reduce txpower for CCK */
2468 if (i == POWER_TABLE_CCK_ENTRY)
2469 power_index +=
2470 IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
2471
2472 /* stay within the table! */
2473 if (power_index > 107) {
2474 IWL_WARNING("txpower index %d > 107\n",
2475 power_index);
2476 power_index = 107;
2477 }
2478 if (power_index < 0) {
2479 IWL_WARNING("txpower index %d < 0\n",
2480 power_index);
2481 power_index = 0;
2482 }
2483
2484 /* fill txpower command for this rate/chain */
2485 tx_power.s.radio_tx_gain[c] =
2486 gain_table[band][power_index].radio;
2487 tx_power.s.dsp_predis_atten[c] =
2488 gain_table[band][power_index].dsp;
2489
2490 IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
2491 "gain 0x%02x dsp %d\n",
2492 c, atten_value, power_index,
2493 tx_power.s.radio_tx_gain[c],
2494 tx_power.s.dsp_predis_atten[c]);
2495 }/* for each chain */
2496
2497 tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
2498
2499 }/* for each rate */
2500
2501 return 0;
2502 }
2503
2504 /**
2505 * iwl_hw_reg_send_txpower - Configure the TXPOWER level user limit
2506 *
2507 * Uses the active RXON for channel, band, and characteristics (fat, high)
2508 * The power limit is taken from priv->user_txpower_limit.
2509 */
2510 int iwl_hw_reg_send_txpower(struct iwl_priv *priv)
2511 {
2512 struct iwl_txpowertable_cmd cmd = { 0 };
2513 int rc = 0;
2514 u8 band = 0;
2515 u8 is_fat = 0;
2516 u8 ctrl_chan_high = 0;
2517
2518 if (test_bit(STATUS_SCANNING, &priv->status)) {
2519 /* If this gets hit a lot, switch it to a BUG() and catch
2520 * the stack trace to find out who is calling this during
2521 * a scan. */
2522 IWL_WARNING("TX Power requested while scanning!\n");
2523 return -EAGAIN;
2524 }
2525
2526 band = ((priv->phymode == MODE_IEEE80211B) ||
2527 (priv->phymode == MODE_IEEE80211G));
2528
2529 is_fat = is_fat_channel(priv->active_rxon.flags);
2530
2531 if (is_fat &&
2532 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
2533 ctrl_chan_high = 1;
2534
2535 cmd.band = band;
2536 cmd.channel = priv->active_rxon.channel;
2537
2538 rc = iwl4965_fill_txpower_tbl(priv, band,
2539 le16_to_cpu(priv->active_rxon.channel),
2540 is_fat, ctrl_chan_high, &cmd.tx_power);
2541 if (rc)
2542 return rc;
2543
2544 rc = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
2545 return rc;
2546 }
2547
2548 int iwl_hw_channel_switch(struct iwl_priv *priv, u16 channel)
2549 {
2550 int rc;
2551 u8 band = 0;
2552 u8 is_fat = 0;
2553 u8 ctrl_chan_high = 0;
2554 struct iwl_channel_switch_cmd cmd = { 0 };
2555 const struct iwl_channel_info *ch_info;
2556
2557 band = ((priv->phymode == MODE_IEEE80211B) ||
2558 (priv->phymode == MODE_IEEE80211G));
2559
2560 ch_info = iwl_get_channel_info(priv, priv->phymode, channel);
2561
2562 is_fat = is_fat_channel(priv->staging_rxon.flags);
2563
2564 if (is_fat &&
2565 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
2566 ctrl_chan_high = 1;
2567
2568 cmd.band = band;
2569 cmd.expect_beacon = 0;
2570 cmd.channel = cpu_to_le16(channel);
2571 cmd.rxon_flags = priv->active_rxon.flags;
2572 cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
2573 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
2574 if (ch_info)
2575 cmd.expect_beacon = is_channel_radar(ch_info);
2576 else
2577 cmd.expect_beacon = 1;
2578
2579 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
2580 ctrl_chan_high, &cmd.tx_power);
2581 if (rc) {
2582 IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
2583 return rc;
2584 }
2585
2586 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
2587 return rc;
2588 }
2589
2590 #define RTS_HCCA_RETRY_LIMIT 3
2591 #define RTS_DFAULT_RETRY_LIMIT 60
2592
2593 void iwl_hw_build_tx_cmd_rate(struct iwl_priv *priv,
2594 struct iwl_cmd *cmd,
2595 struct ieee80211_tx_control *ctrl,
2596 struct ieee80211_hdr *hdr, int sta_id,
2597 int is_hcca)
2598 {
2599 u8 rate;
2600 u8 rts_retry_limit = 0;
2601 u8 data_retry_limit = 0;
2602 __le32 tx_flags;
2603 u16 fc = le16_to_cpu(hdr->frame_control);
2604
2605 tx_flags = cmd->cmd.tx.tx_flags;
2606
2607 rate = iwl_rates[ctrl->tx_rate].plcp;
2608
2609 rts_retry_limit = (is_hcca) ?
2610 RTS_HCCA_RETRY_LIMIT : RTS_DFAULT_RETRY_LIMIT;
2611
2612 if (ieee80211_is_probe_response(fc)) {
2613 data_retry_limit = 3;
2614 if (data_retry_limit < rts_retry_limit)
2615 rts_retry_limit = data_retry_limit;
2616 } else
2617 data_retry_limit = IWL_DEFAULT_TX_RETRY;
2618
2619 if (priv->data_retry_limit != -1)
2620 data_retry_limit = priv->data_retry_limit;
2621
2622 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
2623 switch (fc & IEEE80211_FCTL_STYPE) {
2624 case IEEE80211_STYPE_AUTH:
2625 case IEEE80211_STYPE_DEAUTH:
2626 case IEEE80211_STYPE_ASSOC_REQ:
2627 case IEEE80211_STYPE_REASSOC_REQ:
2628 if (tx_flags & TX_CMD_FLG_RTS_MSK) {
2629 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
2630 tx_flags |= TX_CMD_FLG_CTS_MSK;
2631 }
2632 break;
2633 default:
2634 break;
2635 }
2636 }
2637
2638 cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
2639 cmd->cmd.tx.data_retry_limit = data_retry_limit;
2640 cmd->cmd.tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate, 0);
2641 cmd->cmd.tx.tx_flags = tx_flags;
2642 }
2643
2644 int iwl_hw_get_rx_read(struct iwl_priv *priv)
2645 {
2646 struct iwl_shared *shared_data = priv->hw_setting.shared_virt;
2647
2648 return IWL_GET_BITS(*shared_data, rb_closed_stts_rb_num);
2649 }
2650
2651 int iwl_hw_get_temperature(struct iwl_priv *priv)
2652 {
2653 return priv->temperature;
2654 }
2655
2656 unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
2657 struct iwl_frame *frame, u8 rate)
2658 {
2659 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
2660 unsigned int frame_size;
2661
2662 tx_beacon_cmd = &frame->u.beacon;
2663 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2664
2665 tx_beacon_cmd->tx.sta_id = IWL4965_BROADCAST_ID;
2666 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2667
2668 frame_size = iwl_fill_beacon_frame(priv,
2669 tx_beacon_cmd->frame,
2670 BROADCAST_ADDR,
2671 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2672
2673 BUG_ON(frame_size > MAX_MPDU_SIZE);
2674 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2675
2676 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
2677 tx_beacon_cmd->tx.rate_n_flags =
2678 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
2679 else
2680 tx_beacon_cmd->tx.rate_n_flags =
2681 iwl_hw_set_rate_n_flags(rate, 0);
2682
2683 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2684 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
2685 return (sizeof(*tx_beacon_cmd) + frame_size);
2686 }
2687
2688 int iwl_hw_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq)
2689 {
2690 int rc;
2691 unsigned long flags;
2692 int txq_id = txq->q.id;
2693
2694 spin_lock_irqsave(&priv->lock, flags);
2695 rc = iwl_grab_restricted_access(priv);
2696 if (rc) {
2697 spin_unlock_irqrestore(&priv->lock, flags);
2698 return rc;
2699 }
2700
2701 iwl_write_restricted(priv, FH_MEM_CBBC_QUEUE(txq_id),
2702 txq->q.dma_addr >> 8);
2703 iwl_write_restricted(
2704 priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
2705 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
2706 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL);
2707 iwl_release_restricted_access(priv);
2708 spin_unlock_irqrestore(&priv->lock, flags);
2709
2710 return 0;
2711 }
2712
2713 static inline u8 iwl4965_get_dma_hi_address(dma_addr_t addr)
2714 {
2715 return sizeof(addr) > sizeof(u32) ? (addr >> 16) >> 16 : 0;
2716 }
2717
2718 int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *ptr,
2719 dma_addr_t addr, u16 len)
2720 {
2721 int index, is_odd;
2722 struct iwl_tfd_frame *tfd = ptr;
2723 u32 num_tbs = IWL_GET_BITS(*tfd, num_tbs);
2724
2725 if ((num_tbs >= MAX_NUM_OF_TBS) || (num_tbs < 0)) {
2726 IWL_ERROR("Error can not send more than %d chunks\n",
2727 MAX_NUM_OF_TBS);
2728 return -EINVAL;
2729 }
2730
2731 index = num_tbs / 2;
2732 is_odd = num_tbs & 0x1;
2733
2734 if (!is_odd) {
2735 tfd->pa[index].tb1_addr = cpu_to_le32(addr);
2736 IWL_SET_BITS(tfd->pa[index], tb1_addr_hi,
2737 iwl4965_get_dma_hi_address(addr));
2738 IWL_SET_BITS(tfd->pa[index], tb1_len, len);
2739 } else {
2740 IWL_SET_BITS(tfd->pa[index], tb2_addr_lo16,
2741 (u32) (addr & 0xffff));
2742 IWL_SET_BITS(tfd->pa[index], tb2_addr_hi20, addr >> 16);
2743 IWL_SET_BITS(tfd->pa[index], tb2_len, len);
2744 }
2745
2746 IWL_SET_BITS(*tfd, num_tbs, num_tbs + 1);
2747
2748 return 0;
2749 }
2750
2751 void iwl_hw_card_show_info(struct iwl_priv *priv)
2752 {
2753 u16 hw_version = priv->eeprom.board_revision_4965;
2754
2755 IWL_DEBUG_INFO("4965ABGN HW Version %u.%u.%u\n",
2756 ((hw_version >> 8) & 0x0F),
2757 ((hw_version >> 8) >> 4), (hw_version & 0x00FF));
2758
2759 IWL_DEBUG_INFO("4965ABGN PBA Number %.16s\n",
2760 priv->eeprom.board_pba_number_4965);
2761 }
2762
2763 #define IWL_TX_CRC_SIZE 4
2764 #define IWL_TX_DELIMITER_SIZE 4
2765
2766 int iwl4965_tx_queue_update_wr_ptr(struct iwl_priv *priv,
2767 struct iwl_tx_queue *txq, u16 byte_cnt)
2768 {
2769 int len;
2770 int txq_id = txq->q.id;
2771 struct iwl_shared *shared_data = priv->hw_setting.shared_virt;
2772
2773 if (txq->need_update == 0)
2774 return 0;
2775
2776 len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
2777
2778 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2779 tfd_offset[txq->q.first_empty], byte_cnt, len);
2780
2781 if (txq->q.first_empty < IWL4965_MAX_WIN_SIZE)
2782 IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
2783 tfd_offset[IWL4965_QUEUE_SIZE + txq->q.first_empty],
2784 byte_cnt, len);
2785
2786 return 0;
2787 }
2788
2789 /* Set up Rx receiver/antenna/chain usage in "staging" RXON image.
2790 * This should not be used for scan command ... it puts data in wrong place. */
2791 void iwl4965_set_rxon_chain(struct iwl_priv *priv)
2792 {
2793 u8 is_single = is_single_stream(priv);
2794 u8 idle_state, rx_state;
2795
2796 priv->staging_rxon.rx_chain = 0;
2797 rx_state = idle_state = 3;
2798
2799 /* Tell uCode which antennas are actually connected.
2800 * Before first association, we assume all antennas are connected.
2801 * Just after first association, iwl4965_noise_calibration()
2802 * checks which antennas actually *are* connected. */
2803 priv->staging_rxon.rx_chain |=
2804 cpu_to_le16(priv->valid_antenna << RXON_RX_CHAIN_VALID_POS);
2805
2806 /* How many receivers should we use? */
2807 iwl4965_get_rx_chain_counter(priv, &idle_state, &rx_state);
2808 priv->staging_rxon.rx_chain |=
2809 cpu_to_le16(rx_state << RXON_RX_CHAIN_MIMO_CNT_POS);
2810 priv->staging_rxon.rx_chain |=
2811 cpu_to_le16(idle_state << RXON_RX_CHAIN_CNT_POS);
2812
2813 if (!is_single && (rx_state >= 2) &&
2814 !test_bit(STATUS_POWER_PMI, &priv->status))
2815 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
2816 else
2817 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
2818
2819 IWL_DEBUG_ASSOC("rx chain %X\n", priv->staging_rxon.rx_chain);
2820 }
2821
2822 #ifdef CONFIG_IWLWIFI_HT
2823 #ifdef CONFIG_IWLWIFI_HT_AGG
2824 /*
2825 get the traffic load value for tid
2826 */
2827 static u32 iwl4965_tl_get_load(struct iwl_priv *priv, u8 tid)
2828 {
2829 u32 load = 0;
2830 u32 current_time = jiffies_to_msecs(jiffies);
2831 u32 time_diff;
2832 s32 index;
2833 unsigned long flags;
2834 struct iwl_traffic_load *tid_ptr = NULL;
2835
2836 if (tid >= TID_MAX_LOAD_COUNT)
2837 return 0;
2838
2839 tid_ptr = &(priv->lq_mngr.agg_ctrl.traffic_load[tid]);
2840
2841 current_time -= current_time % TID_ROUND_VALUE;
2842
2843 spin_lock_irqsave(&priv->lq_mngr.lock, flags);
2844 if (!(tid_ptr->queue_count))
2845 goto out;
2846
2847 time_diff = TIME_WRAP_AROUND(tid_ptr->time_stamp, current_time);
2848 index = time_diff / TID_QUEUE_CELL_SPACING;
2849
2850 if (index >= TID_QUEUE_MAX_SIZE) {
2851 u32 oldest_time = current_time - TID_MAX_TIME_DIFF;
2852
2853 while (tid_ptr->queue_count &&
2854 (tid_ptr->time_stamp < oldest_time)) {
2855 tid_ptr->total -= tid_ptr->packet_count[tid_ptr->head];
2856 tid_ptr->packet_count[tid_ptr->head] = 0;
2857 tid_ptr->time_stamp += TID_QUEUE_CELL_SPACING;
2858 tid_ptr->queue_count--;
2859 tid_ptr->head++;
2860 if (tid_ptr->head >= TID_QUEUE_MAX_SIZE)
2861 tid_ptr->head = 0;
2862 }
2863 }
2864 load = tid_ptr->total;
2865
2866 out:
2867 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
2868 return load;
2869 }
2870
2871 /*
2872 increment traffic load value for tid and also remove
2873 any old values if passed the certian time period
2874 */
2875 static void iwl4965_tl_add_packet(struct iwl_priv *priv, u8 tid)
2876 {
2877 u32 current_time = jiffies_to_msecs(jiffies);
2878 u32 time_diff;
2879 s32 index;
2880 unsigned long flags;
2881 struct iwl_traffic_load *tid_ptr = NULL;
2882
2883 if (tid >= TID_MAX_LOAD_COUNT)
2884 return;
2885
2886 tid_ptr = &(priv->lq_mngr.agg_ctrl.traffic_load[tid]);
2887
2888 current_time -= current_time % TID_ROUND_VALUE;
2889
2890 spin_lock_irqsave(&priv->lq_mngr.lock, flags);
2891 if (!(tid_ptr->queue_count)) {
2892 tid_ptr->total = 1;
2893 tid_ptr->time_stamp = current_time;
2894 tid_ptr->queue_count = 1;
2895 tid_ptr->head = 0;
2896 tid_ptr->packet_count[0] = 1;
2897 goto out;
2898 }
2899
2900 time_diff = TIME_WRAP_AROUND(tid_ptr->time_stamp, current_time);
2901 index = time_diff / TID_QUEUE_CELL_SPACING;
2902
2903 if (index >= TID_QUEUE_MAX_SIZE) {
2904 u32 oldest_time = current_time - TID_MAX_TIME_DIFF;
2905
2906 while (tid_ptr->queue_count &&
2907 (tid_ptr->time_stamp < oldest_time)) {
2908 tid_ptr->total -= tid_ptr->packet_count[tid_ptr->head];
2909 tid_ptr->packet_count[tid_ptr->head] = 0;
2910 tid_ptr->time_stamp += TID_QUEUE_CELL_SPACING;
2911 tid_ptr->queue_count--;
2912 tid_ptr->head++;
2913 if (tid_ptr->head >= TID_QUEUE_MAX_SIZE)
2914 tid_ptr->head = 0;
2915 }
2916 }
2917
2918 index = (tid_ptr->head + index) % TID_QUEUE_MAX_SIZE;
2919 tid_ptr->packet_count[index] = tid_ptr->packet_count[index] + 1;
2920 tid_ptr->total = tid_ptr->total + 1;
2921
2922 if ((index + 1) > tid_ptr->queue_count)
2923 tid_ptr->queue_count = index + 1;
2924 out:
2925 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
2926
2927 }
2928
2929 #define MMAC_SCHED_MAX_NUMBER_OF_HT_BACK_FLOWS 7
2930 enum HT_STATUS {
2931 BA_STATUS_FAILURE = 0,
2932 BA_STATUS_INITIATOR_DELBA,
2933 BA_STATUS_RECIPIENT_DELBA,
2934 BA_STATUS_RENEW_ADDBA_REQUEST,
2935 BA_STATUS_ACTIVE,
2936 };
2937
2938 static u8 iwl4964_tl_ba_avail(struct iwl_priv *priv)
2939 {
2940 int i;
2941 struct iwl_lq_mngr *lq;
2942 u8 count = 0;
2943 u16 msk;
2944
2945 lq = (struct iwl_lq_mngr *)&(priv->lq_mngr);
2946 for (i = 0; i < TID_MAX_LOAD_COUNT ; i++) {
2947 msk = 1 << i;
2948 if ((lq->agg_ctrl.granted_ba & msk) ||
2949 (lq->agg_ctrl.wait_for_agg_status & msk))
2950 count++;
2951 }
2952
2953 if (count < MMAC_SCHED_MAX_NUMBER_OF_HT_BACK_FLOWS)
2954 return 1;
2955
2956 return 0;
2957 }
2958
2959 static void iwl4965_ba_status(struct iwl_priv *priv,
2960 u8 tid, enum HT_STATUS status);
2961
2962 static int iwl4965_perform_addba(struct iwl_priv *priv, u8 tid, u32 length,
2963 u32 ba_timeout)
2964 {
2965 int rc;
2966
2967 rc = ieee80211_start_BA_session(priv->hw, priv->bssid, tid);
2968 if (rc)
2969 iwl4965_ba_status(priv, tid, BA_STATUS_FAILURE);
2970
2971 return rc;
2972 }
2973
2974 static int iwl4965_perform_delba(struct iwl_priv *priv, u8 tid)
2975 {
2976 int rc;
2977
2978 rc = ieee80211_stop_BA_session(priv->hw, priv->bssid, tid);
2979 if (rc)
2980 iwl4965_ba_status(priv, tid, BA_STATUS_FAILURE);
2981
2982 return rc;
2983 }
2984
2985 static void iwl4965_turn_on_agg_for_tid(struct iwl_priv *priv,
2986 struct iwl_lq_mngr *lq,
2987 u8 auto_agg, u8 tid)
2988 {
2989 u32 tid_msk = (1 << tid);
2990 unsigned long flags;
2991
2992 spin_lock_irqsave(&priv->lq_mngr.lock, flags);
2993 /*
2994 if ((auto_agg) && (!lq->enable_counter)){
2995 lq->agg_ctrl.next_retry = 0;
2996 lq->agg_ctrl.tid_retry = 0;
2997 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
2998 return;
2999 }
3000 */
3001 if (!(lq->agg_ctrl.granted_ba & tid_msk) &&
3002 (lq->agg_ctrl.requested_ba & tid_msk)) {
3003 u8 available_queues;
3004 u32 load;
3005
3006 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
3007 available_queues = iwl4964_tl_ba_avail(priv);
3008 load = iwl4965_tl_get_load(priv, tid);
3009
3010 spin_lock_irqsave(&priv->lq_mngr.lock, flags);
3011 if (!available_queues) {
3012 if (auto_agg)
3013 lq->agg_ctrl.tid_retry |= tid_msk;
3014 else {
3015 lq->agg_ctrl.requested_ba &= ~tid_msk;
3016 lq->agg_ctrl.wait_for_agg_status &= ~tid_msk;
3017 }
3018 } else if ((auto_agg) &&
3019 ((load <= lq->agg_ctrl.tid_traffic_load_threshold) ||
3020 ((lq->agg_ctrl.wait_for_agg_status & tid_msk))))
3021 lq->agg_ctrl.tid_retry |= tid_msk;
3022 else {
3023 lq->agg_ctrl.wait_for_agg_status |= tid_msk;
3024 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
3025 iwl4965_perform_addba(priv, tid, 0x40,
3026 lq->agg_ctrl.ba_timeout);
3027 spin_lock_irqsave(&priv->lq_mngr.lock, flags);
3028 }
3029 }
3030 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
3031 }
3032
3033 static void iwl4965_turn_on_agg(struct iwl_priv *priv, u8 tid)
3034 {
3035 struct iwl_lq_mngr *lq;
3036 unsigned long flags;
3037
3038 lq = (struct iwl_lq_mngr *)&(priv->lq_mngr);
3039
3040 if ((tid < TID_MAX_LOAD_COUNT))
3041 iwl4965_turn_on_agg_for_tid(priv, lq, lq->agg_ctrl.auto_agg,
3042 tid);
3043 else if (tid == TID_ALL_SPECIFIED) {
3044 if (lq->agg_ctrl.requested_ba) {
3045 for (tid = 0; tid < TID_MAX_LOAD_COUNT; tid++)
3046 iwl4965_turn_on_agg_for_tid(priv, lq,
3047 lq->agg_ctrl.auto_agg, tid);
3048 } else {
3049 spin_lock_irqsave(&priv->lq_mngr.lock, flags);
3050 lq->agg_ctrl.tid_retry = 0;
3051 lq->agg_ctrl.next_retry = 0;
3052 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
3053 }
3054 }
3055
3056 }
3057
3058 void iwl4965_turn_off_agg(struct iwl_priv *priv, u8 tid)
3059 {
3060 u32 tid_msk;
3061 struct iwl_lq_mngr *lq;
3062 unsigned long flags;
3063
3064 lq = (struct iwl_lq_mngr *)&(priv->lq_mngr);
3065
3066 if ((tid < TID_MAX_LOAD_COUNT)) {
3067 tid_msk = 1 << tid;
3068 spin_lock_irqsave(&priv->lq_mngr.lock, flags);
3069 lq->agg_ctrl.wait_for_agg_status |= tid_msk;
3070 lq->agg_ctrl.requested_ba &= ~tid_msk;
3071 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
3072 iwl4965_perform_delba(priv, tid);
3073 } else if (tid == TID_ALL_SPECIFIED) {
3074 spin_lock_irqsave(&priv->lq_mngr.lock, flags);
3075 for (tid = 0; tid < TID_MAX_LOAD_COUNT; tid++) {
3076 tid_msk = 1 << tid;
3077 lq->agg_ctrl.wait_for_agg_status |= tid_msk;
3078 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
3079 iwl4965_perform_delba(priv, tid);
3080 spin_lock_irqsave(&priv->lq_mngr.lock, flags);
3081 }
3082 lq->agg_ctrl.requested_ba = 0;
3083 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
3084 }
3085 }
3086
3087 static void iwl4965_ba_status(struct iwl_priv *priv,
3088 u8 tid, enum HT_STATUS status)
3089 {
3090 struct iwl_lq_mngr *lq;
3091 u32 tid_msk = (1 << tid);
3092 unsigned long flags;
3093
3094 lq = (struct iwl_lq_mngr *)&(priv->lq_mngr);
3095
3096 if ((tid >= TID_MAX_LOAD_COUNT))
3097 goto out;
3098
3099 spin_lock_irqsave(&priv->lq_mngr.lock, flags);
3100 switch (status) {
3101 case BA_STATUS_ACTIVE:
3102 if (!(lq->agg_ctrl.granted_ba & tid_msk))
3103 lq->agg_ctrl.granted_ba |= tid_msk;
3104 break;
3105 default:
3106 if ((lq->agg_ctrl.granted_ba & tid_msk))
3107 lq->agg_ctrl.granted_ba &= ~tid_msk;
3108 break;
3109 }
3110
3111 lq->agg_ctrl.wait_for_agg_status &= ~tid_msk;
3112 if (status != BA_STATUS_ACTIVE) {
3113 if (lq->agg_ctrl.auto_agg) {
3114 lq->agg_ctrl.tid_retry |= tid_msk;
3115 lq->agg_ctrl.next_retry =
3116 jiffies + msecs_to_jiffies(500);
3117 } else
3118 lq->agg_ctrl.requested_ba &= ~tid_msk;
3119 }
3120 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
3121 out:
3122 return;
3123 }
3124
3125 static void iwl4965_bg_agg_work(struct work_struct *work)
3126 {
3127 struct iwl_priv *priv = container_of(work, struct iwl_priv,
3128 agg_work);
3129
3130 u32 tid;
3131 u32 retry_tid;
3132 u32 tid_msk;
3133 unsigned long flags;
3134 struct iwl_lq_mngr *lq = (struct iwl_lq_mngr *)&(priv->lq_mngr);
3135
3136 spin_lock_irqsave(&priv->lq_mngr.lock, flags);
3137 retry_tid = lq->agg_ctrl.tid_retry;
3138 lq->agg_ctrl.tid_retry = 0;
3139 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
3140
3141 if (retry_tid == TID_ALL_SPECIFIED)
3142 iwl4965_turn_on_agg(priv, TID_ALL_SPECIFIED);
3143 else {
3144 for (tid = 0; tid < TID_MAX_LOAD_COUNT; tid++) {
3145 tid_msk = (1 << tid);
3146 if (retry_tid & tid_msk)
3147 iwl4965_turn_on_agg(priv, tid);
3148 }
3149 }
3150
3151 spin_lock_irqsave(&priv->lq_mngr.lock, flags);
3152 if (lq->agg_ctrl.tid_retry)
3153 lq->agg_ctrl.next_retry = jiffies + msecs_to_jiffies(500);
3154 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
3155 return;
3156 }
3157 #endif /*CONFIG_IWLWIFI_HT_AGG */
3158 #endif /* CONFIG_IWLWIFI_HT */
3159
3160 int iwl4965_tx_cmd(struct iwl_priv *priv, struct iwl_cmd *out_cmd,
3161 u8 sta_id, dma_addr_t txcmd_phys,
3162 struct ieee80211_hdr *hdr, u8 hdr_len,
3163 struct ieee80211_tx_control *ctrl, void *sta_in)
3164 {
3165 struct iwl_tx_cmd cmd;
3166 struct iwl_tx_cmd *tx = (struct iwl_tx_cmd *)&out_cmd->cmd.payload[0];
3167 dma_addr_t scratch_phys;
3168 u8 unicast = 0;
3169 u8 is_data = 1;
3170 u16 fc;
3171 u16 rate_flags;
3172 int rate_index = min(ctrl->tx_rate & 0xffff, IWL_RATE_COUNT - 1);
3173 #ifdef CONFIG_IWLWIFI_HT
3174 #ifdef CONFIG_IWLWIFI_HT_AGG
3175 __le16 *qc;
3176 #endif /*CONFIG_IWLWIFI_HT_AGG */
3177 #endif /* CONFIG_IWLWIFI_HT */
3178
3179 unicast = !is_multicast_ether_addr(hdr->addr1);
3180
3181 fc = le16_to_cpu(hdr->frame_control);
3182 if ((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA)
3183 is_data = 0;
3184
3185 memcpy(&cmd, &(out_cmd->cmd.tx), sizeof(struct iwl_tx_cmd));
3186 memset(tx, 0, sizeof(struct iwl_tx_cmd));
3187 memcpy(tx->hdr, hdr, hdr_len);
3188
3189 tx->len = cmd.len;
3190 tx->driver_txop = cmd.driver_txop;
3191 tx->stop_time.life_time = cmd.stop_time.life_time;
3192 tx->tx_flags = cmd.tx_flags;
3193 tx->sta_id = cmd.sta_id;
3194 tx->tid_tspec = cmd.tid_tspec;
3195 tx->timeout.pm_frame_timeout = cmd.timeout.pm_frame_timeout;
3196 tx->next_frame_len = cmd.next_frame_len;
3197
3198 tx->sec_ctl = cmd.sec_ctl;
3199 memcpy(&(tx->key[0]), &(cmd.key[0]), 16);
3200 tx->tx_flags = cmd.tx_flags;
3201
3202 tx->rts_retry_limit = cmd.rts_retry_limit;
3203 tx->data_retry_limit = cmd.data_retry_limit;
3204
3205 scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
3206 offsetof(struct iwl_tx_cmd, scratch);
3207 tx->dram_lsb_ptr = cpu_to_le32(scratch_phys);
3208 tx->dram_msb_ptr = iwl4965_get_dma_hi_address(scratch_phys);
3209
3210 /* Hard coded to start at the highest retry fallback position
3211 * until the 4965 specific rate control algorithm is tied in */
3212 tx->initial_rate_index = LINK_QUAL_MAX_RETRY_NUM - 1;
3213
3214 /* Alternate between antenna A and B for successive frames */
3215 if (priv->use_ant_b_for_management_frame) {
3216 priv->use_ant_b_for_management_frame = 0;
3217 rate_flags = RATE_MCS_ANT_B_MSK;
3218 } else {
3219 priv->use_ant_b_for_management_frame = 1;
3220 rate_flags = RATE_MCS_ANT_A_MSK;
3221 }
3222
3223 if (!unicast || !is_data) {
3224 if ((rate_index >= IWL_FIRST_CCK_RATE) &&
3225 (rate_index <= IWL_LAST_CCK_RATE))
3226 rate_flags |= RATE_MCS_CCK_MSK;
3227 } else {
3228 tx->initial_rate_index = 0;
3229 tx->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
3230 }
3231
3232 tx->rate_n_flags = iwl_hw_set_rate_n_flags(iwl_rates[rate_index].plcp,
3233 rate_flags);
3234
3235 if (ieee80211_is_back_request(fc))
3236 tx->tx_flags |= TX_CMD_FLG_ACK_MSK |
3237 TX_CMD_FLG_IMM_BA_RSP_MASK;
3238 #ifdef CONFIG_IWLWIFI_HT
3239 #ifdef CONFIG_IWLWIFI_HT_AGG
3240 qc = ieee80211_get_qos_ctrl(hdr);
3241 if (qc &&
3242 (priv->iw_mode != IEEE80211_IF_TYPE_IBSS)) {
3243 u8 tid = 0;
3244 tid = (u8) (le16_to_cpu(*qc) & 0xF);
3245 if (tid < TID_MAX_LOAD_COUNT)
3246 iwl4965_tl_add_packet(priv, tid);
3247 }
3248
3249 if (priv->lq_mngr.agg_ctrl.next_retry &&
3250 (time_after(priv->lq_mngr.agg_ctrl.next_retry, jiffies))) {
3251 unsigned long flags;
3252
3253 spin_lock_irqsave(&priv->lq_mngr.lock, flags);
3254 priv->lq_mngr.agg_ctrl.next_retry = 0;
3255 spin_unlock_irqrestore(&priv->lq_mngr.lock, flags);
3256 schedule_work(&priv->agg_work);
3257 }
3258 #endif
3259 #endif
3260 return 0;
3261 }
3262
3263 /**
3264 * sign_extend - Sign extend a value using specified bit as sign-bit
3265 *
3266 * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
3267 * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
3268 *
3269 * @param oper value to sign extend
3270 * @param index 0 based bit index (0<=index<32) to sign bit
3271 */
3272 static s32 sign_extend(u32 oper, int index)
3273 {
3274 u8 shift = 31 - index;
3275
3276 return (s32)(oper << shift) >> shift;
3277 }
3278
3279 /**
3280 * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
3281 * @statistics: Provides the temperature reading from the uCode
3282 *
3283 * A return of <0 indicates bogus data in the statistics
3284 */
3285 int iwl4965_get_temperature(const struct iwl_priv *priv)
3286 {
3287 s32 temperature;
3288 s32 vt;
3289 s32 R1, R2, R3;
3290 u32 R4;
3291
3292 if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
3293 (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
3294 IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
3295 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
3296 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
3297 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
3298 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
3299 } else {
3300 IWL_DEBUG_TEMP("Running temperature calibration\n");
3301 R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
3302 R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
3303 R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
3304 R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
3305 }
3306
3307 /*
3308 * Temperature is only 23 bits so sign extend out to 32
3309 *
3310 * NOTE If we haven't received a statistics notification yet
3311 * with an updated temperature, use R4 provided to us in the
3312 * ALIVE response. */
3313 if (!test_bit(STATUS_TEMPERATURE, &priv->status))
3314 vt = sign_extend(R4, 23);
3315 else
3316 vt = sign_extend(
3317 le32_to_cpu(priv->statistics.general.temperature), 23);
3318
3319 IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
3320 R1, R2, R3, vt);
3321
3322 if (R3 == R1) {
3323 IWL_ERROR("Calibration conflict R1 == R3\n");
3324 return -1;
3325 }
3326
3327 /* Calculate temperature in degrees Kelvin, adjust by 97%.
3328 * Add offset to center the adjustment around 0 degrees Centigrade. */
3329 temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
3330 temperature /= (R3 - R1);
3331 temperature = (temperature * 97) / 100 +
3332 TEMPERATURE_CALIB_KELVIN_OFFSET;
3333
3334 IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
3335 KELVIN_TO_CELSIUS(temperature));
3336
3337 return temperature;
3338 }
3339
3340 /* Adjust Txpower only if temperature variance is greater than threshold. */
3341 #define IWL_TEMPERATURE_THRESHOLD 3
3342
3343 /**
3344 * iwl4965_is_temp_calib_needed - determines if new calibration is needed
3345 *
3346 * If the temperature changed has changed sufficiently, then a recalibration
3347 * is needed.
3348 *
3349 * Assumes caller will replace priv->last_temperature once calibration
3350 * executed.
3351 */
3352 static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
3353 {
3354 int temp_diff;
3355
3356 if (!test_bit(STATUS_STATISTICS, &priv->status)) {
3357 IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
3358 return 0;
3359 }
3360
3361 temp_diff = priv->temperature - priv->last_temperature;
3362
3363 /* get absolute value */
3364 if (temp_diff < 0) {
3365 IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
3366 temp_diff = -temp_diff;
3367 } else if (temp_diff == 0)
3368 IWL_DEBUG_POWER("Same temp, \n");
3369 else
3370 IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
3371
3372 if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
3373 IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
3374 return 0;
3375 }
3376
3377 IWL_DEBUG_POWER("Thermal txpower calib needed\n");
3378
3379 return 1;
3380 }
3381
3382 /* Calculate noise level, based on measurements during network silence just
3383 * before arriving beacon. This measurement can be done only if we know
3384 * exactly when to expect beacons, therefore only when we're associated. */
3385 static void iwl4965_rx_calc_noise(struct iwl_priv *priv)
3386 {
3387 struct statistics_rx_non_phy *rx_info
3388 = &(priv->statistics.rx.general);
3389 int num_active_rx = 0;
3390 int total_silence = 0;
3391 int bcn_silence_a =
3392 le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
3393 int bcn_silence_b =
3394 le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
3395 int bcn_silence_c =
3396 le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
3397
3398 if (bcn_silence_a) {
3399 total_silence += bcn_silence_a;
3400 num_active_rx++;
3401 }
3402 if (bcn_silence_b) {
3403 total_silence += bcn_silence_b;
3404 num_active_rx++;
3405 }
3406 if (bcn_silence_c) {
3407 total_silence += bcn_silence_c;
3408 num_active_rx++;
3409 }
3410
3411 /* Average among active antennas */
3412 if (num_active_rx)
3413 priv->last_rx_noise = (total_silence / num_active_rx) - 107;
3414 else
3415 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3416
3417 IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
3418 bcn_silence_a, bcn_silence_b, bcn_silence_c,
3419 priv->last_rx_noise);
3420 }
3421
3422 void iwl_hw_rx_statistics(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
3423 {
3424 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3425 int change;
3426 s32 temp;
3427
3428 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
3429 (int)sizeof(priv->statistics), pkt->len);
3430
3431 change = ((priv->statistics.general.temperature !=
3432 pkt->u.stats.general.temperature) ||
3433 ((priv->statistics.flag &
3434 STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
3435 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
3436
3437 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
3438
3439 set_bit(STATUS_STATISTICS, &priv->status);
3440
3441 /* Reschedule the statistics timer to occur in
3442 * REG_RECALIB_PERIOD seconds to ensure we get a
3443 * thermal update even if the uCode doesn't give
3444 * us one */
3445 mod_timer(&priv->statistics_periodic, jiffies +
3446 msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
3447
3448 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
3449 (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
3450 iwl4965_rx_calc_noise(priv);
3451 #ifdef CONFIG_IWLWIFI_SENSITIVITY
3452 queue_work(priv->workqueue, &priv->sensitivity_work);
3453 #endif
3454 }
3455
3456 /* If the hardware hasn't reported a change in
3457 * temperature then don't bother computing a
3458 * calibrated temperature value */
3459 if (!change)
3460 return;
3461
3462 temp = iwl4965_get_temperature(priv);
3463 if (temp < 0)
3464 return;
3465
3466 if (priv->temperature != temp) {
3467 if (priv->temperature)
3468 IWL_DEBUG_TEMP("Temperature changed "
3469 "from %dC to %dC\n",
3470 KELVIN_TO_CELSIUS(priv->temperature),
3471 KELVIN_TO_CELSIUS(temp));
3472 else
3473 IWL_DEBUG_TEMP("Temperature "
3474 "initialized to %dC\n",
3475 KELVIN_TO_CELSIUS(temp));
3476 }
3477
3478 priv->temperature = temp;
3479 set_bit(STATUS_TEMPERATURE, &priv->status);
3480
3481 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
3482 iwl4965_is_temp_calib_needed(priv))
3483 queue_work(priv->workqueue, &priv->txpower_work);
3484 }
3485
3486 static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
3487 int include_phy,
3488 struct iwl_rx_mem_buffer *rxb,
3489 struct ieee80211_rx_status *stats)
3490 {
3491 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
3492 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
3493 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
3494 struct ieee80211_hdr *hdr;
3495 u16 len;
3496 __le32 *rx_end;
3497 unsigned int skblen;
3498 u32 ampdu_status;
3499
3500 if (!include_phy && priv->last_phy_res[0])
3501 rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
3502
3503 if (!rx_start) {
3504 IWL_ERROR("MPDU frame without a PHY data\n");
3505 return;
3506 }
3507 if (include_phy) {
3508 hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
3509 rx_start->cfg_phy_cnt);
3510
3511 len = le16_to_cpu(rx_start->byte_count);
3512
3513 rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
3514 sizeof(struct iwl4965_rx_phy_res) +
3515 rx_start->cfg_phy_cnt + len);
3516
3517 } else {
3518 struct iwl4965_rx_mpdu_res_start *amsdu =
3519 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
3520
3521 hdr = (struct ieee80211_hdr *)(pkt->u.raw +
3522 sizeof(struct iwl4965_rx_mpdu_res_start));
3523 len = le16_to_cpu(amsdu->byte_count);
3524 rx_start->byte_count = amsdu->byte_count;
3525 rx_end = (__le32 *) (((u8 *) hdr) + len);
3526 }
3527 if (len > 2342 || len < 16) {
3528 IWL_DEBUG_DROP("byte count out of range [16,2342]"
3529 " : %d\n", len);
3530 return;
3531 }
3532
3533 ampdu_status = le32_to_cpu(*rx_end);
3534 skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
3535
3536 /* start from MAC */
3537 skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
3538 skb_put(rxb->skb, len); /* end where data ends */
3539
3540 /* We only process data packets if the interface is open */
3541 if (unlikely(!priv->is_open)) {
3542 IWL_DEBUG_DROP_LIMIT
3543 ("Dropping packet while interface is not open.\n");
3544 return;
3545 }
3546
3547 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
3548 if (iwl_param_hwcrypto)
3549 iwl_set_decrypted_flag(priv, rxb->skb,
3550 ampdu_status, stats);
3551 iwl_handle_data_packet_monitor(priv, rxb, hdr, len, stats, 0);
3552 return;
3553 }
3554
3555 stats->flag = 0;
3556 hdr = (struct ieee80211_hdr *)rxb->skb->data;
3557
3558 if (iwl_param_hwcrypto)
3559 iwl_set_decrypted_flag(priv, rxb->skb, ampdu_status, stats);
3560
3561 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
3562 priv->alloc_rxb_skb--;
3563 rxb->skb = NULL;
3564 #ifdef LED
3565 priv->led_packets += len;
3566 iwl_setup_activity_timer(priv);
3567 #endif
3568 }
3569
3570 /* Calc max signal level (dBm) among 3 possible receivers */
3571 static int iwl4965_calc_rssi(struct iwl4965_rx_phy_res *rx_resp)
3572 {
3573 /* data from PHY/DSP regarding signal strength, etc.,
3574 * contents are always there, not configurable by host. */
3575 struct iwl4965_rx_non_cfg_phy *ncphy =
3576 (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
3577 u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
3578 >> IWL_AGC_DB_POS;
3579
3580 u32 valid_antennae =
3581 (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
3582 >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
3583 u8 max_rssi = 0;
3584 u32 i;
3585
3586 /* Find max rssi among 3 possible receivers.
3587 * These values are measured by the digital signal processor (DSP).
3588 * They should stay fairly constant even as the signal strength varies,
3589 * if the radio's automatic gain control (AGC) is working right.
3590 * AGC value (see below) will provide the "interesting" info. */
3591 for (i = 0; i < 3; i++)
3592 if (valid_antennae & (1 << i))
3593 max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
3594
3595 IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
3596 ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
3597 max_rssi, agc);
3598
3599 /* dBm = max_rssi dB - agc dB - constant.
3600 * Higher AGC (higher radio gain) means lower signal. */
3601 return (max_rssi - agc - IWL_RSSI_OFFSET);
3602 }
3603
3604 #ifdef CONFIG_IWLWIFI_HT
3605
3606 /* Parsed Information Elements */
3607 struct ieee802_11_elems {
3608 u8 *ds_params;
3609 u8 ds_params_len;
3610 u8 *tim;
3611 u8 tim_len;
3612 u8 *ibss_params;
3613 u8 ibss_params_len;
3614 u8 *erp_info;
3615 u8 erp_info_len;
3616 u8 *ht_cap_param;
3617 u8 ht_cap_param_len;
3618 u8 *ht_extra_param;
3619 u8 ht_extra_param_len;
3620 };
3621
3622 static int parse_elems(u8 *start, size_t len, struct ieee802_11_elems *elems)
3623 {
3624 size_t left = len;
3625 u8 *pos = start;
3626 int unknown = 0;
3627
3628 memset(elems, 0, sizeof(*elems));
3629
3630 while (left >= 2) {
3631 u8 id, elen;
3632
3633 id = *pos++;
3634 elen = *pos++;
3635 left -= 2;
3636
3637 if (elen > left)
3638 return -1;
3639
3640 switch (id) {
3641 case WLAN_EID_DS_PARAMS:
3642 elems->ds_params = pos;
3643 elems->ds_params_len = elen;
3644 break;
3645 case WLAN_EID_TIM:
3646 elems->tim = pos;
3647 elems->tim_len = elen;
3648 break;
3649 case WLAN_EID_IBSS_PARAMS:
3650 elems->ibss_params = pos;
3651 elems->ibss_params_len = elen;
3652 break;
3653 case WLAN_EID_ERP_INFO:
3654 elems->erp_info = pos;
3655 elems->erp_info_len = elen;
3656 break;
3657 case WLAN_EID_HT_CAPABILITY:
3658 elems->ht_cap_param = pos;
3659 elems->ht_cap_param_len = elen;
3660 break;
3661 case WLAN_EID_HT_EXTRA_INFO:
3662 elems->ht_extra_param = pos;
3663 elems->ht_extra_param_len = elen;
3664 break;
3665 default:
3666 unknown++;
3667 break;
3668 }
3669
3670 left -= elen;
3671 pos += elen;
3672 }
3673
3674 return 0;
3675 }
3676 #endif /* CONFIG_IWLWIFI_HT */
3677
3678 static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
3679 {
3680 unsigned long flags;
3681
3682 spin_lock_irqsave(&priv->sta_lock, flags);
3683 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
3684 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
3685 priv->stations[sta_id].sta.sta.modify_mask = 0;
3686 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
3687 spin_unlock_irqrestore(&priv->sta_lock, flags);
3688
3689 iwl_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
3690 }
3691
3692 static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
3693 {
3694 /* FIXME: need locking over ps_status ??? */
3695 u8 sta_id = iwl_hw_find_station(priv, addr);
3696
3697 if (sta_id != IWL_INVALID_STATION) {
3698 u8 sta_awake = priv->stations[sta_id].
3699 ps_status == STA_PS_STATUS_WAKE;
3700
3701 if (sta_awake && ps_bit)
3702 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
3703 else if (!sta_awake && !ps_bit) {
3704 iwl4965_sta_modify_ps_wake(priv, sta_id);
3705 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
3706 }
3707 }
3708 }
3709
3710 /* Called for REPLY_4965_RX (legacy ABG frames), or
3711 * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
3712 static void iwl4965_rx_reply_rx(struct iwl_priv *priv,
3713 struct iwl_rx_mem_buffer *rxb)
3714 {
3715 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3716 /* Use phy data (Rx signal strength, etc.) contained within
3717 * this rx packet for legacy frames,
3718 * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
3719 int include_phy = (pkt->hdr.cmd == REPLY_4965_RX);
3720 struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
3721 (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
3722 (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
3723 __le32 *rx_end;
3724 unsigned int len = 0;
3725 struct ieee80211_hdr *header;
3726 u16 fc;
3727 struct ieee80211_rx_status stats = {
3728 .mactime = le64_to_cpu(rx_start->timestamp),
3729 .channel = le16_to_cpu(rx_start->channel),
3730 .phymode =
3731 (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
3732 MODE_IEEE80211G : MODE_IEEE80211A,
3733 .antenna = 0,
3734 .rate = iwl_hw_get_rate(rx_start->rate_n_flags),
3735 .flag = 0,
3736 #ifdef CONFIG_IWLWIFI_HT_AGG
3737 .ordered = 0
3738 #endif /* CONFIG_IWLWIFI_HT_AGG */
3739 };
3740 u8 network_packet;
3741
3742 if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
3743 IWL_DEBUG_DROP
3744 ("dsp size out of range [0,20]: "
3745 "%d/n", rx_start->cfg_phy_cnt);
3746 return;
3747 }
3748 if (!include_phy) {
3749 if (priv->last_phy_res[0])
3750 rx_start = (struct iwl4965_rx_phy_res *)
3751 &priv->last_phy_res[1];
3752 else
3753 rx_start = NULL;
3754 }
3755
3756 if (!rx_start) {
3757 IWL_ERROR("MPDU frame without a PHY data\n");
3758 return;
3759 }
3760
3761 if (include_phy) {
3762 header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
3763 + rx_start->cfg_phy_cnt);
3764
3765 len = le16_to_cpu(rx_start->byte_count);
3766 rx_end = (__le32 *) (pkt->u.raw + rx_start->cfg_phy_cnt +
3767 sizeof(struct iwl4965_rx_phy_res) + len);
3768 } else {
3769 struct iwl4965_rx_mpdu_res_start *amsdu =
3770 (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
3771
3772 header = (void *)(pkt->u.raw +
3773 sizeof(struct iwl4965_rx_mpdu_res_start));
3774 len = le16_to_cpu(amsdu->byte_count);
3775 rx_end = (__le32 *) (pkt->u.raw +
3776 sizeof(struct iwl4965_rx_mpdu_res_start) + len);
3777 }
3778
3779 if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
3780 !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
3781 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
3782 le32_to_cpu(*rx_end));
3783 return;
3784 }
3785
3786 priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
3787
3788 stats.freq = ieee80211chan2mhz(stats.channel);
3789
3790 /* Find max signal strength (dBm) among 3 antenna/receiver chains */
3791 stats.ssi = iwl4965_calc_rssi(rx_start);
3792
3793 /* Meaningful noise values are available only from beacon statistics,
3794 * which are gathered only when associated, and indicate noise
3795 * only for the associated network channel ...
3796 * Ignore these noise values while scanning (other channels) */
3797 if (iwl_is_associated(priv) &&
3798 !test_bit(STATUS_SCANNING, &priv->status)) {
3799 stats.noise = priv->last_rx_noise;
3800 stats.signal = iwl_calc_sig_qual(stats.ssi, stats.noise);
3801 } else {
3802 stats.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3803 stats.signal = iwl_calc_sig_qual(stats.ssi, 0);
3804 }
3805
3806 /* Reset beacon noise level if not associated. */
3807 if (!iwl_is_associated(priv))
3808 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
3809
3810 #ifdef CONFIG_IWLWIFI_DEBUG
3811 /* TODO: Parts of iwl_report_frame are broken for 4965 */
3812 if (iwl_debug_level & (IWL_DL_RX))
3813 /* Set "1" to report good data frames in groups of 100 */
3814 iwl_report_frame(priv, pkt, header, 1);
3815
3816 if (iwl_debug_level & (IWL_DL_RX | IWL_DL_STATS))
3817 IWL_DEBUG_RX("Rssi %d, noise %d, qual %d, TSF %lu\n",
3818 stats.ssi, stats.noise, stats.signal,
3819 (long unsigned int)le64_to_cpu(rx_start->timestamp));
3820 #endif
3821
3822 network_packet = iwl_is_network_packet(priv, header);
3823 if (network_packet) {
3824 priv->last_rx_rssi = stats.ssi;
3825 priv->last_beacon_time = priv->ucode_beacon_time;
3826 priv->last_tsf = le64_to_cpu(rx_start->timestamp);
3827 }
3828
3829 fc = le16_to_cpu(header->frame_control);
3830 switch (fc & IEEE80211_FCTL_FTYPE) {
3831 case IEEE80211_FTYPE_MGMT:
3832
3833 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
3834 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
3835 header->addr2);
3836 switch (fc & IEEE80211_FCTL_STYPE) {
3837 case IEEE80211_STYPE_PROBE_RESP:
3838 case IEEE80211_STYPE_BEACON:
3839 if ((priv->iw_mode == IEEE80211_IF_TYPE_STA &&
3840 !compare_ether_addr(header->addr2, priv->bssid)) ||
3841 (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
3842 !compare_ether_addr(header->addr3, priv->bssid))) {
3843 struct ieee80211_mgmt *mgmt =
3844 (struct ieee80211_mgmt *)header;
3845 u64 timestamp =
3846 le64_to_cpu(mgmt->u.beacon.timestamp);
3847
3848 priv->timestamp0 = timestamp & 0xFFFFFFFF;
3849 priv->timestamp1 =
3850 (timestamp >> 32) & 0xFFFFFFFF;
3851 priv->beacon_int = le16_to_cpu(
3852 mgmt->u.beacon.beacon_int);
3853 if (priv->call_post_assoc_from_beacon &&
3854 (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
3855 priv->call_post_assoc_from_beacon = 0;
3856 queue_work(priv->workqueue,
3857 &priv->post_associate.work);
3858 }
3859 }
3860 break;
3861
3862 case IEEE80211_STYPE_ACTION:
3863 break;
3864
3865 /*
3866 * TODO: There is no callback function from upper
3867 * stack to inform us when associated status. this
3868 * work around to sniff assoc_resp management frame
3869 * and finish the association process.
3870 */
3871 case IEEE80211_STYPE_ASSOC_RESP:
3872 case IEEE80211_STYPE_REASSOC_RESP:
3873 if (network_packet) {
3874 #ifdef CONFIG_IWLWIFI_HT
3875 u8 *pos = NULL;
3876 struct ieee802_11_elems elems;
3877 #endif /*CONFIG_IWLWIFI_HT */
3878 struct ieee80211_mgmt *mgnt =
3879 (struct ieee80211_mgmt *)header;
3880
3881 priv->assoc_id = (~((1 << 15) | (1 << 14))
3882 & le16_to_cpu(mgnt->u.assoc_resp.aid));
3883 priv->assoc_capability =
3884 le16_to_cpu(
3885 mgnt->u.assoc_resp.capab_info);
3886 #ifdef CONFIG_IWLWIFI_HT
3887 pos = mgnt->u.assoc_resp.variable;
3888 if (!parse_elems(pos,
3889 len - (pos - (u8 *) mgnt),
3890 &elems)) {
3891 if (elems.ht_extra_param &&
3892 elems.ht_cap_param)
3893 break;
3894 }
3895 #endif /*CONFIG_IWLWIFI_HT */
3896 /* assoc_id is 0 no association */
3897 if (!priv->assoc_id)
3898 break;
3899 if (priv->beacon_int)
3900 queue_work(priv->workqueue,
3901 &priv->post_associate.work);
3902 else
3903 priv->call_post_assoc_from_beacon = 1;
3904 }
3905
3906 break;
3907
3908 case IEEE80211_STYPE_PROBE_REQ:
3909 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
3910 !iwl_is_associated(priv)) {
3911 DECLARE_MAC_BUF(mac1);
3912 DECLARE_MAC_BUF(mac2);
3913 DECLARE_MAC_BUF(mac3);
3914
3915 IWL_DEBUG_DROP("Dropping (non network): "
3916 "%s, %s, %s\n",
3917 print_mac(mac1, header->addr1),
3918 print_mac(mac2, header->addr2),
3919 print_mac(mac3, header->addr3));
3920 return;
3921 }
3922 }
3923 iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &stats);
3924 break;
3925
3926 case IEEE80211_FTYPE_CTL:
3927 #ifdef CONFIG_IWLWIFI_HT_AGG
3928 switch (fc & IEEE80211_FCTL_STYPE) {
3929 case IEEE80211_STYPE_BACK_REQ:
3930 IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
3931 iwl4965_handle_data_packet(priv, 0, include_phy,
3932 rxb, &stats);
3933 break;
3934 default:
3935 break;
3936 }
3937 #endif
3938
3939 break;
3940
3941 case IEEE80211_FTYPE_DATA: {
3942 DECLARE_MAC_BUF(mac1);
3943 DECLARE_MAC_BUF(mac2);
3944 DECLARE_MAC_BUF(mac3);
3945
3946 if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
3947 iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
3948 header->addr2);
3949
3950 if (unlikely(!network_packet))
3951 IWL_DEBUG_DROP("Dropping (non network): "
3952 "%s, %s, %s\n",
3953 print_mac(mac1, header->addr1),
3954 print_mac(mac2, header->addr2),
3955 print_mac(mac3, header->addr3));
3956 else if (unlikely(is_duplicate_packet(priv, header)))
3957 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
3958 print_mac(mac1, header->addr1),
3959 print_mac(mac2, header->addr2),
3960 print_mac(mac3, header->addr3));
3961 else
3962 iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
3963 &stats);
3964 break;
3965 }
3966 default:
3967 break;
3968
3969 }
3970 }
3971
3972 /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
3973 * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
3974 static void iwl4965_rx_reply_rx_phy(struct iwl_priv *priv,
3975 struct iwl_rx_mem_buffer *rxb)
3976 {
3977 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3978 priv->last_phy_res[0] = 1;
3979 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
3980 sizeof(struct iwl4965_rx_phy_res));
3981 }
3982
3983 static void iwl4965_rx_missed_beacon_notif(struct iwl_priv *priv,
3984 struct iwl_rx_mem_buffer *rxb)
3985
3986 {
3987 #ifdef CONFIG_IWLWIFI_SENSITIVITY
3988 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
3989 struct iwl_missed_beacon_notif *missed_beacon;
3990
3991 missed_beacon = &pkt->u.missed_beacon;
3992 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
3993 IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
3994 le32_to_cpu(missed_beacon->consequtive_missed_beacons),
3995 le32_to_cpu(missed_beacon->total_missed_becons),
3996 le32_to_cpu(missed_beacon->num_recvd_beacons),
3997 le32_to_cpu(missed_beacon->num_expected_beacons));
3998 priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
3999 if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)))
4000 queue_work(priv->workqueue, &priv->sensitivity_work);
4001 }
4002 #endif /*CONFIG_IWLWIFI_SENSITIVITY*/
4003 }
4004
4005 #ifdef CONFIG_IWLWIFI_HT
4006 #ifdef CONFIG_IWLWIFI_HT_AGG
4007
4008 static void iwl4965_set_tx_status(struct iwl_priv *priv, int txq_id, int idx,
4009 u32 status, u32 retry_count, u32 rate)
4010 {
4011 struct ieee80211_tx_status *tx_status =
4012 &(priv->txq[txq_id].txb[idx].status);
4013
4014 tx_status->flags = status ? IEEE80211_TX_STATUS_ACK : 0;
4015 tx_status->retry_count += retry_count;
4016 tx_status->control.tx_rate = rate;
4017 }
4018
4019
4020 static void iwl_sta_modify_enable_tid_tx(struct iwl_priv *priv,
4021 int sta_id, int tid)
4022 {
4023 unsigned long flags;
4024
4025 spin_lock_irqsave(&priv->sta_lock, flags);
4026 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
4027 priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
4028 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4029 spin_unlock_irqrestore(&priv->sta_lock, flags);
4030
4031 iwl_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4032 }
4033
4034
4035 static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
4036 struct iwl_ht_agg *agg,
4037 struct iwl_compressed_ba_resp*
4038 ba_resp)
4039
4040 {
4041 int i, sh, ack;
4042 u16 ba_seq_ctl = le16_to_cpu(ba_resp->ba_seq_ctl);
4043 u32 bitmap0, bitmap1;
4044 u32 resp_bitmap0 = le32_to_cpu(ba_resp->ba_bitmap0);
4045 u32 resp_bitmap1 = le32_to_cpu(ba_resp->ba_bitmap1);
4046
4047 if (unlikely(!agg->wait_for_ba)) {
4048 IWL_ERROR("Received BA when not expected\n");
4049 return -EINVAL;
4050 }
4051 agg->wait_for_ba = 0;
4052 IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->ba_seq_ctl);
4053 sh = agg->start_idx - SEQ_TO_INDEX(ba_seq_ctl>>4);
4054 if (sh < 0) /* tbw something is wrong with indeces */
4055 sh += 0x100;
4056
4057 /* don't use 64 bits for now */
4058 bitmap0 = resp_bitmap0 >> sh;
4059 bitmap1 = resp_bitmap1 >> sh;
4060 bitmap0 |= (resp_bitmap1 & ((1<<sh)|((1<<sh)-1))) << (32 - sh);
4061
4062 if (agg->frame_count > (64 - sh)) {
4063 IWL_DEBUG_TX_REPLY("more frames than bitmap size");
4064 return -1;
4065 }
4066
4067 /* check for success or failure according to the
4068 * transmitted bitmap and back bitmap */
4069 bitmap0 &= agg->bitmap0;
4070 bitmap1 &= agg->bitmap1;
4071
4072 for (i = 0; i < agg->frame_count ; i++) {
4073 int idx = (agg->start_idx + i) & 0xff;
4074 ack = bitmap0 & (1 << i);
4075 IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
4076 ack? "ACK":"NACK", i, idx, agg->start_idx + i);
4077 iwl4965_set_tx_status(priv, agg->txq_id, idx, ack, 0,
4078 agg->rate_n_flags);
4079
4080 }
4081
4082 IWL_DEBUG_TX_REPLY("Bitmap %x%x\n", bitmap0, bitmap1);
4083
4084 return 0;
4085 }
4086
4087 static inline int iwl_queue_dec_wrap(int index, int n_bd)
4088 {
4089 return (index == 0) ? n_bd - 1 : index - 1;
4090 }
4091
4092 static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
4093 struct iwl_rx_mem_buffer *rxb)
4094 {
4095 struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
4096 struct iwl_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
4097 int index;
4098 struct iwl_tx_queue *txq = NULL;
4099 struct iwl_ht_agg *agg;
4100 u16 ba_resp_scd_flow = le16_to_cpu(ba_resp->scd_flow);
4101 u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
4102
4103 if (ba_resp_scd_flow >= ARRAY_SIZE(priv->txq)) {
4104 IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
4105 return;
4106 }
4107
4108 txq = &priv->txq[ba_resp_scd_flow];
4109 agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
4110 index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
4111
4112 /* TODO: Need to get this copy more sefely - now good for debug */
4113 /*
4114 {
4115 DECLARE_MAC_BUF(mac);
4116 IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
4117 "sta_id = %d\n",
4118 agg->wait_for_ba,
4119 print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
4120 ba_resp->sta_id);
4121 IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%X%X, scd_flow = "
4122 "%d, scd_ssn = %d\n",
4123 ba_resp->tid,
4124 ba_resp->ba_seq_ctl,
4125 ba_resp->ba_bitmap1,
4126 ba_resp->ba_bitmap0,
4127 ba_resp->scd_flow,
4128 ba_resp->scd_ssn);
4129 IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%X%X \n",
4130 agg->start_idx,
4131 agg->bitmap1,
4132 agg->bitmap0);
4133 }
4134 */
4135 iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
4136 /* releases all the TFDs until the SSN */
4137 if (txq->q.last_used != (ba_resp_scd_ssn & 0xff))
4138 iwl_tx_queue_reclaim(priv, ba_resp_scd_flow, index);
4139
4140 }
4141
4142
4143 static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv, u16 txq_id)
4144 {
4145 iwl_write_restricted_reg(priv,
4146 SCD_QUEUE_STATUS_BITS(txq_id),
4147 (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)|
4148 (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
4149 }
4150
4151 static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
4152 u16 txq_id)
4153 {
4154 u32 tbl_dw_addr;
4155 u32 tbl_dw;
4156 u16 scd_q2ratid;
4157
4158 scd_q2ratid = ra_tid & SCD_QUEUE_RA_TID_MAP_RATID_MSK;
4159
4160 tbl_dw_addr = priv->scd_base_addr +
4161 SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
4162
4163 tbl_dw = iwl_read_restricted_mem(priv, tbl_dw_addr);
4164
4165 if (txq_id & 0x1)
4166 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
4167 else
4168 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
4169
4170 iwl_write_restricted_mem(priv, tbl_dw_addr, tbl_dw);
4171
4172 return 0;
4173 }
4174
4175 /**
4176 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
4177 */
4178 static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
4179 int tx_fifo, int sta_id, int tid,
4180 u16 ssn_idx)
4181 {
4182 unsigned long flags;
4183 int rc;
4184 u16 ra_tid;
4185
4186 if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
4187 IWL_WARNING("queue number too small: %d, must be > %d\n",
4188 txq_id, IWL_BACK_QUEUE_FIRST_ID);
4189
4190 ra_tid = BUILD_RAxTID(sta_id, tid);
4191
4192 iwl_sta_modify_enable_tid_tx(priv, sta_id, tid);
4193
4194 spin_lock_irqsave(&priv->lock, flags);
4195 rc = iwl_grab_restricted_access(priv);
4196 if (rc) {
4197 spin_unlock_irqrestore(&priv->lock, flags);
4198 return rc;
4199 }
4200
4201 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
4202
4203 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
4204
4205
4206 iwl_set_bits_restricted_reg(priv, SCD_QUEUECHAIN_SEL, (1<<txq_id));
4207
4208 priv->txq[txq_id].q.last_used = (ssn_idx & 0xff);
4209 priv->txq[txq_id].q.first_empty = (ssn_idx & 0xff);
4210
4211 /* supposes that ssn_idx is valid (!= 0xFFF) */
4212 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
4213
4214 iwl_write_restricted_mem(priv,
4215 priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id),
4216 (SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
4217 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
4218
4219 iwl_write_restricted_mem(priv, priv->scd_base_addr +
4220 SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
4221 (SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
4222 & SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
4223
4224 iwl_set_bits_restricted_reg(priv, SCD_INTERRUPT_MASK, (1 << txq_id));
4225
4226 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
4227
4228 iwl_release_restricted_access(priv);
4229 spin_unlock_irqrestore(&priv->lock, flags);
4230
4231 return 0;
4232 }
4233
4234 /**
4235 * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
4236 */
4237 static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
4238 u16 ssn_idx, u8 tx_fifo)
4239 {
4240 unsigned long flags;
4241 int rc;
4242
4243 if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
4244 IWL_WARNING("queue number too small: %d, must be > %d\n",
4245 txq_id, IWL_BACK_QUEUE_FIRST_ID);
4246 return -EINVAL;
4247 }
4248
4249 spin_lock_irqsave(&priv->lock, flags);
4250 rc = iwl_grab_restricted_access(priv);
4251 if (rc) {
4252 spin_unlock_irqrestore(&priv->lock, flags);
4253 return rc;
4254 }
4255
4256 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
4257
4258 iwl_clear_bits_restricted_reg(priv, SCD_QUEUECHAIN_SEL, (1 << txq_id));
4259
4260 priv->txq[txq_id].q.last_used = (ssn_idx & 0xff);
4261 priv->txq[txq_id].q.first_empty = (ssn_idx & 0xff);
4262 /* supposes that ssn_idx is valid (!= 0xFFF) */
4263 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
4264
4265 iwl_clear_bits_restricted_reg(priv, SCD_INTERRUPT_MASK, (1 << txq_id));
4266 iwl4965_txq_ctx_deactivate(priv, txq_id);
4267 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
4268
4269 iwl_release_restricted_access(priv);
4270 spin_unlock_irqrestore(&priv->lock, flags);
4271
4272 return 0;
4273 }
4274
4275 #endif/* CONFIG_IWLWIFI_HT_AGG */
4276 #endif /* CONFIG_IWLWIFI_HT */
4277 /*
4278 * RATE SCALE CODE
4279 */
4280 int iwl4965_init_hw_rates(struct iwl_priv *priv, struct ieee80211_rate *rates)
4281 {
4282 return 0;
4283 }
4284
4285
4286 /**
4287 * iwl4965_add_station - Initialize a station's hardware rate table
4288 *
4289 * The uCode contains a table of fallback rates and retries per rate
4290 * for automatic fallback during transmission.
4291 *
4292 * NOTE: This initializes the table for a single retry per data rate
4293 * which is not optimal. Setting up an intelligent retry per rate
4294 * requires feedback from transmission, which isn't exposed through
4295 * rc80211_simple which is what this driver is currently using.
4296 *
4297 */
4298 void iwl4965_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
4299 {
4300 int i, r;
4301 struct iwl_link_quality_cmd link_cmd = {
4302 .reserved1 = 0,
4303 };
4304 u16 rate_flags;
4305
4306 /* Set up the rate scaling to start at 54M and fallback
4307 * all the way to 1M in IEEE order and then spin on IEEE */
4308 if (is_ap)
4309 r = IWL_RATE_54M_INDEX;
4310 else if (priv->phymode == MODE_IEEE80211A)
4311 r = IWL_RATE_6M_INDEX;
4312 else
4313 r = IWL_RATE_1M_INDEX;
4314
4315 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
4316 rate_flags = 0;
4317 if (r >= IWL_FIRST_CCK_RATE && r <= IWL_LAST_CCK_RATE)
4318 rate_flags |= RATE_MCS_CCK_MSK;
4319
4320 rate_flags |= RATE_MCS_ANT_B_MSK;
4321 rate_flags &= ~RATE_MCS_ANT_A_MSK;
4322 link_cmd.rs_table[i].rate_n_flags =
4323 iwl_hw_set_rate_n_flags(iwl_rates[r].plcp, rate_flags);
4324 r = iwl_get_prev_ieee_rate(r);
4325 }
4326
4327 link_cmd.general_params.single_stream_ant_msk = 2;
4328 link_cmd.general_params.dual_stream_ant_msk = 3;
4329 link_cmd.agg_params.agg_dis_start_th = 3;
4330 link_cmd.agg_params.agg_time_limit = cpu_to_le16(4000);
4331
4332 /* Update the rate scaling for control frame Tx to AP */
4333 link_cmd.sta_id = is_ap ? IWL_AP_ID : IWL4965_BROADCAST_ID;
4334
4335 iwl_send_cmd_pdu(priv, REPLY_TX_LINK_QUALITY_CMD, sizeof(link_cmd),
4336 &link_cmd);
4337 }
4338
4339 #ifdef CONFIG_IWLWIFI_HT
4340
4341 static u8 iwl_is_channel_extension(struct iwl_priv *priv, int phymode,
4342 u16 channel, u8 extension_chan_offset)
4343 {
4344 const struct iwl_channel_info *ch_info;
4345
4346 ch_info = iwl_get_channel_info(priv, phymode, channel);
4347 if (!is_channel_valid(ch_info))
4348 return 0;
4349
4350 if (extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_AUTO)
4351 return 0;
4352
4353 if ((ch_info->fat_extension_channel == extension_chan_offset) ||
4354 (ch_info->fat_extension_channel == HT_IE_EXT_CHANNEL_MAX))
4355 return 1;
4356
4357 return 0;
4358 }
4359
4360 static u8 iwl_is_fat_tx_allowed(struct iwl_priv *priv,
4361 const struct sta_ht_info *ht_info)
4362 {
4363
4364 if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
4365 return 0;
4366
4367 if (ht_info->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ)
4368 return 0;
4369
4370 if (ht_info->extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_AUTO)
4371 return 0;
4372
4373 /* no fat tx allowed on 2.4GHZ */
4374 if (priv->phymode != MODE_IEEE80211A)
4375 return 0;
4376 return (iwl_is_channel_extension(priv, priv->phymode,
4377 ht_info->control_channel,
4378 ht_info->extension_chan_offset));
4379 }
4380
4381 void iwl4965_set_rxon_ht(struct iwl_priv *priv, struct sta_ht_info *ht_info)
4382 {
4383 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
4384 u32 val;
4385
4386 if (!ht_info->is_ht)
4387 return;
4388
4389 if (iwl_is_fat_tx_allowed(priv, ht_info))
4390 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
4391 else
4392 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
4393 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
4394
4395 if (le16_to_cpu(rxon->channel) != ht_info->control_channel) {
4396 IWL_DEBUG_ASSOC("control diff than current %d %d\n",
4397 le16_to_cpu(rxon->channel),
4398 ht_info->control_channel);
4399 rxon->channel = cpu_to_le16(ht_info->control_channel);
4400 return;
4401 }
4402
4403 /* Note: control channel is oposit to extension channel */
4404 switch (ht_info->extension_chan_offset) {
4405 case IWL_EXT_CHANNEL_OFFSET_ABOVE:
4406 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
4407 break;
4408 case IWL_EXT_CHANNEL_OFFSET_BELOW:
4409 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
4410 break;
4411 case IWL_EXT_CHANNEL_OFFSET_AUTO:
4412 rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
4413 break;
4414 default:
4415 rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
4416 break;
4417 }
4418
4419 val = ht_info->operating_mode;
4420
4421 rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
4422
4423 priv->active_rate_ht[0] = ht_info->supp_rates[0];
4424 priv->active_rate_ht[1] = ht_info->supp_rates[1];
4425 iwl4965_set_rxon_chain(priv);
4426
4427 IWL_DEBUG_ASSOC("supported HT rate 0x%X %X "
4428 "rxon flags 0x%X operation mode :0x%X "
4429 "extension channel offset 0x%x "
4430 "control chan %d\n",
4431 priv->active_rate_ht[0], priv->active_rate_ht[1],
4432 le32_to_cpu(rxon->flags), ht_info->operating_mode,
4433 ht_info->extension_chan_offset,
4434 ht_info->control_channel);
4435 return;
4436 }
4437
4438 void iwl4965_set_ht_add_station(struct iwl_priv *priv, u8 index)
4439 {
4440 __le32 sta_flags;
4441 struct sta_ht_info *ht_info = &priv->current_assoc_ht;
4442
4443 priv->current_channel_width = IWL_CHANNEL_WIDTH_20MHZ;
4444 if (!ht_info->is_ht)
4445 goto done;
4446
4447 sta_flags = priv->stations[index].sta.station_flags;
4448
4449 if (ht_info->tx_mimo_ps_mode == IWL_MIMO_PS_DYNAMIC)
4450 sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
4451 else
4452 sta_flags &= ~STA_FLG_RTS_MIMO_PROT_MSK;
4453
4454 sta_flags |= cpu_to_le32(
4455 (u32)ht_info->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
4456
4457 sta_flags |= cpu_to_le32(
4458 (u32)ht_info->mpdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
4459
4460 sta_flags &= (~STA_FLG_FAT_EN_MSK);
4461 ht_info->tx_chan_width = IWL_CHANNEL_WIDTH_20MHZ;
4462 ht_info->chan_width_cap = IWL_CHANNEL_WIDTH_20MHZ;
4463
4464 if (iwl_is_fat_tx_allowed(priv, ht_info)) {
4465 sta_flags |= STA_FLG_FAT_EN_MSK;
4466 ht_info->chan_width_cap = IWL_CHANNEL_WIDTH_40MHZ;
4467 if (ht_info->supported_chan_width == IWL_CHANNEL_WIDTH_40MHZ)
4468 ht_info->tx_chan_width = IWL_CHANNEL_WIDTH_40MHZ;
4469 }
4470 priv->current_channel_width = ht_info->tx_chan_width;
4471 priv->stations[index].sta.station_flags = sta_flags;
4472 done:
4473 return;
4474 }
4475
4476 #ifdef CONFIG_IWLWIFI_HT_AGG
4477
4478 static void iwl4965_sta_modify_add_ba_tid(struct iwl_priv *priv,
4479 int sta_id, int tid, u16 ssn)
4480 {
4481 unsigned long flags;
4482
4483 spin_lock_irqsave(&priv->sta_lock, flags);
4484 priv->stations[sta_id].sta.station_flags_msk = 0;
4485 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
4486 priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
4487 priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
4488 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4489 spin_unlock_irqrestore(&priv->sta_lock, flags);
4490
4491 iwl_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4492 }
4493
4494 static void iwl4965_sta_modify_del_ba_tid(struct iwl_priv *priv,
4495 int sta_id, int tid)
4496 {
4497 unsigned long flags;
4498
4499 spin_lock_irqsave(&priv->sta_lock, flags);
4500 priv->stations[sta_id].sta.station_flags_msk = 0;
4501 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
4502 priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
4503 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
4504 spin_unlock_irqrestore(&priv->sta_lock, flags);
4505
4506 iwl_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
4507 }
4508
4509 static const u16 default_tid_to_tx_fifo[] = {
4510 IWL_TX_FIFO_AC1,
4511 IWL_TX_FIFO_AC0,
4512 IWL_TX_FIFO_AC0,
4513 IWL_TX_FIFO_AC1,
4514 IWL_TX_FIFO_AC2,
4515 IWL_TX_FIFO_AC2,
4516 IWL_TX_FIFO_AC3,
4517 IWL_TX_FIFO_AC3,
4518 IWL_TX_FIFO_NONE,
4519 IWL_TX_FIFO_NONE,
4520 IWL_TX_FIFO_NONE,
4521 IWL_TX_FIFO_NONE,
4522 IWL_TX_FIFO_NONE,
4523 IWL_TX_FIFO_NONE,
4524 IWL_TX_FIFO_NONE,
4525 IWL_TX_FIFO_NONE,
4526 IWL_TX_FIFO_AC3
4527 };
4528
4529 static int iwl_txq_ctx_activate_free(struct iwl_priv *priv)
4530 {
4531 int txq_id;
4532
4533 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
4534 if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
4535 return txq_id;
4536 return -1;
4537 }
4538
4539 int iwl_mac_ht_tx_agg_start(struct ieee80211_hw *hw, u8 *da, u16 tid,
4540 u16 *start_seq_num)
4541 {
4542
4543 struct iwl_priv *priv = hw->priv;
4544 int sta_id;
4545 int tx_fifo;
4546 int txq_id;
4547 int ssn = -1;
4548 unsigned long flags;
4549 struct iwl_tid_data *tid_data;
4550 DECLARE_MAC_BUF(mac);
4551
4552 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
4553 tx_fifo = default_tid_to_tx_fifo[tid];
4554 else
4555 return -EINVAL;
4556
4557 IWL_WARNING("iwl-AGG iwl_mac_ht_tx_agg_start on da=%s"
4558 " tid=%d\n", print_mac(mac, da), tid);
4559
4560 sta_id = iwl_hw_find_station(priv, da);
4561 if (sta_id == IWL_INVALID_STATION)
4562 return -ENXIO;
4563
4564 txq_id = iwl_txq_ctx_activate_free(priv);
4565 if (txq_id == -1)
4566 return -ENXIO;
4567
4568 spin_lock_irqsave(&priv->sta_lock, flags);
4569 tid_data = &priv->stations[sta_id].tid[tid];
4570 ssn = SEQ_TO_SN(tid_data->seq_number);
4571 tid_data->agg.txq_id = txq_id;
4572 spin_unlock_irqrestore(&priv->sta_lock, flags);
4573
4574 *start_seq_num = ssn;
4575 iwl4965_ba_status(priv, tid, BA_STATUS_ACTIVE);
4576 return iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
4577 sta_id, tid, ssn);
4578 }
4579
4580
4581 int iwl_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, u8 *da, u16 tid,
4582 int generator)
4583 {
4584
4585 struct iwl_priv *priv = hw->priv;
4586 int tx_fifo_id, txq_id, sta_id, ssn = -1;
4587 struct iwl_tid_data *tid_data;
4588 int rc;
4589 DECLARE_MAC_BUF(mac);
4590
4591 if (!da) {
4592 IWL_ERROR("%s: da = NULL\n", __func__);
4593 return -EINVAL;
4594 }
4595
4596 if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
4597 tx_fifo_id = default_tid_to_tx_fifo[tid];
4598 else
4599 return -EINVAL;
4600
4601 sta_id = iwl_hw_find_station(priv, da);
4602
4603 if (sta_id == IWL_INVALID_STATION)
4604 return -ENXIO;
4605
4606 tid_data = &priv->stations[sta_id].tid[tid];
4607 ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
4608 txq_id = tid_data->agg.txq_id;
4609
4610 rc = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
4611 /* FIXME: need more safe way to handle error condition */
4612 if (rc)
4613 return rc;
4614
4615 iwl4965_ba_status(priv, tid, BA_STATUS_INITIATOR_DELBA);
4616 IWL_DEBUG_INFO("iwl_mac_ht_tx_agg_stop on da=%s tid=%d\n",
4617 print_mac(mac, da), tid);
4618
4619 return 0;
4620 }
4621
4622 int iwl_mac_ht_rx_agg_start(struct ieee80211_hw *hw, u8 *da,
4623 u16 tid, u16 start_seq_num)
4624 {
4625 struct iwl_priv *priv = hw->priv;
4626 int sta_id;
4627 DECLARE_MAC_BUF(mac);
4628
4629 IWL_WARNING("iwl-AGG iwl_mac_ht_rx_agg_start on da=%s"
4630 " tid=%d\n", print_mac(mac, da), tid);
4631 sta_id = iwl_hw_find_station(priv, da);
4632 iwl4965_sta_modify_add_ba_tid(priv, sta_id, tid, start_seq_num);
4633 return 0;
4634 }
4635
4636 int iwl_mac_ht_rx_agg_stop(struct ieee80211_hw *hw, u8 *da,
4637 u16 tid, int generator)
4638 {
4639 struct iwl_priv *priv = hw->priv;
4640 int sta_id;
4641 DECLARE_MAC_BUF(mac);
4642
4643 IWL_WARNING("iwl-AGG iwl_mac_ht_rx_agg_stop on da=%s tid=%d\n",
4644 print_mac(mac, da), tid);
4645 sta_id = iwl_hw_find_station(priv, da);
4646 iwl4965_sta_modify_del_ba_tid(priv, sta_id, tid);
4647 return 0;
4648 }
4649
4650 #endif /* CONFIG_IWLWIFI_HT_AGG */
4651 #endif /* CONFIG_IWLWIFI_HT */
4652
4653 /* Set up 4965-specific Rx frame reply handlers */
4654 void iwl_hw_rx_handler_setup(struct iwl_priv *priv)
4655 {
4656 /* Legacy Rx frames */
4657 priv->rx_handlers[REPLY_4965_RX] = iwl4965_rx_reply_rx;
4658
4659 /* High-throughput (HT) Rx frames */
4660 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
4661 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
4662
4663 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
4664 iwl4965_rx_missed_beacon_notif;
4665
4666 #ifdef CONFIG_IWLWIFI_HT
4667 #ifdef CONFIG_IWLWIFI_HT_AGG
4668 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
4669 #endif /* CONFIG_IWLWIFI_AGG */
4670 #endif /* CONFIG_IWLWIFI */
4671 }
4672
4673 void iwl_hw_setup_deferred_work(struct iwl_priv *priv)
4674 {
4675 INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
4676 INIT_WORK(&priv->statistics_work, iwl4965_bg_statistics_work);
4677 #ifdef CONFIG_IWLWIFI_SENSITIVITY
4678 INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
4679 #endif
4680 #ifdef CONFIG_IWLWIFI_HT
4681 #ifdef CONFIG_IWLWIFI_HT_AGG
4682 INIT_WORK(&priv->agg_work, iwl4965_bg_agg_work);
4683 #endif /* CONFIG_IWLWIFI_AGG */
4684 #endif /* CONFIG_IWLWIFI_HT */
4685 init_timer(&priv->statistics_periodic);
4686 priv->statistics_periodic.data = (unsigned long)priv;
4687 priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
4688 }
4689
4690 void iwl_hw_cancel_deferred_work(struct iwl_priv *priv)
4691 {
4692 del_timer_sync(&priv->statistics_periodic);
4693
4694 cancel_delayed_work(&priv->init_alive_start);
4695 }
4696
4697 struct pci_device_id iwl_hw_card_ids[] = {
4698 {0x8086, 0x4229, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
4699 {0x8086, 0x4230, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
4700 {0}
4701 };
4702
4703 int iwl_eeprom_aqcuire_semaphore(struct iwl_priv *priv)
4704 {
4705 u16 count;
4706 int rc;
4707
4708 for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
4709 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
4710 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
4711 rc = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
4712 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
4713 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
4714 EEPROM_SEM_TIMEOUT);
4715 if (rc >= 0) {
4716 IWL_DEBUG_IO("Aqcuired semaphore after %d tries.\n",
4717 count+1);
4718 return rc;
4719 }
4720 }
4721
4722 return rc;
4723 }
4724
4725 inline void iwl_eeprom_release_semaphore(struct iwl_priv *priv)
4726 {
4727 iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
4728 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
4729 }
4730
4731
4732 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
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