2 * Copyright (C) 2001-2004 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 /* this file is part of ehci-hcd.c */
21 /*-------------------------------------------------------------------------*/
24 * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
26 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
27 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28 * buffers needed for the larger number). We use one QH per endpoint, queue
29 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
31 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32 * interrupts) needs careful scheduling. Performance improvements can be
33 * an ongoing challenge. That's in "ehci-sched.c".
35 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37 * (b) special fields in qh entries or (c) split iso entries. TTs will
38 * buffer low/full speed data so the host collects it at high speed.
41 /*-------------------------------------------------------------------------*/
43 /* fill a qtd, returning how much of the buffer we were able to queue up */
46 qtd_fill(struct ehci_hcd
*ehci
, struct ehci_qtd
*qtd
, dma_addr_t buf
,
47 size_t len
, int token
, int maxpacket
)
52 /* one buffer entry per 4K ... first might be short or unaligned */
53 qtd
->hw_buf
[0] = cpu_to_hc32(ehci
, (u32
)addr
);
54 qtd
->hw_buf_hi
[0] = cpu_to_hc32(ehci
, (u32
)(addr
>> 32));
55 count
= 0x1000 - (buf
& 0x0fff); /* rest of that page */
56 if (likely (len
< count
)) /* ... iff needed */
62 /* per-qtd limit: from 16K to 20K (best alignment) */
63 for (i
= 1; count
< len
&& i
< 5; i
++) {
65 qtd
->hw_buf
[i
] = cpu_to_hc32(ehci
, (u32
)addr
);
66 qtd
->hw_buf_hi
[i
] = cpu_to_hc32(ehci
,
69 if ((count
+ 0x1000) < len
)
75 /* short packets may only terminate transfers */
77 count
-= (count
% maxpacket
);
79 qtd
->hw_token
= cpu_to_hc32(ehci
, (count
<< 16) | token
);
85 /*-------------------------------------------------------------------------*/
88 qh_update (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
, struct ehci_qtd
*qtd
)
90 /* writes to an active overlay are unsafe */
91 BUG_ON(qh
->qh_state
!= QH_STATE_IDLE
);
93 qh
->hw_qtd_next
= QTD_NEXT(ehci
, qtd
->qtd_dma
);
94 qh
->hw_alt_next
= EHCI_LIST_END(ehci
);
96 /* Except for control endpoints, we make hardware maintain data
97 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
98 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
101 if (!(qh
->hw_info1
& cpu_to_hc32(ehci
, 1 << 14))) {
102 unsigned is_out
, epnum
;
104 is_out
= !(qtd
->hw_token
& cpu_to_hc32(ehci
, 1 << 8));
105 epnum
= (hc32_to_cpup(ehci
, &qh
->hw_info1
) >> 8) & 0x0f;
106 if (unlikely (!usb_gettoggle (qh
->dev
, epnum
, is_out
))) {
107 qh
->hw_token
&= ~cpu_to_hc32(ehci
, QTD_TOGGLE
);
108 usb_settoggle (qh
->dev
, epnum
, is_out
, 1);
112 /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
114 qh
->hw_token
&= cpu_to_hc32(ehci
, QTD_TOGGLE
| QTD_STS_PING
);
117 /* if it weren't for a common silicon quirk (writing the dummy into the qh
118 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
119 * recovery (including urb dequeue) would need software changes to a QH...
122 qh_refresh (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
124 struct ehci_qtd
*qtd
;
126 if (list_empty (&qh
->qtd_list
))
129 qtd
= list_entry (qh
->qtd_list
.next
,
130 struct ehci_qtd
, qtd_list
);
131 /* first qtd may already be partially processed */
132 if (cpu_to_hc32(ehci
, qtd
->qtd_dma
) == qh
->hw_current
)
137 qh_update (ehci
, qh
, qtd
);
140 /*-------------------------------------------------------------------------*/
142 static int qtd_copy_status (
143 struct ehci_hcd
*ehci
,
149 int status
= -EINPROGRESS
;
151 /* count IN/OUT bytes, not SETUP (even short packets) */
152 if (likely (QTD_PID (token
) != 2))
153 urb
->actual_length
+= length
- QTD_LENGTH (token
);
155 /* don't modify error codes */
156 if (unlikely(urb
->unlinked
))
159 /* force cleanup after short read; not always an error */
160 if (unlikely (IS_SHORT_READ (token
)))
163 /* serious "can't proceed" faults reported by the hardware */
164 if (token
& QTD_STS_HALT
) {
165 if (token
& QTD_STS_BABBLE
) {
166 /* FIXME "must" disable babbling device's port too */
168 } else if (token
& QTD_STS_MMF
) {
169 /* fs/ls interrupt xfer missed the complete-split */
171 } else if (token
& QTD_STS_DBE
) {
172 status
= (QTD_PID (token
) == 1) /* IN ? */
173 ? -ENOSR
/* hc couldn't read data */
174 : -ECOMM
; /* hc couldn't write data */
175 } else if (token
& QTD_STS_XACT
) {
176 /* timeout, bad crc, wrong PID, etc; retried */
177 if (QTD_CERR (token
))
180 ehci_dbg (ehci
, "devpath %s ep%d%s 3strikes\n",
182 usb_pipeendpoint (urb
->pipe
),
183 usb_pipein (urb
->pipe
) ? "in" : "out");
186 /* CERR nonzero + no errors + halt --> stall */
187 } else if (QTD_CERR (token
))
193 "dev%d ep%d%s qtd token %08x --> status %d\n",
194 usb_pipedevice (urb
->pipe
),
195 usb_pipeendpoint (urb
->pipe
),
196 usb_pipein (urb
->pipe
) ? "in" : "out",
199 /* if async CSPLIT failed, try cleaning out the TT buffer */
201 && urb
->dev
->tt
&& !usb_pipeint (urb
->pipe
)
202 && ((token
& QTD_STS_MMF
) != 0
203 || QTD_CERR(token
) == 0)
204 && (!ehci_is_TDI(ehci
)
205 || urb
->dev
->tt
->hub
!=
206 ehci_to_hcd(ehci
)->self
.root_hub
)) {
208 struct usb_device
*tt
= urb
->dev
->tt
->hub
;
210 "clear tt buffer port %d, a%d ep%d t%08x\n",
211 urb
->dev
->ttport
, urb
->dev
->devnum
,
212 usb_pipeendpoint (urb
->pipe
), token
);
214 usb_hub_tt_clear_buffer (urb
->dev
, urb
->pipe
);
222 ehci_urb_done(struct ehci_hcd
*ehci
, struct urb
*urb
, int status
)
223 __releases(ehci
->lock
)
224 __acquires(ehci
->lock
)
226 if (likely (urb
->hcpriv
!= NULL
)) {
227 struct ehci_qh
*qh
= (struct ehci_qh
*) urb
->hcpriv
;
229 /* S-mask in a QH means it's an interrupt urb */
230 if ((qh
->hw_info2
& cpu_to_hc32(ehci
, QH_SMASK
)) != 0) {
232 /* ... update hc-wide periodic stats (for usbfs) */
233 ehci_to_hcd(ehci
)->self
.bandwidth_int_reqs
--;
238 if (unlikely(urb
->unlinked
)) {
239 COUNT(ehci
->stats
.unlink
);
241 if (likely(status
== -EINPROGRESS
))
243 COUNT(ehci
->stats
.complete
);
246 #ifdef EHCI_URB_TRACE
248 "%s %s urb %p ep%d%s status %d len %d/%d\n",
249 __FUNCTION__
, urb
->dev
->devpath
, urb
,
250 usb_pipeendpoint (urb
->pipe
),
251 usb_pipein (urb
->pipe
) ? "in" : "out",
253 urb
->actual_length
, urb
->transfer_buffer_length
);
256 /* complete() can reenter this HCD */
257 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci
), urb
);
258 spin_unlock (&ehci
->lock
);
259 usb_hcd_giveback_urb(ehci_to_hcd(ehci
), urb
, status
);
260 spin_lock (&ehci
->lock
);
263 static void start_unlink_async (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
);
264 static void unlink_async (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
);
266 static void intr_deschedule (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
);
267 static int qh_schedule (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
);
270 * Process and free completed qtds for a qh, returning URBs to drivers.
271 * Chases up to qh->hw_current. Returns number of completions called,
272 * indicating how much "real" work we did.
275 qh_completions (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
277 struct ehci_qtd
*last
= NULL
, *end
= qh
->dummy
;
278 struct list_head
*entry
, *tmp
;
279 int last_status
= -EINPROGRESS
;
284 u32 halt
= HALT_BIT(ehci
);
286 if (unlikely (list_empty (&qh
->qtd_list
)))
289 /* completions (or tasks on other cpus) must never clobber HALT
290 * till we've gone through and cleaned everything up, even when
291 * they add urbs to this qh's queue or mark them for unlinking.
293 * NOTE: unlinking expects to be done in queue order.
295 state
= qh
->qh_state
;
296 qh
->qh_state
= QH_STATE_COMPLETING
;
297 stopped
= (state
== QH_STATE_IDLE
);
299 /* remove de-activated QTDs from front of queue.
300 * after faults (including short reads), cleanup this urb
301 * then let the queue advance.
302 * if queue is stopped, handles unlinks.
304 list_for_each_safe (entry
, tmp
, &qh
->qtd_list
) {
305 struct ehci_qtd
*qtd
;
310 qtd
= list_entry (entry
, struct ehci_qtd
, qtd_list
);
313 /* clean up any state from previous QTD ...*/
315 if (likely (last
->urb
!= urb
)) {
316 ehci_urb_done(ehci
, last
->urb
, last_status
);
319 ehci_qtd_free (ehci
, last
);
321 last_status
= -EINPROGRESS
;
324 /* ignore urbs submitted during completions we reported */
328 /* hardware copies qtd out of qh overlay */
330 token
= hc32_to_cpu(ehci
, qtd
->hw_token
);
332 /* always clean up qtds the hc de-activated */
333 if ((token
& QTD_STS_ACTIVE
) == 0) {
335 if ((token
& QTD_STS_HALT
) != 0) {
338 /* magic dummy for some short reads; qh won't advance.
339 * that silicon quirk can kick in with this dummy too.
341 } else if (IS_SHORT_READ (token
)
342 && !(qtd
->hw_alt_next
343 & EHCI_LIST_END(ehci
))) {
348 /* stop scanning when we reach qtds the hc is using */
349 } else if (likely (!stopped
350 && HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
))) {
356 if (unlikely (!HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
)))
357 last_status
= -ESHUTDOWN
;
359 /* ignore active urbs unless some previous qtd
360 * for the urb faulted (including short read) or
361 * its urb was canceled. we may patch qh or qtds.
363 if (likely(last_status
== -EINPROGRESS
&&
367 /* issue status after short control reads */
368 if (unlikely (do_status
!= 0)
369 && QTD_PID (token
) == 0 /* OUT */) {
374 /* token in overlay may be most current */
375 if (state
== QH_STATE_IDLE
376 && cpu_to_hc32(ehci
, qtd
->qtd_dma
)
378 token
= hc32_to_cpu(ehci
, qh
->hw_token
);
380 /* force halt for unlinked or blocked qh, so we'll
381 * patch the qh later and so that completions can't
382 * activate it while we "know" it's stopped.
384 if ((halt
& qh
->hw_token
) == 0) {
386 qh
->hw_token
|= halt
;
391 /* remove it from the queue */
392 qtd_status
= qtd_copy_status(ehci
, urb
, qtd
->length
, token
);
393 if (unlikely(qtd_status
== -EREMOTEIO
)) {
394 do_status
= (!urb
->unlinked
&&
395 usb_pipecontrol(urb
->pipe
));
398 if (likely(last_status
== -EINPROGRESS
))
399 last_status
= qtd_status
;
401 if (stopped
&& qtd
->qtd_list
.prev
!= &qh
->qtd_list
) {
402 last
= list_entry (qtd
->qtd_list
.prev
,
403 struct ehci_qtd
, qtd_list
);
404 last
->hw_next
= qtd
->hw_next
;
406 list_del (&qtd
->qtd_list
);
410 /* last urb's completion might still need calling */
411 if (likely (last
!= NULL
)) {
412 ehci_urb_done(ehci
, last
->urb
, last_status
);
414 ehci_qtd_free (ehci
, last
);
417 /* restore original state; caller must unlink or relink */
418 qh
->qh_state
= state
;
420 /* be sure the hardware's done with the qh before refreshing
421 * it after fault cleanup, or recovering from silicon wrongly
422 * overlaying the dummy qtd (which reduces DMA chatter).
424 if (stopped
!= 0 || qh
->hw_qtd_next
== EHCI_LIST_END(ehci
)) {
427 qh_refresh(ehci
, qh
);
429 case QH_STATE_LINKED
:
430 /* should be rare for periodic transfers,
431 * except maybe high bandwidth ...
433 if ((cpu_to_hc32(ehci
, QH_SMASK
)
434 & qh
->hw_info2
) != 0) {
435 intr_deschedule (ehci
, qh
);
436 (void) qh_schedule (ehci
, qh
);
438 unlink_async (ehci
, qh
);
440 /* otherwise, unlink already started */
447 /*-------------------------------------------------------------------------*/
449 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
450 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
451 // ... and packet size, for any kind of endpoint descriptor
452 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
455 * reverse of qh_urb_transaction: free a list of TDs.
456 * used for cleanup after errors, before HC sees an URB's TDs.
458 static void qtd_list_free (
459 struct ehci_hcd
*ehci
,
461 struct list_head
*qtd_list
463 struct list_head
*entry
, *temp
;
465 list_for_each_safe (entry
, temp
, qtd_list
) {
466 struct ehci_qtd
*qtd
;
468 qtd
= list_entry (entry
, struct ehci_qtd
, qtd_list
);
469 list_del (&qtd
->qtd_list
);
470 ehci_qtd_free (ehci
, qtd
);
475 * create a list of filled qtds for this URB; won't link into qh.
477 static struct list_head
*
479 struct ehci_hcd
*ehci
,
481 struct list_head
*head
,
484 struct ehci_qtd
*qtd
, *qtd_prev
;
491 * URBs map to sequences of QTDs: one logical transaction
493 qtd
= ehci_qtd_alloc (ehci
, flags
);
496 list_add_tail (&qtd
->qtd_list
, head
);
499 token
= QTD_STS_ACTIVE
;
500 token
|= (EHCI_TUNE_CERR
<< 10);
501 /* for split transactions, SplitXState initialized to zero */
503 len
= urb
->transfer_buffer_length
;
504 is_input
= usb_pipein (urb
->pipe
);
505 if (usb_pipecontrol (urb
->pipe
)) {
507 qtd_fill(ehci
, qtd
, urb
->setup_dma
,
508 sizeof (struct usb_ctrlrequest
),
509 token
| (2 /* "setup" */ << 8), 8);
511 /* ... and always at least one more pid */
514 qtd
= ehci_qtd_alloc (ehci
, flags
);
518 qtd_prev
->hw_next
= QTD_NEXT(ehci
, qtd
->qtd_dma
);
519 list_add_tail (&qtd
->qtd_list
, head
);
521 /* for zero length DATA stages, STATUS is always IN */
523 token
|= (1 /* "in" */ << 8);
527 * data transfer stage: buffer setup
529 buf
= urb
->transfer_dma
;
532 token
|= (1 /* "in" */ << 8);
533 /* else it's already initted to "out" pid (0 << 8) */
535 maxpacket
= max_packet(usb_maxpacket(urb
->dev
, urb
->pipe
, !is_input
));
538 * buffer gets wrapped in one or more qtds;
539 * last one may be "short" (including zero len)
540 * and may serve as a control status ack
545 this_qtd_len
= qtd_fill(ehci
, qtd
, buf
, len
, token
, maxpacket
);
549 qtd
->hw_alt_next
= ehci
->async
->hw_alt_next
;
551 /* qh makes control packets use qtd toggle; maybe switch it */
552 if ((maxpacket
& (this_qtd_len
+ (maxpacket
- 1))) == 0)
555 if (likely (len
<= 0))
559 qtd
= ehci_qtd_alloc (ehci
, flags
);
563 qtd_prev
->hw_next
= QTD_NEXT(ehci
, qtd
->qtd_dma
);
564 list_add_tail (&qtd
->qtd_list
, head
);
567 /* unless the bulk/interrupt caller wants a chance to clean
568 * up after short reads, hc should advance qh past this urb
570 if (likely ((urb
->transfer_flags
& URB_SHORT_NOT_OK
) == 0
571 || usb_pipecontrol (urb
->pipe
)))
572 qtd
->hw_alt_next
= EHCI_LIST_END(ehci
);
575 * control requests may need a terminating data "status" ack;
576 * bulk ones may need a terminating short packet (zero length).
578 if (likely (urb
->transfer_buffer_length
!= 0)) {
581 if (usb_pipecontrol (urb
->pipe
)) {
583 token
^= 0x0100; /* "in" <--> "out" */
584 token
|= QTD_TOGGLE
; /* force DATA1 */
585 } else if (usb_pipebulk (urb
->pipe
)
586 && (urb
->transfer_flags
& URB_ZERO_PACKET
)
587 && !(urb
->transfer_buffer_length
% maxpacket
)) {
592 qtd
= ehci_qtd_alloc (ehci
, flags
);
596 qtd_prev
->hw_next
= QTD_NEXT(ehci
, qtd
->qtd_dma
);
597 list_add_tail (&qtd
->qtd_list
, head
);
599 /* never any data in such packets */
600 qtd_fill(ehci
, qtd
, 0, 0, token
, 0);
604 /* by default, enable interrupt on urb completion */
605 if (likely (!(urb
->transfer_flags
& URB_NO_INTERRUPT
)))
606 qtd
->hw_token
|= cpu_to_hc32(ehci
, QTD_IOC
);
610 qtd_list_free (ehci
, urb
, head
);
614 /*-------------------------------------------------------------------------*/
616 // Would be best to create all qh's from config descriptors,
617 // when each interface/altsetting is established. Unlink
618 // any previous qh and cancel its urbs first; endpoints are
619 // implicitly reset then (data toggle too).
620 // That'd mean updating how usbcore talks to HCDs. (2.7?)
624 * Each QH holds a qtd list; a QH is used for everything except iso.
626 * For interrupt urbs, the scheduler must set the microframe scheduling
627 * mask(s) each time the QH gets scheduled. For highspeed, that's
628 * just one microframe in the s-mask. For split interrupt transactions
629 * there are additional complications: c-mask, maybe FSTNs.
631 static struct ehci_qh
*
633 struct ehci_hcd
*ehci
,
637 struct ehci_qh
*qh
= ehci_qh_alloc (ehci
, flags
);
638 u32 info1
= 0, info2
= 0;
646 * init endpoint/device data for this QH
648 info1
|= usb_pipeendpoint (urb
->pipe
) << 8;
649 info1
|= usb_pipedevice (urb
->pipe
) << 0;
651 is_input
= usb_pipein (urb
->pipe
);
652 type
= usb_pipetype (urb
->pipe
);
653 maxp
= usb_maxpacket (urb
->dev
, urb
->pipe
, !is_input
);
655 /* Compute interrupt scheduling parameters just once, and save.
656 * - allowing for high bandwidth, how many nsec/uframe are used?
657 * - split transactions need a second CSPLIT uframe; same question
658 * - splits also need a schedule gap (for full/low speed I/O)
659 * - qh has a polling interval
661 * For control/bulk requests, the HC or TT handles these.
663 if (type
== PIPE_INTERRUPT
) {
664 qh
->usecs
= NS_TO_US (usb_calc_bus_time (USB_SPEED_HIGH
, is_input
, 0,
665 hb_mult (maxp
) * max_packet (maxp
)));
666 qh
->start
= NO_FRAME
;
668 if (urb
->dev
->speed
== USB_SPEED_HIGH
) {
672 qh
->period
= urb
->interval
>> 3;
673 if (qh
->period
== 0 && urb
->interval
!= 1) {
674 /* NOTE interval 2 or 4 uframes could work.
675 * But interval 1 scheduling is simpler, and
676 * includes high bandwidth.
678 dbg ("intr period %d uframes, NYET!",
683 struct usb_tt
*tt
= urb
->dev
->tt
;
686 /* gap is f(FS/LS transfer times) */
687 qh
->gap_uf
= 1 + usb_calc_bus_time (urb
->dev
->speed
,
688 is_input
, 0, maxp
) / (125 * 1000);
690 /* FIXME this just approximates SPLIT/CSPLIT times */
691 if (is_input
) { // SPLIT, gap, CSPLIT+DATA
692 qh
->c_usecs
= qh
->usecs
+ HS_USECS (0);
693 qh
->usecs
= HS_USECS (1);
694 } else { // SPLIT+DATA, gap, CSPLIT
695 qh
->usecs
+= HS_USECS (1);
696 qh
->c_usecs
= HS_USECS (0);
699 think_time
= tt
? tt
->think_time
: 0;
700 qh
->tt_usecs
= NS_TO_US (think_time
+
701 usb_calc_bus_time (urb
->dev
->speed
,
702 is_input
, 0, max_packet (maxp
)));
703 qh
->period
= urb
->interval
;
707 /* support for tt scheduling, and access to toggles */
711 switch (urb
->dev
->speed
) {
713 info1
|= (1 << 12); /* EPS "low" */
717 /* EPS 0 means "full" */
718 if (type
!= PIPE_INTERRUPT
)
719 info1
|= (EHCI_TUNE_RL_TT
<< 28);
720 if (type
== PIPE_CONTROL
) {
721 info1
|= (1 << 27); /* for TT */
722 info1
|= 1 << 14; /* toggle from qtd */
726 info2
|= (EHCI_TUNE_MULT_TT
<< 30);
728 /* Some Freescale processors have an erratum in which the
729 * port number in the queue head was 0..N-1 instead of 1..N.
731 if (ehci_has_fsl_portno_bug(ehci
))
732 info2
|= (urb
->dev
->ttport
-1) << 23;
734 info2
|= urb
->dev
->ttport
<< 23;
736 /* set the address of the TT; for TDI's integrated
737 * root hub tt, leave it zeroed.
739 if (!ehci_is_TDI(ehci
)
740 || urb
->dev
->tt
->hub
!=
741 ehci_to_hcd(ehci
)->self
.root_hub
)
742 info2
|= urb
->dev
->tt
->hub
->devnum
<< 16;
744 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
748 case USB_SPEED_HIGH
: /* no TT involved */
749 info1
|= (2 << 12); /* EPS "high" */
750 if (type
== PIPE_CONTROL
) {
751 info1
|= (EHCI_TUNE_RL_HS
<< 28);
752 info1
|= 64 << 16; /* usb2 fixed maxpacket */
753 info1
|= 1 << 14; /* toggle from qtd */
754 info2
|= (EHCI_TUNE_MULT_HS
<< 30);
755 } else if (type
== PIPE_BULK
) {
756 info1
|= (EHCI_TUNE_RL_HS
<< 28);
757 info1
|= 512 << 16; /* usb2 fixed maxpacket */
758 info2
|= (EHCI_TUNE_MULT_HS
<< 30);
759 } else { /* PIPE_INTERRUPT */
760 info1
|= max_packet (maxp
) << 16;
761 info2
|= hb_mult (maxp
) << 30;
765 dbg ("bogus dev %p speed %d", urb
->dev
, urb
->dev
->speed
);
771 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
773 /* init as live, toggle clear, advance to dummy */
774 qh
->qh_state
= QH_STATE_IDLE
;
775 qh
->hw_info1
= cpu_to_hc32(ehci
, info1
);
776 qh
->hw_info2
= cpu_to_hc32(ehci
, info2
);
777 usb_settoggle (urb
->dev
, usb_pipeendpoint (urb
->pipe
), !is_input
, 1);
778 qh_refresh (ehci
, qh
);
782 /*-------------------------------------------------------------------------*/
784 /* move qh (and its qtds) onto async queue; maybe enable queue. */
786 static void qh_link_async (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
788 __hc32 dma
= QH_NEXT(ehci
, qh
->qh_dma
);
789 struct ehci_qh
*head
;
791 /* (re)start the async schedule? */
793 timer_action_done (ehci
, TIMER_ASYNC_OFF
);
794 if (!head
->qh_next
.qh
) {
795 u32 cmd
= ehci_readl(ehci
, &ehci
->regs
->command
);
797 if (!(cmd
& CMD_ASE
)) {
798 /* in case a clear of CMD_ASE didn't take yet */
799 (void)handshake(ehci
, &ehci
->regs
->status
,
801 cmd
|= CMD_ASE
| CMD_RUN
;
802 ehci_writel(ehci
, cmd
, &ehci
->regs
->command
);
803 ehci_to_hcd(ehci
)->state
= HC_STATE_RUNNING
;
804 /* posted write need not be known to HC yet ... */
808 /* clear halt and/or toggle; and maybe recover from silicon quirk */
809 if (qh
->qh_state
== QH_STATE_IDLE
)
810 qh_refresh (ehci
, qh
);
812 /* splice right after start */
813 qh
->qh_next
= head
->qh_next
;
814 qh
->hw_next
= head
->hw_next
;
817 head
->qh_next
.qh
= qh
;
820 qh
->qh_state
= QH_STATE_LINKED
;
821 /* qtd completions reported later by interrupt */
824 /*-------------------------------------------------------------------------*/
827 * For control/bulk/interrupt, return QH with these TDs appended.
828 * Allocates and initializes the QH if necessary.
829 * Returns null if it can't allocate a QH it needs to.
830 * If the QH has TDs (urbs) already, that's great.
832 static struct ehci_qh
*qh_append_tds (
833 struct ehci_hcd
*ehci
,
835 struct list_head
*qtd_list
,
840 struct ehci_qh
*qh
= NULL
;
841 u32 qh_addr_mask
= cpu_to_hc32(ehci
, 0x7f);
843 qh
= (struct ehci_qh
*) *ptr
;
844 if (unlikely (qh
== NULL
)) {
845 /* can't sleep here, we have ehci->lock... */
846 qh
= qh_make (ehci
, urb
, GFP_ATOMIC
);
849 if (likely (qh
!= NULL
)) {
850 struct ehci_qtd
*qtd
;
852 if (unlikely (list_empty (qtd_list
)))
855 qtd
= list_entry (qtd_list
->next
, struct ehci_qtd
,
858 /* control qh may need patching ... */
859 if (unlikely (epnum
== 0)) {
861 /* usb_reset_device() briefly reverts to address 0 */
862 if (usb_pipedevice (urb
->pipe
) == 0)
863 qh
->hw_info1
&= ~qh_addr_mask
;
866 /* just one way to queue requests: swap with the dummy qtd.
867 * only hc or qh_refresh() ever modify the overlay.
869 if (likely (qtd
!= NULL
)) {
870 struct ehci_qtd
*dummy
;
874 /* to avoid racing the HC, use the dummy td instead of
875 * the first td of our list (becomes new dummy). both
876 * tds stay deactivated until we're done, when the
877 * HC is allowed to fetch the old dummy (4.10.2).
879 token
= qtd
->hw_token
;
880 qtd
->hw_token
= HALT_BIT(ehci
);
884 dma
= dummy
->qtd_dma
;
886 dummy
->qtd_dma
= dma
;
888 list_del (&qtd
->qtd_list
);
889 list_add (&dummy
->qtd_list
, qtd_list
);
890 __list_splice (qtd_list
, qh
->qtd_list
.prev
);
892 ehci_qtd_init(ehci
, qtd
, qtd
->qtd_dma
);
895 /* hc must see the new dummy at list end */
897 qtd
= list_entry (qh
->qtd_list
.prev
,
898 struct ehci_qtd
, qtd_list
);
899 qtd
->hw_next
= QTD_NEXT(ehci
, dma
);
901 /* let the hc process these next qtds */
903 dummy
->hw_token
= token
;
905 urb
->hcpriv
= qh_get (qh
);
911 /*-------------------------------------------------------------------------*/
915 struct ehci_hcd
*ehci
,
917 struct list_head
*qtd_list
,
920 struct ehci_qtd
*qtd
;
923 struct ehci_qh
*qh
= NULL
;
926 qtd
= list_entry (qtd_list
->next
, struct ehci_qtd
, qtd_list
);
927 epnum
= urb
->ep
->desc
.bEndpointAddress
;
929 #ifdef EHCI_URB_TRACE
931 "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
932 __FUNCTION__
, urb
->dev
->devpath
, urb
,
933 epnum
& 0x0f, (epnum
& USB_DIR_IN
) ? "in" : "out",
934 urb
->transfer_buffer_length
,
935 qtd
, urb
->ep
->hcpriv
);
938 spin_lock_irqsave (&ehci
->lock
, flags
);
939 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE
,
940 &ehci_to_hcd(ehci
)->flags
))) {
944 rc
= usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci
), urb
);
948 qh
= qh_append_tds(ehci
, urb
, qtd_list
, epnum
, &urb
->ep
->hcpriv
);
949 if (unlikely(qh
== NULL
)) {
950 usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci
), urb
);
955 /* Control/bulk operations through TTs don't need scheduling,
956 * the HC and TT handle it when the TT has a buffer ready.
958 if (likely (qh
->qh_state
== QH_STATE_IDLE
))
959 qh_link_async (ehci
, qh_get (qh
));
961 spin_unlock_irqrestore (&ehci
->lock
, flags
);
962 if (unlikely (qh
== NULL
))
963 qtd_list_free (ehci
, urb
, qtd_list
);
967 /*-------------------------------------------------------------------------*/
969 /* the async qh for the qtds being reclaimed are now unlinked from the HC */
971 static void end_unlink_async (struct ehci_hcd
*ehci
)
973 struct ehci_qh
*qh
= ehci
->reclaim
;
974 struct ehci_qh
*next
;
976 timer_action_done (ehci
, TIMER_IAA_WATCHDOG
);
978 // qh->hw_next = cpu_to_hc32(qh->qh_dma);
979 qh
->qh_state
= QH_STATE_IDLE
;
980 qh
->qh_next
.qh
= NULL
;
981 qh_put (qh
); // refcount from reclaim
983 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
985 ehci
->reclaim
= next
;
986 ehci
->reclaim_ready
= 0;
989 qh_completions (ehci
, qh
);
991 if (!list_empty (&qh
->qtd_list
)
992 && HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
))
993 qh_link_async (ehci
, qh
);
995 qh_put (qh
); // refcount from async list
997 /* it's not free to turn the async schedule on/off; leave it
998 * active but idle for a while once it empties.
1000 if (HC_IS_RUNNING (ehci_to_hcd(ehci
)->state
)
1001 && ehci
->async
->qh_next
.qh
== NULL
)
1002 timer_action (ehci
, TIMER_ASYNC_OFF
);
1006 ehci
->reclaim
= NULL
;
1007 start_unlink_async (ehci
, next
);
1011 /* makes sure the async qh will become idle */
1012 /* caller must own ehci->lock */
1014 static void start_unlink_async (struct ehci_hcd
*ehci
, struct ehci_qh
*qh
)
1016 int cmd
= ehci_readl(ehci
, &ehci
->regs
->command
);
1017 struct ehci_qh
*prev
;
1020 assert_spin_locked(&ehci
->lock
);
1022 || (qh
->qh_state
!= QH_STATE_LINKED
1023 && qh
->qh_state
!= QH_STATE_UNLINK_WAIT
)
1028 /* stop async schedule right now? */
1029 if (unlikely (qh
== ehci
->async
)) {
1030 /* can't get here without STS_ASS set */
1031 if (ehci_to_hcd(ehci
)->state
!= HC_STATE_HALT
1032 && !ehci
->reclaim
) {
1033 /* ... and CMD_IAAD clear */
1034 ehci_writel(ehci
, cmd
& ~CMD_ASE
,
1035 &ehci
->regs
->command
);
1037 // handshake later, if we need to
1038 timer_action_done (ehci
, TIMER_ASYNC_OFF
);
1043 qh
->qh_state
= QH_STATE_UNLINK
;
1044 ehci
->reclaim
= qh
= qh_get (qh
);
1047 while (prev
->qh_next
.qh
!= qh
)
1048 prev
= prev
->qh_next
.qh
;
1050 prev
->hw_next
= qh
->hw_next
;
1051 prev
->qh_next
= qh
->qh_next
;
1054 if (unlikely (ehci_to_hcd(ehci
)->state
== HC_STATE_HALT
)) {
1055 /* if (unlikely (qh->reclaim != 0))
1056 * this will recurse, probably not much
1058 end_unlink_async (ehci
);
1062 ehci
->reclaim_ready
= 0;
1064 ehci_writel(ehci
, cmd
, &ehci
->regs
->command
);
1065 (void)ehci_readl(ehci
, &ehci
->regs
->command
);
1066 timer_action (ehci
, TIMER_IAA_WATCHDOG
);
1069 /*-------------------------------------------------------------------------*/
1071 static void scan_async (struct ehci_hcd
*ehci
)
1074 enum ehci_timer_action action
= TIMER_IO_WATCHDOG
;
1076 if (!++(ehci
->stamp
))
1078 timer_action_done (ehci
, TIMER_ASYNC_SHRINK
);
1080 qh
= ehci
->async
->qh_next
.qh
;
1081 if (likely (qh
!= NULL
)) {
1083 /* clean any finished work for this qh */
1084 if (!list_empty (&qh
->qtd_list
)
1085 && qh
->stamp
!= ehci
->stamp
) {
1088 /* unlinks could happen here; completion
1089 * reporting drops the lock. rescan using
1090 * the latest schedule, but don't rescan
1091 * qhs we already finished (no looping).
1094 qh
->stamp
= ehci
->stamp
;
1095 temp
= qh_completions (ehci
, qh
);
1102 /* unlink idle entries, reducing HC PCI usage as well
1103 * as HCD schedule-scanning costs. delay for any qh
1104 * we just scanned, there's a not-unusual case that it
1105 * doesn't stay idle for long.
1106 * (plus, avoids some kind of re-activation race.)
1108 if (list_empty (&qh
->qtd_list
)) {
1109 if (qh
->stamp
== ehci
->stamp
)
1110 action
= TIMER_ASYNC_SHRINK
;
1111 else if (!ehci
->reclaim
1112 && qh
->qh_state
== QH_STATE_LINKED
)
1113 start_unlink_async (ehci
, qh
);
1116 qh
= qh
->qh_next
.qh
;
1119 if (action
== TIMER_ASYNC_SHRINK
)
1120 timer_action (ehci
, TIMER_ASYNC_SHRINK
);