Blackfin arch: fix building for BF542 processors which only have 1 TWI
[pv_ops_mirror.git] / include / asm-m68knommu / irq.h
blob9373c31ac87d8432fa84bbaf9e055a1f15ac0f1f
1 #ifndef _M68KNOMMU_IRQ_H_
2 #define _M68KNOMMU_IRQ_H_
4 #ifdef CONFIG_COLDFIRE
5 /*
6 * On the ColdFire we keep track of all vectors. That way drivers
7 * can register whatever vector number they wish, and we can deal
8 * with it.
9 */
10 #define SYS_IRQS 256
11 #define NR_IRQS SYS_IRQS
13 #else
16 * # of m68k interrupts
18 #define SYS_IRQS 8
19 #define NR_IRQS (24 + SYS_IRQS)
21 #endif /* CONFIG_COLDFIRE */
24 #define irq_canonicalize(irq) (irq)
26 #endif /* _M68KNOMMU_IRQ_H_ */