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Blackfin arch: fix building for BF542 processors which only have 1 TWI
[pv_ops_mirror.git]
/
include
/
asm-parisc
/
siginfo.h
blob
d4909f55fe35d041a64736ee7b42da548cac56af
1
#ifndef _PARISC_SIGINFO_H
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#define _PARISC_SIGINFO_H
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#include <asm-generic/siginfo.h>
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/*
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* SIGTRAP si_codes
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*/
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#define TRAP_BRANCH (__SI_FAULT|3)
/* process taken branch trap */
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#define TRAP_HWBKPT (__SI_FAULT|4)
/* hardware breakpoint or watchpoint */
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#undef NSIGTRAP
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#define NSIGTRAP 4
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#endif