Blackfin arch: fix building for BF542 processors which only have 1 TWI
[pv_ops_mirror.git] / include / asm-parisc / siginfo.h
blobd4909f55fe35d041a64736ee7b42da548cac56af
1 #ifndef _PARISC_SIGINFO_H
2 #define _PARISC_SIGINFO_H
4 #include <asm-generic/siginfo.h>
6 /*
7 * SIGTRAP si_codes
8 */
9 #define TRAP_BRANCH (__SI_FAULT|3) /* process taken branch trap */
10 #define TRAP_HWBKPT (__SI_FAULT|4) /* hardware breakpoint or watchpoint */
11 #undef NSIGTRAP
12 #define NSIGTRAP 4
14 #endif