sound/soc/at91/eti_b1_wm8731.c

   1 /*
   2  * eti_b1_wm8731  --  SoC audio for AT91RM9200-based Endrelia ETI_B1 board.
   3  *
   4  * Author:      Frank Mandarino <fmandarino@endrelia.com>
   5  *              Endrelia Technologies Inc.
   6  * Created:     Mar 29, 2006
   7  *
   8  * Based on corgi.c by:
   9  *
  10  * Copyright 2005 Wolfson Microelectronics PLC.
  11  * Copyright 2005 Openedhand Ltd.
  12  *
  13  * Authors: Liam Girdwood <liam.girdwood@wolfsonmicro.com>
  14  *          Richard Purdie <richard@openedhand.com>
  15  *
  16  *  This program is free software; you can redistribute  it and/or modify it
  17  *  under  the terms of  the GNU General  Public License as published by the
  18  *  Free Software Foundation;  either version 2 of the  License, or (at your
  19  *  option) any later version.
  20  *
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/moduleparam.h>
  25 #include <linux/version.h>
  26 #include <linux/kernel.h>
  27 #include <linux/clk.h>
  28 #include <linux/timer.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/platform_device.h>
  31 #include <sound/core.h>
  32 #include <sound/pcm.h>
  33 #include <sound/soc.h>
  34 #include <sound/soc-dapm.h>
  35
  36 #include <asm/arch/hardware.h>
  37 #include <asm/arch/at91_pio.h>
  38 #include <asm/arch/gpio.h>
  39
  40 #include "../codecs/wm8731.h"
  41 #include "at91-pcm.h"
  42 #include "at91-ssc.h"
  43
  44 #if 0
  45 #define DBG(x...)       printk(KERN_INFO "eti_b1_wm8731: " x)
  46 #else
  47 #define DBG(x...)
  48 #endif
  49
  50 #define AT91_PIO_TF1    (1 << (AT91_PIN_PB6 - PIN_BASE) % 32)
  51 #define AT91_PIO_TK1    (1 << (AT91_PIN_PB7 - PIN_BASE) % 32)
  52 #define AT91_PIO_TD1    (1 << (AT91_PIN_PB8 - PIN_BASE) % 32)
  53 #define AT91_PIO_RD1    (1 << (AT91_PIN_PB9 - PIN_BASE) % 32)
  54 #define AT91_PIO_RK1    (1 << (AT91_PIN_PB10 - PIN_BASE) % 32)
  55 #define AT91_PIO_RF1    (1 << (AT91_PIN_PB11 - PIN_BASE) % 32)
  56
  57 static struct clk *pck1_clk;
  58 static struct clk *pllb_clk;
  59
  60
  61 static int eti_b1_startup(struct snd_pcm_substream *substream)
  62 {
  63         struct snd_soc_pcm_runtime *rtd = substream->private_data;
  64         struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
  65         struct snd_soc_cpu_dai *cpu_dai = rtd->dai->cpu_dai;
  66         int ret;
  67
  68         /* cpu clock is the AT91 master clock sent to the SSC */
  69         ret = cpu_dai->dai_ops.set_sysclk(cpu_dai, AT91_SYSCLK_MCK,
  70                 60000000, SND_SOC_CLOCK_IN);
  71         if (ret < 0)
  72                 return ret;
  73
  74         /* codec system clock is supplied by PCK1, set to 12MHz */
  75         ret = codec_dai->dai_ops.set_sysclk(codec_dai, WM8731_SYSCLK,
  76                 12000000, SND_SOC_CLOCK_IN);
  77         if (ret < 0)
  78                 return ret;
  79
  80         /* Start PCK1 clock. */
  81         clk_enable(pck1_clk);
  82         DBG("pck1 started\n");
  83
  84         return 0;
  85 }
  86
  87 static void eti_b1_shutdown(struct snd_pcm_substream *substream)
  88 {
  89         /* Stop PCK1 clock. */
  90         clk_disable(pck1_clk);
  91         DBG("pck1 stopped\n");
  92 }
  93
  94 static int eti_b1_hw_params(struct snd_pcm_substream *substream,
  95         struct snd_pcm_hw_params *params)
  96 {
  97         struct snd_soc_pcm_runtime *rtd = substream->private_data;
  98         struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
  99         struct snd_soc_cpu_dai *cpu_dai = rtd->dai->cpu_dai;
 100         int ret;
 101
 102 #ifdef CONFIG_SND_AT91_SOC_ETI_SLAVE
 103         unsigned int rate;
 104         int cmr_div, period;
 105
 106         /* set codec DAI configuration */
 107         ret = codec_dai->dai_ops.set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
 108                 SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
 109         if (ret < 0)
 110                 return ret;
 111
 112         /* set cpu DAI configuration */
 113         ret = cpu_dai->dai_ops.set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
 114                 SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
 115         if (ret < 0)
 116                 return ret;
 117
 118         /*
 119          * The SSC clock dividers depend on the sample rate.  The CMR.DIV
 120          * field divides the system master clock MCK to drive the SSC TK
 121          * signal which provides the codec BCLK.  The TCMR.PERIOD and
 122          * RCMR.PERIOD fields further divide the BCLK signal to drive
 123          * the SSC TF and RF signals which provide the codec DACLRC and
 124          * ADCLRC clocks.
 125          *
 126          * The dividers were determined through trial and error, where a
 127          * CMR.DIV value is chosen such that the resulting BCLK value is
 128          * divisible, or almost divisible, by (2 * sample rate), and then
 129          * the TCMR.PERIOD or RCMR.PERIOD is BCLK / (2 * sample rate) - 1.
 130          */
 131         rate = params_rate(params);
 132
 133         switch (rate) {
 134         case 8000:
 135                 cmr_div = 25;   /* BCLK = 60MHz/(2*25) = 1.2MHz */
 136                 period = 74;    /* LRC = BCLK/(2*(74+1)) = 8000Hz */
 137                 break;
 138         case 32000:
 139                 cmr_div = 7;    /* BCLK = 60MHz/(2*7) ~= 4.28571428MHz */
 140                 period = 66;    /* LRC = BCLK/(2*(66+1)) = 31982.942Hz */
 141                 break;
 142         case 48000:
 143                 cmr_div = 13;   /* BCLK = 60MHz/(2*13) ~= 2.3076923MHz */
 144                 period = 23;    /* LRC = BCLK/(2*(23+1)) = 48076.923Hz */
 145                 break;
 146         default:
 147                 printk(KERN_WARNING "unsupported rate %d on ETI-B1 board\n", rate);
 148                 return -EINVAL;
 149         }
 150
 151         /* set the MCK divider for BCLK */
 152         ret = cpu_dai->dai_ops.set_clkdiv(cpu_dai, AT91SSC_CMR_DIV, cmr_div);
 153         if (ret < 0)
 154                 return ret;
 155
 156         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 157                 /* set the BCLK divider for DACLRC */
 158                 ret = cpu_dai->dai_ops.set_clkdiv(cpu_dai,
 159                                                 AT91SSC_TCMR_PERIOD, period);
 160         } else {
 161                 /* set the BCLK divider for ADCLRC */
 162                 ret = cpu_dai->dai_ops.set_clkdiv(cpu_dai,
 163                                                 AT91SSC_RCMR_PERIOD, period);
 164         }
 165         if (ret < 0)
 166                 return ret;
 167
 168 #else /* CONFIG_SND_AT91_SOC_ETI_SLAVE */
 169         /*
 170          * Codec in Master Mode.
 171          */
 172
 173         /* set codec DAI configuration */
 174         ret = codec_dai->dai_ops.set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
 175                 SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
 176         if (ret < 0)
 177                 return ret;
 178
 179         /* set cpu DAI configuration */
 180         ret = cpu_dai->dai_ops.set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
 181                 SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
 182         if (ret < 0)
 183                 return ret;
 184
 185 #endif /* CONFIG_SND_AT91_SOC_ETI_SLAVE */
 186
 187         return 0;
 188 }
 189
 190 static struct snd_soc_ops eti_b1_ops = {
 191         .startup = eti_b1_startup,
 192         .hw_params = eti_b1_hw_params,
 193         .shutdown = eti_b1_shutdown,
 194 };
 195
 196
 197 static const struct snd_soc_dapm_widget eti_b1_dapm_widgets[] = {
 198         SND_SOC_DAPM_MIC("Int Mic", NULL),
 199         SND_SOC_DAPM_SPK("Ext Spk", NULL),
 200 };
 201
 202 static const char *intercon[][3] = {
 203
 204         /* speaker connected to LHPOUT */
 205         {"Ext Spk", NULL, "LHPOUT"},
 206
 207         /* mic is connected to Mic Jack, with WM8731 Mic Bias */
 208         {"MICIN", NULL, "Mic Bias"},
 209         {"Mic Bias", NULL, "Int Mic"},
 210
 211         /* terminator */
 212         {NULL, NULL, NULL},
 213 };
 214
 215 /*
 216  * Logic for a wm8731 as connected on a Endrelia ETI-B1 board.
 217  */
 218 static int eti_b1_wm8731_init(struct snd_soc_codec *codec)
 219 {
 220         int i;
 221
 222         DBG("eti_b1_wm8731_init() called\n");
 223
 224         /* Add specific widgets */
 225         for(i = 0; i < ARRAY_SIZE(eti_b1_dapm_widgets); i++) {
 226                 snd_soc_dapm_new_control(codec, &eti_b1_dapm_widgets[i]);
 227         }
 228
 229         /* Set up specific audio path interconnects */
 230         for(i = 0; intercon[i][0] != NULL; i++) {
 231                 snd_soc_dapm_connect_input(codec, intercon[i][0],
 232                         intercon[i][1], intercon[i][2]);
 233         }
 234
 235         /* not connected */
 236         snd_soc_dapm_set_endpoint(codec, "RLINEIN", 0);
 237         snd_soc_dapm_set_endpoint(codec, "LLINEIN", 0);
 238
 239         /* always connected */
 240         snd_soc_dapm_set_endpoint(codec, "Int Mic", 1);
 241         snd_soc_dapm_set_endpoint(codec, "Ext Spk", 1);
 242
 243         snd_soc_dapm_sync_endpoints(codec);
 244
 245         return 0;
 246 }
 247
 248 static struct snd_soc_dai_link eti_b1_dai = {
 249         .name = "WM8731",
 250         .stream_name = "WM8731 PCM",
 251         .cpu_dai = &at91_ssc_dai[1],
 252         .codec_dai = &wm8731_dai,
 253         .init = eti_b1_wm8731_init,
 254         .ops = &eti_b1_ops,
 255 };
 256
 257 static struct snd_soc_machine snd_soc_machine_eti_b1 = {
 258         .name = "ETI_B1_WM8731",
 259         .dai_link = &eti_b1_dai,
 260         .num_links = 1,
 261 };
 262
 263 static struct wm8731_setup_data eti_b1_wm8731_setup = {
 264         .i2c_address = 0x1a,
 265 };
 266
 267 static struct snd_soc_device eti_b1_snd_devdata = {
 268         .machine = &snd_soc_machine_eti_b1,
 269         .platform = &at91_soc_platform,
 270         .codec_dev = &soc_codec_dev_wm8731,
 271         .codec_data = &eti_b1_wm8731_setup,
 272 };
 273
 274 static struct platform_device *eti_b1_snd_device;
 275
 276 static int __init eti_b1_init(void)
 277 {
 278         int ret;
 279         u32 ssc_pio_lines;
 280         struct at91_ssc_periph *ssc = eti_b1_dai.cpu_dai->private_data;
 281
 282         if (!request_mem_region(AT91RM9200_BASE_SSC1, SZ_16K, "soc-audio")) {
 283                 DBG("SSC1 memory region is busy\n");
 284                 return -EBUSY;
 285         }
 286
 287         ssc->base = ioremap(AT91RM9200_BASE_SSC1, SZ_16K);
 288         if (!ssc->base) {
 289                 DBG("SSC1 memory ioremap failed\n");
 290                 ret = -ENOMEM;
 291                 goto fail_release_mem;
 292         }
 293
 294         ssc->pid = AT91RM9200_ID_SSC1;
 295
 296         eti_b1_snd_device = platform_device_alloc("soc-audio", -1);
 297         if (!eti_b1_snd_device) {
 298                 DBG("platform device allocation failed\n");
 299                 ret = -ENOMEM;
 300                 goto fail_io_unmap;
 301         }
 302
 303         platform_set_drvdata(eti_b1_snd_device, &eti_b1_snd_devdata);
 304         eti_b1_snd_devdata.dev = &eti_b1_snd_device->dev;
 305
 306         ret = platform_device_add(eti_b1_snd_device);
 307         if (ret) {
 308                 DBG("platform device add failed\n");
 309                 platform_device_put(eti_b1_snd_device);
 310                 goto fail_io_unmap;
 311         }
 312
 313         ssc_pio_lines = AT91_PIO_TF1 | AT91_PIO_TK1 | AT91_PIO_TD1
 314                         | AT91_PIO_RD1 /* | AT91_PIO_RK1 */ | AT91_PIO_RF1;
 315
 316         /* Reset all PIO registers and assign lines to peripheral A */
 317         at91_sys_write(AT91_PIOB + PIO_PDR,  ssc_pio_lines);
 318         at91_sys_write(AT91_PIOB + PIO_ODR,  ssc_pio_lines);
 319         at91_sys_write(AT91_PIOB + PIO_IFDR, ssc_pio_lines);
 320         at91_sys_write(AT91_PIOB + PIO_CODR, ssc_pio_lines);
 321         at91_sys_write(AT91_PIOB + PIO_IDR,  ssc_pio_lines);
 322         at91_sys_write(AT91_PIOB + PIO_MDDR, ssc_pio_lines);
 323         at91_sys_write(AT91_PIOB + PIO_PUDR, ssc_pio_lines);
 324         at91_sys_write(AT91_PIOB + PIO_ASR,  ssc_pio_lines);
 325         at91_sys_write(AT91_PIOB + PIO_OWDR, ssc_pio_lines);
 326
 327         /*
 328          * Set PCK1 parent to PLLB and its rate to 12 Mhz.
 329          */
 330         pllb_clk = clk_get(NULL, "pllb");
 331         pck1_clk = clk_get(NULL, "pck1");
 332
 333         clk_set_parent(pck1_clk, pllb_clk);
 334         clk_set_rate(pck1_clk, 12000000);
 335
 336         DBG("MCLK rate %luHz\n", clk_get_rate(pck1_clk));
 337
 338         /* assign the GPIO pin to PCK1 */
 339         at91_set_B_periph(AT91_PIN_PA24, 0);
 340
 341 #ifdef CONFIG_SND_AT91_SOC_ETI_SLAVE
 342         printk(KERN_INFO "eti_b1_wm8731: Codec in Slave Mode\n");
 343 #else
 344         printk(KERN_INFO "eti_b1_wm8731: Codec in Master Mode\n");
 345 #endif
 346         return ret;
 347
 348 fail_io_unmap:
 349         iounmap(ssc->base);
 350 fail_release_mem:
 351         release_mem_region(AT91RM9200_BASE_SSC1, SZ_16K);
 352         return ret;
 353 }
 354
 355 static void __exit eti_b1_exit(void)
 356 {
 357         struct at91_ssc_periph *ssc = eti_b1_dai.cpu_dai->private_data;
 358
 359         clk_put(pck1_clk);
 360         clk_put(pllb_clk);
 361
 362         platform_device_unregister(eti_b1_snd_device);
 363
 364         iounmap(ssc->base);
 365         release_mem_region(AT91RM9200_BASE_SSC1, SZ_16K);
 366 }
 367
 368 module_init(eti_b1_init);
 369 module_exit(eti_b1_exit);
 370
 371 /* Module information */
 372 MODULE_AUTHOR("Frank Mandarino <fmandarino@endrelia.com>");
 373 MODULE_DESCRIPTION("ALSA SoC ETI-B1-WM8731");
 374 MODULE_LICENSE("GPL");