2 * linux/drivers/ide/pci/atiixp.c Version 0.02 Jun 16 2007
4 * Copyright (C) 2003 ATI Inc. <hyu@ati.com>
5 * Copyright (C) 2004,2007 Bartlomiej Zolnierkiewicz
8 #include <linux/types.h>
9 #include <linux/module.h>
10 #include <linux/kernel.h>
11 #include <linux/ioport.h>
12 #include <linux/pci.h>
13 #include <linux/hdreg.h>
14 #include <linux/ide.h>
15 #include <linux/delay.h>
16 #include <linux/init.h>
20 #define ATIIXP_IDE_PIO_TIMING 0x40
21 #define ATIIXP_IDE_MDMA_TIMING 0x44
22 #define ATIIXP_IDE_PIO_CONTROL 0x48
23 #define ATIIXP_IDE_PIO_MODE 0x4a
24 #define ATIIXP_IDE_UDMA_CONTROL 0x54
25 #define ATIIXP_IDE_UDMA_MODE 0x56
32 static atiixp_ide_timing pio_timing
[] = {
40 static atiixp_ide_timing mdma_timing
[] = {
46 static int save_mdma_mode
[4];
48 static DEFINE_SPINLOCK(atiixp_lock
);
51 * atiixp_dma_2_pio - return the PIO mode matching DMA
52 * @xfer_rate: transfer speed
54 * Returns the nearest equivalent PIO timing for the PIO or DMA
55 * mode requested by the controller.
58 static u8
atiixp_dma_2_pio(u8 xfer_rate
) {
87 static void atiixp_dma_host_on(ide_drive_t
*drive
)
89 struct pci_dev
*dev
= drive
->hwif
->pci_dev
;
93 spin_lock_irqsave(&atiixp_lock
, flags
);
95 pci_read_config_word(dev
, ATIIXP_IDE_UDMA_CONTROL
, &tmp16
);
96 if (save_mdma_mode
[drive
->dn
])
97 tmp16
&= ~(1 << drive
->dn
);
99 tmp16
|= (1 << drive
->dn
);
100 pci_write_config_word(dev
, ATIIXP_IDE_UDMA_CONTROL
, tmp16
);
102 spin_unlock_irqrestore(&atiixp_lock
, flags
);
104 ide_dma_host_on(drive
);
107 static void atiixp_dma_host_off(ide_drive_t
*drive
)
109 struct pci_dev
*dev
= drive
->hwif
->pci_dev
;
113 spin_lock_irqsave(&atiixp_lock
, flags
);
115 pci_read_config_word(dev
, ATIIXP_IDE_UDMA_CONTROL
, &tmp16
);
116 tmp16
&= ~(1 << drive
->dn
);
117 pci_write_config_word(dev
, ATIIXP_IDE_UDMA_CONTROL
, tmp16
);
119 spin_unlock_irqrestore(&atiixp_lock
, flags
);
121 ide_dma_host_off(drive
);
125 * atiixp_tune_pio - tune a drive attached to a ATIIXP
126 * @drive: drive to tune
127 * @pio: desired PIO mode
129 * Set the interface PIO mode.
132 static void atiixp_tune_pio(ide_drive_t
*drive
, u8 pio
)
134 struct pci_dev
*dev
= drive
->hwif
->pci_dev
;
136 int timing_shift
= (drive
->dn
& 2) ? 16 : 0 + (drive
->dn
& 1) ? 0 : 8;
140 spin_lock_irqsave(&atiixp_lock
, flags
);
142 pci_read_config_word(dev
, ATIIXP_IDE_PIO_MODE
, &pio_mode_data
);
143 pio_mode_data
&= ~(0x07 << (drive
->dn
* 4));
144 pio_mode_data
|= (pio
<< (drive
->dn
* 4));
145 pci_write_config_word(dev
, ATIIXP_IDE_PIO_MODE
, pio_mode_data
);
147 pci_read_config_dword(dev
, ATIIXP_IDE_PIO_TIMING
, &pio_timing_data
);
148 pio_timing_data
&= ~(0xff << timing_shift
);
149 pio_timing_data
|= (pio_timing
[pio
].recover_width
<< timing_shift
) |
150 (pio_timing
[pio
].command_width
<< (timing_shift
+ 4));
151 pci_write_config_dword(dev
, ATIIXP_IDE_PIO_TIMING
, pio_timing_data
);
153 spin_unlock_irqrestore(&atiixp_lock
, flags
);
156 static void atiixp_set_pio_mode(ide_drive_t
*drive
, const u8 pio
)
158 atiixp_tune_pio(drive
, pio
);
159 (void)ide_config_drive_speed(drive
, XFER_PIO_0
+ pio
);
163 * atiixp_tune_chipset - tune a ATIIXP interface
164 * @drive: IDE drive to tune
165 * @speed: speed to configure
167 * Set a ATIIXP interface channel to the desired speeds. This involves
168 * requires the right timing data into the ATIIXP configuration space
169 * then setting the drive parameters appropriately
172 static int atiixp_speedproc(ide_drive_t
*drive
, const u8 speed
)
174 struct pci_dev
*dev
= drive
->hwif
->pci_dev
;
176 int timing_shift
= (drive
->dn
& 2) ? 16 : 0 + (drive
->dn
& 1) ? 0 : 8;
181 spin_lock_irqsave(&atiixp_lock
, flags
);
183 save_mdma_mode
[drive
->dn
] = 0;
184 if (speed
>= XFER_UDMA_0
) {
185 pci_read_config_word(dev
, ATIIXP_IDE_UDMA_MODE
, &tmp16
);
186 tmp16
&= ~(0x07 << (drive
->dn
* 4));
187 tmp16
|= ((speed
& 0x07) << (drive
->dn
* 4));
188 pci_write_config_word(dev
, ATIIXP_IDE_UDMA_MODE
, tmp16
);
190 if ((speed
>= XFER_MW_DMA_0
) && (speed
<= XFER_MW_DMA_2
)) {
191 save_mdma_mode
[drive
->dn
] = speed
;
192 pci_read_config_dword(dev
, ATIIXP_IDE_MDMA_TIMING
, &tmp32
);
193 tmp32
&= ~(0xff << timing_shift
);
194 tmp32
|= (mdma_timing
[speed
& 0x03].recover_width
<< timing_shift
) |
195 (mdma_timing
[speed
& 0x03].command_width
<< (timing_shift
+ 4));
196 pci_write_config_dword(dev
, ATIIXP_IDE_MDMA_TIMING
, tmp32
);
200 spin_unlock_irqrestore(&atiixp_lock
, flags
);
202 if (speed
>= XFER_SW_DMA_0
)
203 pio
= atiixp_dma_2_pio(speed
);
205 pio
= speed
- XFER_PIO_0
;
207 atiixp_tune_pio(drive
, pio
);
209 return ide_config_drive_speed(drive
, speed
);
213 * atiixp_dma_check - set up an IDE device
214 * @drive: IDE drive to configure
216 * Set up the ATIIXP interface for the best available speed on this
217 * interface, preferring DMA to PIO.
220 static int atiixp_dma_check(ide_drive_t
*drive
)
222 drive
->init_speed
= 0;
224 if (ide_tune_dma(drive
))
227 if (ide_use_fast_pio(drive
))
228 ide_set_max_pio(drive
);
234 * init_hwif_atiixp - fill in the hwif for the ATIIXP
235 * @hwif: IDE interface
237 * Set up the ide_hwif_t for the ATIIXP interface according to the
238 * capabilities of the hardware.
241 static void __devinit
init_hwif_atiixp(ide_hwif_t
*hwif
)
244 u8 ch
= hwif
->channel
;
245 struct pci_dev
*pdev
= hwif
->pci_dev
;
248 hwif
->irq
= ch
? 15 : 14;
251 hwif
->set_pio_mode
= &atiixp_set_pio_mode
;
252 hwif
->speedproc
= &atiixp_speedproc
;
253 hwif
->drives
[0].autotune
= 1;
254 hwif
->drives
[1].autotune
= 1;
260 hwif
->ultra_mask
= 0x3f;
261 hwif
->mwdma_mask
= 0x06;
262 hwif
->swdma_mask
= 0x04;
264 pci_read_config_byte(pdev
, ATIIXP_IDE_UDMA_MODE
+ ch
, &udma_mode
);
266 if ((udma_mode
& 0x07) >= 0x04 || (udma_mode
& 0x70) >= 0x40)
267 hwif
->cbl
= ATA_CBL_PATA80
;
269 hwif
->cbl
= ATA_CBL_PATA40
;
271 hwif
->dma_host_on
= &atiixp_dma_host_on
;
272 hwif
->dma_host_off
= &atiixp_dma_host_off
;
273 hwif
->ide_dma_check
= &atiixp_dma_check
;
277 hwif
->drives
[1].autodma
= hwif
->autodma
;
278 hwif
->drives
[0].autodma
= hwif
->autodma
;
282 static ide_pci_device_t atiixp_pci_info
[] __devinitdata
= {
285 .init_hwif
= init_hwif_atiixp
,
287 .enablebits
= {{0x48,0x01,0x00}, {0x48,0x08,0x00}},
288 .bootable
= ON_BOARD
,
289 .pio_mask
= ATA_PIO4
,
291 .name
= "SB600_PATA",
292 .init_hwif
= init_hwif_atiixp
,
294 .enablebits
= {{0x48,0x01,0x00}, {0x00,0x00,0x00}},
295 .bootable
= ON_BOARD
,
296 .host_flags
= IDE_HFLAG_SINGLE
,
297 .pio_mask
= ATA_PIO4
,
302 * atiixp_init_one - called when a ATIIXP is found
303 * @dev: the atiixp device
304 * @id: the matching pci id
306 * Called when the PCI registration layer (or the IDE initialization)
307 * finds a device matching our IDE device tables.
310 static int __devinit
atiixp_init_one(struct pci_dev
*dev
, const struct pci_device_id
*id
)
312 return ide_setup_pci_device(dev
, &atiixp_pci_info
[id
->driver_data
]);
315 static struct pci_device_id atiixp_pci_tbl
[] = {
316 { PCI_VENDOR_ID_ATI
, PCI_DEVICE_ID_ATI_IXP200_IDE
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
317 { PCI_VENDOR_ID_ATI
, PCI_DEVICE_ID_ATI_IXP300_IDE
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
318 { PCI_VENDOR_ID_ATI
, PCI_DEVICE_ID_ATI_IXP400_IDE
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
319 { PCI_VENDOR_ID_ATI
, PCI_DEVICE_ID_ATI_IXP600_IDE
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 1},
320 { PCI_VENDOR_ID_ATI
, PCI_DEVICE_ID_ATI_IXP700_IDE
, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, 0},
323 MODULE_DEVICE_TABLE(pci
, atiixp_pci_tbl
);
325 static struct pci_driver driver
= {
326 .name
= "ATIIXP_IDE",
327 .id_table
= atiixp_pci_tbl
,
328 .probe
= atiixp_init_one
,
331 static int __init
atiixp_ide_init(void)
333 return ide_pci_register_driver(&driver
);
336 module_init(atiixp_ide_init
);
338 MODULE_AUTHOR("HUI YU");
339 MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE");
340 MODULE_LICENSE("GPL");