libata-link: linkify PHY-related functions
[pv_ops_mirror.git] / include / asm-s390 / pgtable.h
blob3208dc6c412c19a9d7695d65f1d397b6e9130df1
1 /*
2 * include/asm-s390/pgtable.h
4 * S390 version
5 * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Hartmut Penner (hp@de.ibm.com)
7 * Ulrich Weigand (weigand@de.ibm.com)
8 * Martin Schwidefsky (schwidefsky@de.ibm.com)
10 * Derived from "include/asm-i386/pgtable.h"
13 #ifndef _ASM_S390_PGTABLE_H
14 #define _ASM_S390_PGTABLE_H
16 #include <asm-generic/4level-fixup.h>
19 * The Linux memory management assumes a three-level page table setup. For
20 * s390 31 bit we "fold" the mid level into the top-level page table, so
21 * that we physically have the same two-level page table as the s390 mmu
22 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
23 * the hardware provides (region first and region second tables are not
24 * used).
26 * The "pgd_xxx()" functions are trivial for a folded two-level
27 * setup: the pgd is never bad, and a pmd always exists (as it's folded
28 * into the pgd entry)
30 * This file contains the functions and defines necessary to modify and use
31 * the S390 page table tree.
33 #ifndef __ASSEMBLY__
34 #include <linux/mm_types.h>
35 #include <asm/bug.h>
36 #include <asm/processor.h>
38 struct vm_area_struct; /* forward declaration (include/linux/mm.h) */
39 struct mm_struct;
41 extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
42 extern void paging_init(void);
43 extern void vmem_map_init(void);
46 * The S390 doesn't have any external MMU info: the kernel page
47 * tables contain all the necessary information.
49 #define update_mmu_cache(vma, address, pte) do { } while (0)
52 * ZERO_PAGE is a global shared page that is always zero: used
53 * for zero-mapped memory areas etc..
55 extern char empty_zero_page[PAGE_SIZE];
56 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
57 #endif /* !__ASSEMBLY__ */
60 * PMD_SHIFT determines the size of the area a second-level page
61 * table can map
62 * PGDIR_SHIFT determines what a third-level page table entry can map
64 #ifndef __s390x__
65 # define PMD_SHIFT 22
66 # define PGDIR_SHIFT 22
67 #else /* __s390x__ */
68 # define PMD_SHIFT 21
69 # define PGDIR_SHIFT 31
70 #endif /* __s390x__ */
72 #define PMD_SIZE (1UL << PMD_SHIFT)
73 #define PMD_MASK (~(PMD_SIZE-1))
74 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
75 #define PGDIR_MASK (~(PGDIR_SIZE-1))
78 * entries per page directory level: the S390 is two-level, so
79 * we don't really have any PMD directory physically.
80 * for S390 segment-table entries are combined to one PGD
81 * that leads to 1024 pte per pgd
83 #ifndef __s390x__
84 # define PTRS_PER_PTE 1024
85 # define PTRS_PER_PMD 1
86 # define PTRS_PER_PGD 512
87 #else /* __s390x__ */
88 # define PTRS_PER_PTE 512
89 # define PTRS_PER_PMD 1024
90 # define PTRS_PER_PGD 2048
91 #endif /* __s390x__ */
93 #define FIRST_USER_ADDRESS 0
95 #define pte_ERROR(e) \
96 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
97 #define pmd_ERROR(e) \
98 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
99 #define pgd_ERROR(e) \
100 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
102 #ifndef __ASSEMBLY__
104 * Just any arbitrary offset to the start of the vmalloc VM area: the
105 * current 8MB value just means that there will be a 8MB "hole" after the
106 * physical memory until the kernel virtual memory starts. That means that
107 * any out-of-bounds memory accesses will hopefully be caught.
108 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
109 * area for the same reason. ;)
111 extern unsigned long vmalloc_end;
112 #define VMALLOC_OFFSET (8*1024*1024)
113 #define VMALLOC_START (((unsigned long) high_memory + VMALLOC_OFFSET) \
114 & ~(VMALLOC_OFFSET-1))
115 #define VMALLOC_END vmalloc_end
118 * We need some free virtual space to be able to do vmalloc.
119 * VMALLOC_MIN_SIZE defines the minimum size of the vmalloc
120 * area. On a machine with 2GB memory we make sure that we
121 * have at least 128MB free space for vmalloc. On a machine
122 * with 4TB we make sure we have at least 128GB.
124 #ifndef __s390x__
125 #define VMALLOC_MIN_SIZE 0x8000000UL
126 #define VMALLOC_END_INIT 0x80000000UL
127 #else /* __s390x__ */
128 #define VMALLOC_MIN_SIZE 0x2000000000UL
129 #define VMALLOC_END_INIT 0x40000000000UL
130 #endif /* __s390x__ */
133 * A 31 bit pagetable entry of S390 has following format:
134 * | PFRA | | OS |
135 * 0 0IP0
136 * 00000000001111111111222222222233
137 * 01234567890123456789012345678901
139 * I Page-Invalid Bit: Page is not available for address-translation
140 * P Page-Protection Bit: Store access not possible for page
142 * A 31 bit segmenttable entry of S390 has following format:
143 * | P-table origin | |PTL
144 * 0 IC
145 * 00000000001111111111222222222233
146 * 01234567890123456789012345678901
148 * I Segment-Invalid Bit: Segment is not available for address-translation
149 * C Common-Segment Bit: Segment is not private (PoP 3-30)
150 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
152 * The 31 bit segmenttable origin of S390 has following format:
154 * |S-table origin | | STL |
155 * X **GPS
156 * 00000000001111111111222222222233
157 * 01234567890123456789012345678901
159 * X Space-Switch event:
160 * G Segment-Invalid Bit: *
161 * P Private-Space Bit: Segment is not private (PoP 3-30)
162 * S Storage-Alteration:
163 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
165 * A 64 bit pagetable entry of S390 has following format:
166 * | PFRA |0IP0| OS |
167 * 0000000000111111111122222222223333333333444444444455555555556666
168 * 0123456789012345678901234567890123456789012345678901234567890123
170 * I Page-Invalid Bit: Page is not available for address-translation
171 * P Page-Protection Bit: Store access not possible for page
173 * A 64 bit segmenttable entry of S390 has following format:
174 * | P-table origin | TT
175 * 0000000000111111111122222222223333333333444444444455555555556666
176 * 0123456789012345678901234567890123456789012345678901234567890123
178 * I Segment-Invalid Bit: Segment is not available for address-translation
179 * C Common-Segment Bit: Segment is not private (PoP 3-30)
180 * P Page-Protection Bit: Store access not possible for page
181 * TT Type 00
183 * A 64 bit region table entry of S390 has following format:
184 * | S-table origin | TF TTTL
185 * 0000000000111111111122222222223333333333444444444455555555556666
186 * 0123456789012345678901234567890123456789012345678901234567890123
188 * I Segment-Invalid Bit: Segment is not available for address-translation
189 * TT Type 01
190 * TF
191 * TL Table lenght
193 * The 64 bit regiontable origin of S390 has following format:
194 * | region table origon | DTTL
195 * 0000000000111111111122222222223333333333444444444455555555556666
196 * 0123456789012345678901234567890123456789012345678901234567890123
198 * X Space-Switch event:
199 * G Segment-Invalid Bit:
200 * P Private-Space Bit:
201 * S Storage-Alteration:
202 * R Real space
203 * TL Table-Length:
205 * A storage key has the following format:
206 * | ACC |F|R|C|0|
207 * 0 3 4 5 6 7
208 * ACC: access key
209 * F : fetch protection bit
210 * R : referenced bit
211 * C : changed bit
214 /* Hardware bits in the page table entry */
215 #define _PAGE_RO 0x200 /* HW read-only bit */
216 #define _PAGE_INVALID 0x400 /* HW invalid bit */
217 #define _PAGE_SWT 0x001 /* SW pte type bit t */
218 #define _PAGE_SWX 0x002 /* SW pte type bit x */
220 /* Six different types of pages. */
221 #define _PAGE_TYPE_EMPTY 0x400
222 #define _PAGE_TYPE_NONE 0x401
223 #define _PAGE_TYPE_SWAP 0x403
224 #define _PAGE_TYPE_FILE 0x601 /* bit 0x002 is used for offset !! */
225 #define _PAGE_TYPE_RO 0x200
226 #define _PAGE_TYPE_RW 0x000
227 #define _PAGE_TYPE_EX_RO 0x202
228 #define _PAGE_TYPE_EX_RW 0x002
231 * PTE type bits are rather complicated. handle_pte_fault uses pte_present,
232 * pte_none and pte_file to find out the pte type WITHOUT holding the page
233 * table lock. ptep_clear_flush on the other hand uses ptep_clear_flush to
234 * invalidate a given pte. ipte sets the hw invalid bit and clears all tlbs
235 * for the page. The page table entry is set to _PAGE_TYPE_EMPTY afterwards.
236 * This change is done while holding the lock, but the intermediate step
237 * of a previously valid pte with the hw invalid bit set can be observed by
238 * handle_pte_fault. That makes it necessary that all valid pte types with
239 * the hw invalid bit set must be distinguishable from the four pte types
240 * empty, none, swap and file.
242 * irxt ipte irxt
243 * _PAGE_TYPE_EMPTY 1000 -> 1000
244 * _PAGE_TYPE_NONE 1001 -> 1001
245 * _PAGE_TYPE_SWAP 1011 -> 1011
246 * _PAGE_TYPE_FILE 11?1 -> 11?1
247 * _PAGE_TYPE_RO 0100 -> 1100
248 * _PAGE_TYPE_RW 0000 -> 1000
249 * _PAGE_TYPE_EX_RO 0110 -> 1110
250 * _PAGE_TYPE_EX_RW 0010 -> 1010
252 * pte_none is true for bits combinations 1000, 1010, 1100, 1110
253 * pte_present is true for bits combinations 0000, 0010, 0100, 0110, 1001
254 * pte_file is true for bits combinations 1101, 1111
255 * swap pte is 1011 and 0001, 0011, 0101, 0111 are invalid.
258 #ifndef __s390x__
260 /* Bits in the segment table entry */
261 #define _PAGE_TABLE_LEN 0xf /* only full page-tables */
262 #define _PAGE_TABLE_COM 0x10 /* common page-table */
263 #define _PAGE_TABLE_INV 0x20 /* invalid page-table */
264 #define _SEG_PRESENT 0x001 /* Software (overlap with PTL) */
266 /* Bits int the storage key */
267 #define _PAGE_CHANGED 0x02 /* HW changed bit */
268 #define _PAGE_REFERENCED 0x04 /* HW referenced bit */
270 #define _USER_SEG_TABLE_LEN 0x7f /* user-segment-table up to 2 GB */
271 #define _KERNEL_SEG_TABLE_LEN 0x7f /* kernel-segment-table up to 2 GB */
274 * User and Kernel pagetables are identical
276 #define _PAGE_TABLE _PAGE_TABLE_LEN
277 #define _KERNPG_TABLE _PAGE_TABLE_LEN
280 * The Kernel segment-tables includes the User segment-table
283 #define _SEGMENT_TABLE (_USER_SEG_TABLE_LEN|0x80000000|0x100)
284 #define _KERNSEG_TABLE _KERNEL_SEG_TABLE_LEN
286 #define USER_STD_MASK 0x00000080UL
288 #else /* __s390x__ */
290 /* Bits in the segment table entry */
291 #define _PMD_ENTRY_INV 0x20 /* invalid segment table entry */
292 #define _PMD_ENTRY 0x00
294 /* Bits in the region third table entry */
295 #define _PGD_ENTRY_INV 0x20 /* invalid region table entry */
296 #define _PGD_ENTRY 0x07
299 * User and kernel page directory
301 #define _REGION_THIRD 0x4
302 #define _REGION_THIRD_LEN 0x3
303 #define _REGION_TABLE (_REGION_THIRD|_REGION_THIRD_LEN|0x40|0x100)
304 #define _KERN_REGION_TABLE (_REGION_THIRD|_REGION_THIRD_LEN)
306 #define USER_STD_MASK 0x0000000000000080UL
308 /* Bits in the storage key */
309 #define _PAGE_CHANGED 0x02 /* HW changed bit */
310 #define _PAGE_REFERENCED 0x04 /* HW referenced bit */
312 #endif /* __s390x__ */
315 * Page protection definitions.
317 #define PAGE_NONE __pgprot(_PAGE_TYPE_NONE)
318 #define PAGE_RO __pgprot(_PAGE_TYPE_RO)
319 #define PAGE_RW __pgprot(_PAGE_TYPE_RW)
320 #define PAGE_EX_RO __pgprot(_PAGE_TYPE_EX_RO)
321 #define PAGE_EX_RW __pgprot(_PAGE_TYPE_EX_RW)
323 #define PAGE_KERNEL PAGE_RW
324 #define PAGE_COPY PAGE_RO
327 * Dependent on the EXEC_PROTECT option s390 can do execute protection.
328 * Write permission always implies read permission. In theory with a
329 * primary/secondary page table execute only can be implemented but
330 * it would cost an additional bit in the pte to distinguish all the
331 * different pte types. To avoid that execute permission currently
332 * implies read permission as well.
334 /*xwr*/
335 #define __P000 PAGE_NONE
336 #define __P001 PAGE_RO
337 #define __P010 PAGE_RO
338 #define __P011 PAGE_RO
339 #define __P100 PAGE_EX_RO
340 #define __P101 PAGE_EX_RO
341 #define __P110 PAGE_EX_RO
342 #define __P111 PAGE_EX_RO
344 #define __S000 PAGE_NONE
345 #define __S001 PAGE_RO
346 #define __S010 PAGE_RW
347 #define __S011 PAGE_RW
348 #define __S100 PAGE_EX_RO
349 #define __S101 PAGE_EX_RO
350 #define __S110 PAGE_EX_RW
351 #define __S111 PAGE_EX_RW
353 #ifndef __s390x__
354 # define PMD_SHADOW_SHIFT 1
355 # define PGD_SHADOW_SHIFT 1
356 #else /* __s390x__ */
357 # define PMD_SHADOW_SHIFT 2
358 # define PGD_SHADOW_SHIFT 2
359 #endif /* __s390x__ */
361 static inline struct page *get_shadow_page(struct page *page)
363 if (s390_noexec && !list_empty(&page->lru))
364 return virt_to_page(page->lru.next);
365 return NULL;
368 static inline pte_t *get_shadow_pte(pte_t *ptep)
370 unsigned long pteptr = (unsigned long) (ptep);
372 if (s390_noexec) {
373 unsigned long offset = pteptr & (PAGE_SIZE - 1);
374 void *addr = (void *) (pteptr ^ offset);
375 struct page *page = virt_to_page(addr);
376 if (!list_empty(&page->lru))
377 return (pte_t *) ((unsigned long) page->lru.next |
378 offset);
380 return NULL;
383 static inline pmd_t *get_shadow_pmd(pmd_t *pmdp)
385 unsigned long pmdptr = (unsigned long) (pmdp);
387 if (s390_noexec) {
388 unsigned long offset = pmdptr &
389 ((PAGE_SIZE << PMD_SHADOW_SHIFT) - 1);
390 void *addr = (void *) (pmdptr ^ offset);
391 struct page *page = virt_to_page(addr);
392 if (!list_empty(&page->lru))
393 return (pmd_t *) ((unsigned long) page->lru.next |
394 offset);
396 return NULL;
399 static inline pgd_t *get_shadow_pgd(pgd_t *pgdp)
401 unsigned long pgdptr = (unsigned long) (pgdp);
403 if (s390_noexec) {
404 unsigned long offset = pgdptr &
405 ((PAGE_SIZE << PGD_SHADOW_SHIFT) - 1);
406 void *addr = (void *) (pgdptr ^ offset);
407 struct page *page = virt_to_page(addr);
408 if (!list_empty(&page->lru))
409 return (pgd_t *) ((unsigned long) page->lru.next |
410 offset);
412 return NULL;
416 * Certain architectures need to do special things when PTEs
417 * within a page table are directly modified. Thus, the following
418 * hook is made available.
420 static inline void set_pte(pte_t *pteptr, pte_t pteval)
422 pte_t *shadow_pte = get_shadow_pte(pteptr);
424 *pteptr = pteval;
425 if (shadow_pte) {
426 if (!(pte_val(pteval) & _PAGE_INVALID) &&
427 (pte_val(pteval) & _PAGE_SWX))
428 pte_val(*shadow_pte) = pte_val(pteval) | _PAGE_RO;
429 else
430 pte_val(*shadow_pte) = _PAGE_TYPE_EMPTY;
433 #define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
436 * pgd/pmd/pte query functions
438 #ifndef __s390x__
440 static inline int pgd_present(pgd_t pgd) { return 1; }
441 static inline int pgd_none(pgd_t pgd) { return 0; }
442 static inline int pgd_bad(pgd_t pgd) { return 0; }
444 static inline int pmd_present(pmd_t pmd) { return pmd_val(pmd) & _SEG_PRESENT; }
445 static inline int pmd_none(pmd_t pmd) { return pmd_val(pmd) & _PAGE_TABLE_INV; }
446 static inline int pmd_bad(pmd_t pmd)
448 return (pmd_val(pmd) & (~PAGE_MASK & ~_PAGE_TABLE_INV)) != _PAGE_TABLE;
451 #else /* __s390x__ */
453 static inline int pgd_present(pgd_t pgd)
455 return (pgd_val(pgd) & ~PAGE_MASK) == _PGD_ENTRY;
458 static inline int pgd_none(pgd_t pgd)
460 return pgd_val(pgd) & _PGD_ENTRY_INV;
463 static inline int pgd_bad(pgd_t pgd)
465 return (pgd_val(pgd) & (~PAGE_MASK & ~_PGD_ENTRY_INV)) != _PGD_ENTRY;
468 static inline int pmd_present(pmd_t pmd)
470 return (pmd_val(pmd) & ~PAGE_MASK) == _PMD_ENTRY;
473 static inline int pmd_none(pmd_t pmd)
475 return pmd_val(pmd) & _PMD_ENTRY_INV;
478 static inline int pmd_bad(pmd_t pmd)
480 return (pmd_val(pmd) & (~PAGE_MASK & ~_PMD_ENTRY_INV)) != _PMD_ENTRY;
483 #endif /* __s390x__ */
485 static inline int pte_none(pte_t pte)
487 return (pte_val(pte) & _PAGE_INVALID) && !(pte_val(pte) & _PAGE_SWT);
490 static inline int pte_present(pte_t pte)
492 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT | _PAGE_SWX;
493 return (pte_val(pte) & mask) == _PAGE_TYPE_NONE ||
494 (!(pte_val(pte) & _PAGE_INVALID) &&
495 !(pte_val(pte) & _PAGE_SWT));
498 static inline int pte_file(pte_t pte)
500 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT;
501 return (pte_val(pte) & mask) == _PAGE_TYPE_FILE;
504 #define pte_same(a,b) (pte_val(a) == pte_val(b))
507 * query functions pte_write/pte_dirty/pte_young only work if
508 * pte_present() is true. Undefined behaviour if not..
510 static inline int pte_write(pte_t pte)
512 return (pte_val(pte) & _PAGE_RO) == 0;
515 static inline int pte_dirty(pte_t pte)
517 /* A pte is neither clean nor dirty on s/390. The dirty bit
518 * is in the storage key. See page_test_and_clear_dirty for
519 * details.
521 return 0;
524 static inline int pte_young(pte_t pte)
526 /* A pte is neither young nor old on s/390. The young bit
527 * is in the storage key. See page_test_and_clear_young for
528 * details.
530 return 0;
534 * pgd/pmd/pte modification functions
537 #ifndef __s390x__
539 static inline void pgd_clear(pgd_t * pgdp) { }
541 static inline void pmd_clear_kernel(pmd_t * pmdp)
543 pmd_val(pmdp[0]) = _PAGE_TABLE_INV;
544 pmd_val(pmdp[1]) = _PAGE_TABLE_INV;
545 pmd_val(pmdp[2]) = _PAGE_TABLE_INV;
546 pmd_val(pmdp[3]) = _PAGE_TABLE_INV;
549 static inline void pmd_clear(pmd_t * pmdp)
551 pmd_t *shadow_pmd = get_shadow_pmd(pmdp);
553 pmd_clear_kernel(pmdp);
554 if (shadow_pmd)
555 pmd_clear_kernel(shadow_pmd);
558 #else /* __s390x__ */
560 static inline void pgd_clear_kernel(pgd_t * pgdp)
562 pgd_val(*pgdp) = _PGD_ENTRY_INV | _PGD_ENTRY;
565 static inline void pgd_clear(pgd_t * pgdp)
567 pgd_t *shadow_pgd = get_shadow_pgd(pgdp);
569 pgd_clear_kernel(pgdp);
570 if (shadow_pgd)
571 pgd_clear_kernel(shadow_pgd);
574 static inline void pmd_clear_kernel(pmd_t * pmdp)
576 pmd_val(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY;
577 pmd_val1(*pmdp) = _PMD_ENTRY_INV | _PMD_ENTRY;
580 static inline void pmd_clear(pmd_t * pmdp)
582 pmd_t *shadow_pmd = get_shadow_pmd(pmdp);
584 pmd_clear_kernel(pmdp);
585 if (shadow_pmd)
586 pmd_clear_kernel(shadow_pmd);
589 #endif /* __s390x__ */
591 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
593 pte_t *shadow_pte = get_shadow_pte(ptep);
595 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
596 if (shadow_pte)
597 pte_val(*shadow_pte) = _PAGE_TYPE_EMPTY;
601 * The following pte modification functions only work if
602 * pte_present() is true. Undefined behaviour if not..
604 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
606 pte_val(pte) &= PAGE_MASK;
607 pte_val(pte) |= pgprot_val(newprot);
608 return pte;
611 static inline pte_t pte_wrprotect(pte_t pte)
613 /* Do not clobber _PAGE_TYPE_NONE pages! */
614 if (!(pte_val(pte) & _PAGE_INVALID))
615 pte_val(pte) |= _PAGE_RO;
616 return pte;
619 static inline pte_t pte_mkwrite(pte_t pte)
621 pte_val(pte) &= ~_PAGE_RO;
622 return pte;
625 static inline pte_t pte_mkclean(pte_t pte)
627 /* The only user of pte_mkclean is the fork() code.
628 We must *not* clear the *physical* page dirty bit
629 just because fork() wants to clear the dirty bit in
630 *one* of the page's mappings. So we just do nothing. */
631 return pte;
634 static inline pte_t pte_mkdirty(pte_t pte)
636 /* We do not explicitly set the dirty bit because the
637 * sske instruction is slow. It is faster to let the
638 * next instruction set the dirty bit.
640 return pte;
643 static inline pte_t pte_mkold(pte_t pte)
645 /* S/390 doesn't keep its dirty/referenced bit in the pte.
646 * There is no point in clearing the real referenced bit.
648 return pte;
651 static inline pte_t pte_mkyoung(pte_t pte)
653 /* S/390 doesn't keep its dirty/referenced bit in the pte.
654 * There is no point in setting the real referenced bit.
656 return pte;
659 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
661 return 0;
664 static inline int
665 ptep_clear_flush_young(struct vm_area_struct *vma,
666 unsigned long address, pte_t *ptep)
668 /* No need to flush TLB; bits are in storage key */
669 return ptep_test_and_clear_young(vma, address, ptep);
672 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
674 pte_t pte = *ptep;
675 pte_clear(mm, addr, ptep);
676 return pte;
679 static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
681 if (!(pte_val(*ptep) & _PAGE_INVALID)) {
682 #ifndef __s390x__
683 /* S390 has 1mb segments, we are emulating 4MB segments */
684 pte_t *pto = (pte_t *) (((unsigned long) ptep) & 0x7ffffc00);
685 #else
686 /* ipte in zarch mode can do the math */
687 pte_t *pto = ptep;
688 #endif
689 asm volatile(
690 " ipte %2,%3"
691 : "=m" (*ptep) : "m" (*ptep),
692 "a" (pto), "a" (address));
694 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
697 static inline void ptep_invalidate(unsigned long address, pte_t *ptep)
699 __ptep_ipte(address, ptep);
700 ptep = get_shadow_pte(ptep);
701 if (ptep)
702 __ptep_ipte(address, ptep);
705 static inline pte_t ptep_clear_flush(struct vm_area_struct *vma,
706 unsigned long address, pte_t *ptep)
708 pte_t pte = *ptep;
709 ptep_invalidate(address, ptep);
710 return pte;
713 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
715 pte_t old_pte = *ptep;
716 set_pte_at(mm, addr, ptep, pte_wrprotect(old_pte));
719 #define ptep_set_access_flags(__vma, __addr, __ptep, __entry, __dirty) \
720 ({ \
721 int __changed = !pte_same(*(__ptep), __entry); \
722 if (__changed) { \
723 ptep_invalidate(__addr, __ptep); \
724 set_pte_at((__vma)->vm_mm, __addr, __ptep, __entry); \
726 __changed; \
730 * Test and clear dirty bit in storage key.
731 * We can't clear the changed bit atomically. This is a potential
732 * race against modification of the referenced bit. This function
733 * should therefore only be called if it is not mapped in any
734 * address space.
736 static inline int page_test_dirty(struct page *page)
738 return (page_get_storage_key(page_to_phys(page)) & _PAGE_CHANGED) != 0;
741 static inline void page_clear_dirty(struct page *page)
743 page_set_storage_key(page_to_phys(page), PAGE_DEFAULT_KEY);
747 * Test and clear referenced bit in storage key.
749 static inline int page_test_and_clear_young(struct page *page)
751 unsigned long physpage = page_to_phys(page);
752 int ccode;
754 asm volatile(
755 " rrbe 0,%1\n"
756 " ipm %0\n"
757 " srl %0,28\n"
758 : "=d" (ccode) : "a" (physpage) : "cc" );
759 return ccode & 2;
763 * Conversion functions: convert a page and protection to a page entry,
764 * and a page entry and page directory to the page they refer to.
766 static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
768 pte_t __pte;
769 pte_val(__pte) = physpage + pgprot_val(pgprot);
770 return __pte;
773 static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
775 unsigned long physpage = page_to_phys(page);
777 return mk_pte_phys(physpage, pgprot);
780 static inline pte_t pfn_pte(unsigned long pfn, pgprot_t pgprot)
782 unsigned long physpage = __pa((pfn) << PAGE_SHIFT);
784 return mk_pte_phys(physpage, pgprot);
787 #ifdef __s390x__
789 static inline pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot)
791 unsigned long physpage = __pa((pfn) << PAGE_SHIFT);
793 return __pmd(physpage + pgprot_val(pgprot));
796 #endif /* __s390x__ */
798 #define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
799 #define pte_page(x) pfn_to_page(pte_pfn(x))
801 #define pmd_page_vaddr(pmd) (pmd_val(pmd) & PAGE_MASK)
803 #define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
805 #define pgd_page_vaddr(pgd) (pgd_val(pgd) & PAGE_MASK)
807 #define pgd_page(pgd) pfn_to_page(pgd_val(pgd) >> PAGE_SHIFT)
809 /* to find an entry in a page-table-directory */
810 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
811 #define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
813 /* to find an entry in a kernel page-table-directory */
814 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
816 #ifndef __s390x__
818 /* Find an entry in the second-level page table.. */
819 static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
821 return (pmd_t *) dir;
824 #else /* __s390x__ */
826 /* Find an entry in the second-level page table.. */
827 #define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
828 #define pmd_offset(dir,addr) \
829 ((pmd_t *) pgd_page_vaddr(*(dir)) + pmd_index(addr))
831 #endif /* __s390x__ */
833 /* Find an entry in the third-level page table.. */
834 #define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
835 #define pte_offset_kernel(pmd, address) \
836 ((pte_t *) pmd_page_vaddr(*(pmd)) + pte_index(address))
837 #define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
838 #define pte_offset_map_nested(pmd, address) pte_offset_kernel(pmd, address)
839 #define pte_unmap(pte) do { } while (0)
840 #define pte_unmap_nested(pte) do { } while (0)
843 * 31 bit swap entry format:
844 * A page-table entry has some bits we have to treat in a special way.
845 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
846 * exception will occur instead of a page translation exception. The
847 * specifiation exception has the bad habit not to store necessary
848 * information in the lowcore.
849 * Bit 21 and bit 22 are the page invalid bit and the page protection
850 * bit. We set both to indicate a swapped page.
851 * Bit 30 and 31 are used to distinguish the different page types. For
852 * a swapped page these bits need to be zero.
853 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
854 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
855 * plus 24 for the offset.
856 * 0| offset |0110|o|type |00|
857 * 0 0000000001111111111 2222 2 22222 33
858 * 0 1234567890123456789 0123 4 56789 01
860 * 64 bit swap entry format:
861 * A page-table entry has some bits we have to treat in a special way.
862 * Bits 52 and bit 55 have to be zero, otherwise an specification
863 * exception will occur instead of a page translation exception. The
864 * specifiation exception has the bad habit not to store necessary
865 * information in the lowcore.
866 * Bit 53 and bit 54 are the page invalid bit and the page protection
867 * bit. We set both to indicate a swapped page.
868 * Bit 62 and 63 are used to distinguish the different page types. For
869 * a swapped page these bits need to be zero.
870 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
871 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
872 * plus 56 for the offset.
873 * | offset |0110|o|type |00|
874 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
875 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
877 #ifndef __s390x__
878 #define __SWP_OFFSET_MASK (~0UL >> 12)
879 #else
880 #define __SWP_OFFSET_MASK (~0UL >> 11)
881 #endif
882 static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
884 pte_t pte;
885 offset &= __SWP_OFFSET_MASK;
886 pte_val(pte) = _PAGE_TYPE_SWAP | ((type & 0x1f) << 2) |
887 ((offset & 1UL) << 7) | ((offset & ~1UL) << 11);
888 return pte;
891 #define __swp_type(entry) (((entry).val >> 2) & 0x1f)
892 #define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1))
893 #define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
895 #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
896 #define __swp_entry_to_pte(x) ((pte_t) { (x).val })
898 #ifndef __s390x__
899 # define PTE_FILE_MAX_BITS 26
900 #else /* __s390x__ */
901 # define PTE_FILE_MAX_BITS 59
902 #endif /* __s390x__ */
904 #define pte_to_pgoff(__pte) \
905 ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
907 #define pgoff_to_pte(__off) \
908 ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
909 | _PAGE_TYPE_FILE })
911 #endif /* !__ASSEMBLY__ */
913 #define kern_addr_valid(addr) (1)
915 extern int add_shared_memory(unsigned long start, unsigned long size);
916 extern int remove_shared_memory(unsigned long start, unsigned long size);
919 * No page table caches to initialise
921 #define pgtable_cache_init() do { } while (0)
923 #define __HAVE_ARCH_MEMMAP_INIT
924 extern void memmap_init(unsigned long, int, unsigned long, unsigned long);
926 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
927 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
928 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
929 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
930 #define __HAVE_ARCH_PTEP_CLEAR_FLUSH
931 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
932 #define __HAVE_ARCH_PTE_SAME
933 #define __HAVE_ARCH_PAGE_TEST_DIRTY
934 #define __HAVE_ARCH_PAGE_CLEAR_DIRTY
935 #define __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
936 #include <asm-generic/pgtable.h>
938 #endif /* _S390_PAGE_H */