ia64/kvm: compilation fix. export account_system_vtime.
[pv_ops_mirror.git] / arch / cris / arch-v32 / drivers / pci / bios.c
blob5b79a7a772d4cae43c230429820acfff4a5d15e8
1 #include <linux/pci.h>
2 #include <linux/kernel.h>
3 #include <asm/arch/hwregs/intr_vect.h>
5 void __devinit pcibios_fixup_bus(struct pci_bus *b)
9 char * __devinit pcibios_setup(char *str)
11 return NULL;
14 void pcibios_set_master(struct pci_dev *dev)
16 u8 lat;
17 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
18 printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat);
19 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
22 int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
23 enum pci_mmap_state mmap_state, int write_combine)
25 unsigned long prot;
27 /* Leave vm_pgoff as-is, the PCI space address is the physical
28 * address on this platform.
30 prot = pgprot_val(vma->vm_page_prot);
31 vma->vm_page_prot = __pgprot(prot);
33 /* Write-combine setting is ignored, it is changed via the mtrr
34 * interfaces on this platform.
36 if (remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
37 vma->vm_end - vma->vm_start,
38 vma->vm_page_prot))
39 return -EAGAIN;
41 return 0;
44 void
45 pcibios_align_resource(void *data, struct resource *res,
46 resource_size_t size, resource_size_t align)
48 if (res->flags & IORESOURCE_IO) {
49 resource_size_t start = res->start;
51 if (start & 0x300) {
52 start = (start + 0x3ff) & ~0x3ff;
53 res->start = start;
58 int pcibios_enable_resources(struct pci_dev *dev, int mask)
60 u16 cmd, old_cmd;
61 int idx;
62 struct resource *r;
64 pci_read_config_word(dev, PCI_COMMAND, &cmd);
65 old_cmd = cmd;
66 for(idx=0; idx<6; idx++) {
67 /* Only set up the requested stuff */
68 if (!(mask & (1<<idx)))
69 continue;
71 r = &dev->resource[idx];
72 if (!r->start && r->end) {
73 printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev));
74 return -EINVAL;
76 if (r->flags & IORESOURCE_IO)
77 cmd |= PCI_COMMAND_IO;
78 if (r->flags & IORESOURCE_MEM)
79 cmd |= PCI_COMMAND_MEMORY;
81 if (dev->resource[PCI_ROM_RESOURCE].start)
82 cmd |= PCI_COMMAND_MEMORY;
83 if (cmd != old_cmd) {
84 printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd);
85 pci_write_config_word(dev, PCI_COMMAND, cmd);
87 return 0;
90 int pcibios_enable_irq(struct pci_dev *dev)
92 dev->irq = EXT_INTR_VECT;
93 return 0;
96 int pcibios_enable_device(struct pci_dev *dev, int mask)
98 int err;
100 if ((err = pcibios_enable_resources(dev, mask)) < 0)
101 return err;
103 if (!dev->msi_enabled)
104 pcibios_enable_irq(dev);
105 return 0;
108 int pcibios_assign_resources(void)
110 struct pci_dev *dev = NULL;
111 int idx;
112 struct resource *r;
114 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
115 int class = dev->class >> 8;
117 /* Don't touch classless devices and host bridges */
118 if (!class || class == PCI_CLASS_BRIDGE_HOST)
119 continue;
121 for(idx=0; idx<6; idx++) {
122 r = &dev->resource[idx];
124 if (!r->start && r->end)
125 pci_assign_resource(dev, idx);
128 return 0;
131 EXPORT_SYMBOL(pcibios_assign_resources);