2 * Powermac setup and early boot code plus other random bits.
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
7 * Adapted for Power Macintosh by Paul Mackerras
8 * Copyright (C) 1996 Paul Mackerras (paulus@samba.org)
10 * Derived from "arch/alpha/kernel/setup.c"
11 * Copyright (C) 1995 Linus Torvalds
13 * Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org)
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
23 * bootup setup stuff..
26 #include <linux/init.h>
27 #include <linux/errno.h>
28 #include <linux/sched.h>
29 #include <linux/kernel.h>
31 #include <linux/stddef.h>
32 #include <linux/unistd.h>
33 #include <linux/ptrace.h>
34 #include <linux/slab.h>
35 #include <linux/user.h>
36 #include <linux/a.out.h>
37 #include <linux/tty.h>
38 #include <linux/string.h>
39 #include <linux/delay.h>
40 #include <linux/ioport.h>
41 #include <linux/major.h>
42 #include <linux/initrd.h>
43 #include <linux/vt_kern.h>
44 #include <linux/console.h>
45 #include <linux/pci.h>
46 #include <linux/adb.h>
47 #include <linux/cuda.h>
48 #include <linux/pmu.h>
49 #include <linux/irq.h>
50 #include <linux/seq_file.h>
51 #include <linux/root_dev.h>
52 #include <linux/bitops.h>
53 #include <linux/suspend.h>
54 #include <linux/of_device.h>
55 #include <linux/of_platform.h>
56 #include <linux/lmb.h>
59 #include <asm/sections.h>
61 #include <asm/system.h>
62 #include <asm/pgtable.h>
64 #include <asm/kexec.h>
65 #include <asm/pci-bridge.h>
66 #include <asm/ohare.h>
67 #include <asm/mediabay.h>
68 #include <asm/machdep.h>
70 #include <asm/cputable.h>
71 #include <asm/btext.h>
72 #include <asm/pmac_feature.h>
74 #include <asm/mmu_context.h>
75 #include <asm/iommu.h>
82 #undef SHOW_GATWICK_IRQS
84 int ppc_override_l2cr
= 0;
85 int ppc_override_l2cr_value
;
90 static int current_root_goodness
= -1;
92 extern struct machdep_calls pmac_md
;
94 #define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */
100 extern void zs_kgdb_hook(int tty_num
);
102 sys_ctrler_t sys_ctrler
= SYS_CTRLER_UNKNOWN
;
103 EXPORT_SYMBOL(sys_ctrler
);
105 #ifdef CONFIG_PMAC_SMU
106 unsigned long smu_cmdbuf_abs
;
107 EXPORT_SYMBOL(smu_cmdbuf_abs
);
111 extern struct smp_ops_t psurge_smp_ops
;
112 extern struct smp_ops_t core99_smp_ops
;
113 #endif /* CONFIG_SMP */
115 static void pmac_show_cpuinfo(struct seq_file
*m
)
117 struct device_node
*np
;
121 unsigned int mbflags
;
124 mbmodel
= pmac_call_feature(PMAC_FTR_GET_MB_INFO
, NULL
,
125 PMAC_MB_INFO_MODEL
, 0);
126 mbflags
= pmac_call_feature(PMAC_FTR_GET_MB_INFO
, NULL
,
127 PMAC_MB_INFO_FLAGS
, 0);
128 if (pmac_call_feature(PMAC_FTR_GET_MB_INFO
, NULL
, PMAC_MB_INFO_NAME
,
129 (long) &mbname
) != 0)
132 /* find motherboard type */
133 seq_printf(m
, "machine\t\t: ");
134 np
= of_find_node_by_path("/");
136 pp
= of_get_property(np
, "model", NULL
);
138 seq_printf(m
, "%s\n", pp
);
140 seq_printf(m
, "PowerMac\n");
141 pp
= of_get_property(np
, "compatible", &plen
);
143 seq_printf(m
, "motherboard\t:");
145 int l
= strlen(pp
) + 1;
146 seq_printf(m
, " %s", pp
);
154 seq_printf(m
, "PowerMac\n");
156 /* print parsed model */
157 seq_printf(m
, "detected as\t: %d (%s)\n", mbmodel
, mbname
);
158 seq_printf(m
, "pmac flags\t: %08x\n", mbflags
);
160 /* find l2 cache info */
161 np
= of_find_node_by_name(NULL
, "l2-cache");
163 np
= of_find_node_by_type(NULL
, "cache");
165 const unsigned int *ic
=
166 of_get_property(np
, "i-cache-size", NULL
);
167 const unsigned int *dc
=
168 of_get_property(np
, "d-cache-size", NULL
);
169 seq_printf(m
, "L2 cache\t:");
171 if (of_get_property(np
, "cache-unified", NULL
) != 0 && dc
) {
172 seq_printf(m
, " %dK unified", *dc
/ 1024);
175 seq_printf(m
, " %dK instruction", *ic
/ 1024);
177 seq_printf(m
, "%s %dK data",
178 (ic
? " +": ""), *dc
/ 1024);
180 pp
= of_get_property(np
, "ram-type", NULL
);
182 seq_printf(m
, " %s", pp
);
187 /* Indicate newworld/oldworld */
188 seq_printf(m
, "pmac-generation\t: %s\n",
189 pmac_newworld
? "NewWorld" : "OldWorld");
192 #ifndef CONFIG_ADB_CUDA
193 int find_via_cuda(void)
195 struct device_node
*dn
= of_find_node_by_name(NULL
, "via-cuda");
200 printk("WARNING ! Your machine is CUDA-based but your kernel\n");
201 printk(" wasn't compiled with CONFIG_ADB_CUDA option !\n");
206 #ifndef CONFIG_ADB_PMU
207 int find_via_pmu(void)
209 struct device_node
*dn
= of_find_node_by_name(NULL
, "via-pmu");
214 printk("WARNING ! Your machine is PMU-based but your kernel\n");
215 printk(" wasn't compiled with CONFIG_ADB_PMU option !\n");
220 #ifndef CONFIG_PMAC_SMU
223 /* should check and warn if SMU is present */
229 static volatile u32
*sysctrl_regs
;
231 static void __init
ohare_init(void)
233 struct device_node
*dn
;
235 /* this area has the CPU identification register
236 and some registers used by smp boards */
237 sysctrl_regs
= (volatile u32
*) ioremap(0xf8000000, 0x1000);
240 * Turn on the L2 cache.
241 * We assume that we have a PSX memory controller iff
242 * we have an ohare I/O controller.
244 dn
= of_find_node_by_name(NULL
, "ohare");
247 if (((sysctrl_regs
[2] >> 24) & 0xf) >= 3) {
248 if (sysctrl_regs
[4] & 0x10)
249 sysctrl_regs
[4] |= 0x04000020;
251 sysctrl_regs
[4] |= 0x04000000;
253 printk(KERN_INFO
"Level 2 cache enabled\n");
258 static void __init
l2cr_init(void)
260 /* Checks "l2cr-value" property in the registry */
261 if (cpu_has_feature(CPU_FTR_L2CR
)) {
262 struct device_node
*np
= of_find_node_by_name(NULL
, "cpus");
264 np
= of_find_node_by_type(NULL
, "cpu");
266 const unsigned int *l2cr
=
267 of_get_property(np
, "l2cr-value", NULL
);
269 ppc_override_l2cr
= 1;
270 ppc_override_l2cr_value
= *l2cr
;
272 _set_L2CR(ppc_override_l2cr_value
);
278 if (ppc_override_l2cr
)
279 printk(KERN_INFO
"L2CR overridden (0x%x), "
280 "backside cache is %s\n",
281 ppc_override_l2cr_value
,
282 (ppc_override_l2cr_value
& 0x80000000)
283 ? "enabled" : "disabled");
287 static void __init
pmac_setup_arch(void)
289 struct device_node
*cpu
, *ic
;
293 pvr
= PVR_VER(mfspr(SPRN_PVR
));
295 /* Set loops_per_jiffy to a half-way reasonable value,
296 for use until calibrate_delay gets called. */
297 loops_per_jiffy
= 50000000 / HZ
;
298 cpu
= of_find_node_by_type(NULL
, "cpu");
300 fp
= of_get_property(cpu
, "clock-frequency", NULL
);
302 if (pvr
>= 0x30 && pvr
< 0x80)
304 loops_per_jiffy
= *fp
/ (3 * HZ
);
305 else if (pvr
== 4 || pvr
>= 8)
306 /* 604, G3, G4 etc. */
307 loops_per_jiffy
= *fp
/ HZ
;
310 loops_per_jiffy
= *fp
/ (2 * HZ
);
315 /* See if newworld or oldworld */
316 for (ic
= NULL
; (ic
= of_find_all_nodes(ic
)) != NULL
; )
317 if (of_get_property(ic
, "interrupt-controller", NULL
))
324 /* Lookup PCI hosts */
330 #endif /* CONFIG_PPC32 */
340 #if defined(CONFIG_NVRAM) || defined(CONFIG_NVRAM_MODULE) || \
341 defined(CONFIG_PPC64)
346 #ifdef CONFIG_BLK_DEV_INITRD
348 ROOT_DEV
= Root_RAM0
;
351 ROOT_DEV
= DEFAULT_ROOT_DEVICE
;
355 /* Check for Core99 */
356 ic
= of_find_node_by_name(NULL
, "uni-n");
358 ic
= of_find_node_by_name(NULL
, "u3");
360 ic
= of_find_node_by_name(NULL
, "u4");
363 smp_ops
= &core99_smp_ops
;
368 * We have to set bits in cpu_possible_map here since the
369 * secondary CPU(s) aren't in the device tree, and
370 * setup_per_cpu_areas only allocates per-cpu data for
371 * CPUs in the cpu_possible_map.
375 for (cpu
= 1; cpu
< 4 && cpu
< NR_CPUS
; ++cpu
)
376 cpu_set(cpu
, cpu_possible_map
);
377 smp_ops
= &psurge_smp_ops
;
380 #endif /* CONFIG_SMP */
383 if (strstr(cmd_line
, "adb_sync")) {
384 extern int __adb_probe_sync
;
385 __adb_probe_sync
= 1;
387 #endif /* CONFIG_ADB */
391 void note_scsi_host(struct device_node
*node
, void *host
)
394 EXPORT_SYMBOL(note_scsi_host
);
397 static int initializing
= 1;
399 static int pmac_late_init(void)
402 /* this is udbg (which is __init) and we can later use it during
403 * cpu hotplug (in smp_core99_kick_cpu) */
404 ppc_md
.progress
= NULL
;
407 machine_late_initcall(powermac
, pmac_late_init
);
410 * This is __init_refok because we check for "initializing" before
411 * touching any of the __init sensitive things and "initializing"
412 * will be false after __init time. This can't be __init because it
413 * can be called whenever a disk is first accessed.
415 void __init_refok
note_bootable_part(dev_t dev
, int part
, int goodness
)
421 if ((goodness
<= current_root_goodness
) &&
422 ROOT_DEV
!= DEFAULT_ROOT_DEVICE
)
424 p
= strstr(boot_command_line
, "root=");
425 if (p
!= NULL
&& (p
== boot_command_line
|| p
[-1] == ' '))
428 ROOT_DEV
= dev
+ part
;
429 current_root_goodness
= goodness
;
432 #ifdef CONFIG_ADB_CUDA
433 static void cuda_restart(void)
435 struct adb_request req
;
437 cuda_request(&req
, NULL
, 2, CUDA_PACKET
, CUDA_RESET_SYSTEM
);
442 static void cuda_shutdown(void)
444 struct adb_request req
;
446 cuda_request(&req
, NULL
, 2, CUDA_PACKET
, CUDA_POWERDOWN
);
452 #define cuda_restart()
453 #define cuda_shutdown()
456 #ifndef CONFIG_ADB_PMU
457 #define pmu_restart()
458 #define pmu_shutdown()
461 #ifndef CONFIG_PMAC_SMU
462 #define smu_restart()
463 #define smu_shutdown()
466 static void pmac_restart(char *cmd
)
468 switch (sys_ctrler
) {
469 case SYS_CTRLER_CUDA
:
482 static void pmac_power_off(void)
484 switch (sys_ctrler
) {
485 case SYS_CTRLER_CUDA
:
505 * Early initialization.
507 static void __init
pmac_init_early(void)
509 /* Enable early btext debug if requested */
510 if (strstr(cmd_line
, "btextdbg")) {
511 udbg_adb_init_early();
512 register_early_udbg_console();
515 /* Probe motherboard chipset */
518 /* Initialize debug stuff */
519 udbg_scc_init(!!strstr(cmd_line
, "sccdbg"));
520 udbg_adb_init(!!strstr(cmd_line
, "btextdbg"));
523 iommu_init_early_dart();
527 static int __init
pmac_declare_of_platform_devices(void)
529 struct device_node
*np
;
531 if (machine_is(chrp
))
534 np
= of_find_node_by_name(NULL
, "valkyrie");
536 of_platform_device_create(np
, "valkyrie", NULL
);
537 np
= of_find_node_by_name(NULL
, "platinum");
539 of_platform_device_create(np
, "platinum", NULL
);
540 np
= of_find_node_by_type(NULL
, "smu");
542 of_platform_device_create(np
, "smu", NULL
);
548 machine_device_initcall(powermac
, pmac_declare_of_platform_devices
);
551 * Called very early, MMU is off, device-tree isn't unflattened
553 static int __init
pmac_probe(void)
555 unsigned long root
= of_get_flat_dt_root();
557 if (!of_flat_dt_is_compatible(root
, "Power Macintosh") &&
558 !of_flat_dt_is_compatible(root
, "MacRISC"))
563 * On U3, the DART (iommu) must be allocated now since it
564 * has an impact on htab_initialize (due to the large page it
565 * occupies having to be broken up so the DART itself is not
566 * part of the cacheable linar mapping
574 /* isa_io_base gets set in pmac_pci_init */
575 ISA_DMA_THRESHOLD
= ~0L;
578 #endif /* CONFIG_PPC32 */
580 #ifdef CONFIG_PMAC_SMU
582 * SMU based G5s need some memory below 2Gb, at least the current
583 * driver needs that. We have to allocate it now. We allocate 4k
584 * (1 small page) for now.
586 smu_cmdbuf_abs
= lmb_alloc_base(4096, 4096, 0x80000000UL
);
587 #endif /* CONFIG_PMAC_SMU */
593 /* Move that to pci.c */
594 static int pmac_pci_probe_mode(struct pci_bus
*bus
)
596 struct device_node
*node
= bus
->sysdata
;
598 /* We need to use normal PCI probing for the AGP bus,
599 * since the device for the AGP bridge isn't in the tree.
600 * Same for the PCIe host on U4 and the HT host bridge.
602 if (bus
->self
== NULL
&& (of_device_is_compatible(node
, "u3-agp") ||
603 of_device_is_compatible(node
, "u4-pcie") ||
604 of_device_is_compatible(node
, "u3-ht")))
605 return PCI_PROBE_NORMAL
;
606 return PCI_PROBE_DEVTREE
;
609 #ifdef CONFIG_HOTPLUG_CPU
610 /* access per cpu vars from generic smp.c */
611 DECLARE_PER_CPU(int, cpu_state
);
613 static void pmac_cpu_die(void)
616 * turn off as much as possible, we'll be
617 * kicked out as this will only be invoked
618 * on core99 platforms for now ...
621 printk(KERN_INFO
"CPU#%d offline\n", smp_processor_id());
622 __get_cpu_var(cpu_state
) = CPU_DEAD
;
626 * during the path that leads here preemption is disabled,
627 * reenable it now so that when coming up preempt count is
633 * hard-disable interrupts for the non-NAP case, the NAP code
634 * needs to re-enable interrupts (but soft-disables them)
639 /* let's not take timer interrupts too often ... */
642 /* should always be true at this point */
643 if (cpu_has_feature(CPU_FTR_CAN_NAP
))
644 power4_cpu_offline_powersave();
651 #endif /* CONFIG_HOTPLUG_CPU */
653 #endif /* CONFIG_PPC64 */
655 define_machine(powermac
) {
658 .setup_arch
= pmac_setup_arch
,
659 .init_early
= pmac_init_early
,
660 .show_cpuinfo
= pmac_show_cpuinfo
,
661 .init_IRQ
= pmac_pic_init
,
662 .get_irq
= NULL
, /* changed later */
663 .pci_irq_fixup
= pmac_pci_irq_fixup
,
664 .restart
= pmac_restart
,
665 .power_off
= pmac_power_off
,
667 .time_init
= pmac_time_init
,
668 .get_boot_time
= pmac_get_boot_time
,
669 .set_rtc_time
= pmac_set_rtc_time
,
670 .get_rtc_time
= pmac_get_rtc_time
,
671 .calibrate_decr
= pmac_calibrate_decr
,
672 .feature_call
= pmac_do_feature_call
,
673 .progress
= udbg_progress
,
675 .pci_probe_mode
= pmac_pci_probe_mode
,
676 .power_save
= power4_idle
,
677 .enable_pmcs
= power4_enable_pmcs
,
679 .machine_kexec
= default_machine_kexec
,
680 .machine_kexec_prepare
= default_machine_kexec_prepare
,
681 .machine_crash_shutdown
= default_machine_crash_shutdown
,
683 #endif /* CONFIG_PPC64 */
685 .pcibios_enable_device_hook
= pmac_pci_enable_device_hook
,
686 .pcibios_after_init
= pmac_pcibios_after_init
,
687 .phys_mem_access_prot
= pci_phys_mem_access_prot
,
689 #if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC64)
690 .cpu_die
= pmac_cpu_die
,