2 * Common prep boot and setup code.
5 #include <linux/module.h>
6 #include <linux/string.h>
7 #include <linux/sched.h>
8 #include <linux/init.h>
9 #include <linux/kernel.h>
10 #include <linux/reboot.h>
11 #include <linux/delay.h>
12 #include <linux/initrd.h>
13 #include <linux/screen_info.h>
14 #include <linux/bootmem.h>
15 #include <linux/seq_file.h>
16 #include <linux/root_dev.h>
17 #include <linux/cpu.h>
18 #include <linux/console.h>
20 #include <asm/residual.h>
23 #include <asm/processor.h>
24 #include <asm/pgtable.h>
25 #include <asm/bootinfo.h>
26 #include <asm/setup.h>
29 #include <asm/cputable.h>
30 #include <asm/bootx.h>
31 #include <asm/btext.h>
32 #include <asm/machdep.h>
33 #include <asm/uaccess.h>
34 #include <asm/system.h>
35 #include <asm/sections.h>
36 #include <asm/nvram.h>
41 #define USES_PPC_SYS (defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \
42 defined(CONFIG_PPC_MPC52xx))
45 #include <asm/ppc_sys.h>
48 #if defined CONFIG_KGDB
52 extern void platform_init(unsigned long r3
, unsigned long r4
,
53 unsigned long r5
, unsigned long r6
, unsigned long r7
);
54 extern void reloc_got2(unsigned long offset
);
56 extern void ppc6xx_idle(void);
57 extern void power4_idle(void);
59 extern boot_infos_t
*boot_infos
;
61 /* Used with the BI_MEMSIZE bootinfo parameter to store the memory
62 size value reported by the boot loader. */
63 unsigned long boot_mem_size
;
65 unsigned long ISA_DMA_THRESHOLD
;
66 unsigned int DMA_MODE_READ
;
67 unsigned int DMA_MODE_WRITE
;
69 #ifdef CONFIG_PPC_PREP
70 extern void prep_init(unsigned long r3
, unsigned long r4
,
71 unsigned long r5
, unsigned long r6
, unsigned long r7
);
74 #endif /* CONFIG_PPC_PREP */
77 EXPORT_SYMBOL(have_of
);
80 int ppc_do_canonicalize_irqs
;
81 EXPORT_SYMBOL(ppc_do_canonicalize_irqs
);
84 #ifdef CONFIG_VGA_CONSOLE
85 unsigned long vgacon_remap_base
;
88 struct machdep_calls ppc_md
;
91 * These are used in binfmt_elf.c to put aux entries on the stack
92 * for each elf executable being started.
98 #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_FB_VGA16) || \
99 defined(CONFIG_FB_VGA16_MODULE) || defined(CONFIG_FB_VESA)
100 struct screen_info screen_info
= {
101 0, 25, /* orig-x, orig-y */
103 0, /* orig-video-page */
104 0, /* orig-video-mode */
105 80, /* orig-video-cols */
106 0,0,0, /* ega_ax, ega_bx, ega_cx */
107 25, /* orig-video-lines */
108 1, /* orig-video-isVGA */
109 16 /* orig-video-points */
111 #endif /* CONFIG_VGA_CONSOLE || CONFIG_FB_VGA16 || CONFIG_FB_VESA */
113 void machine_restart(char *cmd
)
121 static void ppc_generic_power_off(void)
126 void machine_halt(void)
134 void (*pm_power_off
)(void) = ppc_generic_power_off
;
136 void machine_power_off(void)
143 ppc_generic_power_off();
147 extern u32
cpu_temp(unsigned long cpu
);
148 extern u32
cpu_temp_both(unsigned long cpu
);
149 #endif /* CONFIG_TAU */
151 int show_cpuinfo(struct seq_file
*m
, void *v
)
156 unsigned short maj
, min
;
160 /* Show summary information */
162 unsigned long bogosum
= 0;
163 for_each_online_cpu(i
)
164 bogosum
+= cpu_data
[i
].loops_per_jiffy
;
165 seq_printf(m
, "total bogomips\t: %lu.%02lu\n",
166 bogosum
/(500000/HZ
), bogosum
/(5000/HZ
) % 100);
167 #endif /* CONFIG_SMP */
169 if (ppc_md
.show_cpuinfo
!= NULL
)
170 err
= ppc_md
.show_cpuinfo(m
);
177 pvr
= cpu_data
[i
].pvr
;
178 lpj
= cpu_data
[i
].loops_per_jiffy
;
180 pvr
= mfspr(SPRN_PVR
);
181 lpj
= loops_per_jiffy
;
184 seq_printf(m
, "processor\t: %d\n", i
);
185 seq_printf(m
, "cpu\t\t: ");
187 if (cur_cpu_spec
->pvr_mask
)
188 seq_printf(m
, "%s", cur_cpu_spec
->cpu_name
);
190 seq_printf(m
, "unknown (%08x)", pvr
);
191 #ifdef CONFIG_ALTIVEC
192 if (cur_cpu_spec
->cpu_features
& CPU_FTR_ALTIVEC
)
193 seq_printf(m
, ", altivec supported");
198 if (cur_cpu_spec
->cpu_features
& CPU_FTR_TAU
) {
199 #ifdef CONFIG_TAU_AVERAGE
200 /* more straightforward, but potentially misleading */
201 seq_printf(m
, "temperature \t: %u C (uncalibrated)\n",
204 /* show the actual temp sensor range */
206 temp
= cpu_temp_both(i
);
207 seq_printf(m
, "temperature \t: %u-%u C (uncalibrated)\n",
208 temp
& 0xff, temp
>> 16);
211 #endif /* CONFIG_TAU */
213 if (ppc_md
.show_percpuinfo
!= NULL
) {
214 err
= ppc_md
.show_percpuinfo(m
, i
);
219 /* If we are a Freescale core do a simple check so
220 * we dont have to keep adding cases in the future */
221 if ((PVR_VER(pvr
) & 0x8000) == 0x8000) {
225 switch (PVR_VER(pvr
)) {
226 case 0x0020: /* 403 family */
227 maj
= PVR_MAJ(pvr
) + 1;
230 case 0x1008: /* 740P/750P ?? */
231 maj
= ((pvr
>> 8) & 0xFF) - 1;
235 maj
= (pvr
>> 8) & 0xFF;
241 seq_printf(m
, "revision\t: %hd.%hd (pvr %04x %04x)\n",
242 maj
, min
, PVR_VER(pvr
), PVR_REV(pvr
));
244 seq_printf(m
, "bogomips\t: %lu.%02lu\n",
245 lpj
/ (500000/HZ
), (lpj
/ (5000/HZ
)) % 100);
248 if (cur_ppc_sys_spec
->ppc_sys_name
)
249 seq_printf(m
, "chipset\t\t: %s\n",
250 cur_ppc_sys_spec
->ppc_sys_name
);
260 static void *c_start(struct seq_file
*m
, loff_t
*pos
)
264 return i
<= NR_CPUS
? (void *) (i
+ 1): NULL
;
267 static void *c_next(struct seq_file
*m
, void *v
, loff_t
*pos
)
270 return c_start(m
, pos
);
273 static void c_stop(struct seq_file
*m
, void *v
)
277 const struct seq_operations cpuinfo_op
= {
281 .show
= show_cpuinfo
,
285 * We're called here very early in the boot. We determine the machine
286 * type and call the appropriate low-level setup functions.
287 * -- Cort <cort@fsmlabs.com>
289 * Note that the kernel may be running at an address which is different
290 * from the address that it was linked at, so we must use RELOC/PTRRELOC
291 * to access static data (including strings). -- paulus
295 early_init(int r3
, int r4
, int r5
)
298 unsigned long offset
= reloc_offset();
299 struct cpu_spec
*spec
;
302 phys
= offset
+ KERNELBASE
;
304 /* First zero the BSS -- use memset, some arches don't have
306 memset_io(PTRRELOC(&__bss_start
), 0, _end
- __bss_start
);
309 * Identify the CPU type and fix up code sections
310 * that depend on which cpu we have.
312 #if defined(CONFIG_440EP) && defined(CONFIG_PPC_FPU)
313 /* We pass the virtual PVR here for 440EP as 440EP and 440GR have
314 * identical PVRs and there is no reliable way to check for the FPU
316 spec
= identify_cpu(offset
, (mfspr(SPRN_PVR
) | 0x8));
318 spec
= identify_cpu(offset
, mfspr(SPRN_PVR
));
320 do_feature_fixups(spec
->cpu_features
,
321 PTRRELOC(&__start___ftr_fixup
),
322 PTRRELOC(&__stop___ftr_fixup
));
327 #ifdef CONFIG_PPC_PREP
329 * The PPC_PREP version of platform_init...
332 platform_init(unsigned long r3
, unsigned long r4
, unsigned long r5
,
333 unsigned long r6
, unsigned long r7
)
335 #ifdef CONFIG_BOOTX_TEXT
336 if (boot_text_mapped
) {
342 parse_bootinfo(find_bootinfo());
344 prep_init(r3
, r4
, r5
, r6
, r7
);
346 #endif /* CONFIG_PPC_PREP */
348 struct bi_record
*find_bootinfo(void)
350 struct bi_record
*rec
;
352 rec
= (struct bi_record
*)_ALIGN((ulong
)__bss_start
+(1<<20)-1,(1<<20));
353 if ( rec
->tag
!= BI_FIRST
) {
355 * This 0x10000 offset is a terrible hack but it will go away when
356 * we have the bootloader handle all the relocation and
359 rec
= (struct bi_record
*)_ALIGN((ulong
)__bss_start
+0x10000+(1<<20)-1,(1<<20));
360 if ( rec
->tag
!= BI_FIRST
)
366 void parse_bootinfo(struct bi_record
*rec
)
368 if (rec
== NULL
|| rec
->tag
!= BI_FIRST
)
370 while (rec
->tag
!= BI_LAST
) {
371 ulong
*data
= rec
->data
;
374 strlcpy(cmd_line
, (void *)data
, sizeof(cmd_line
));
376 #ifdef CONFIG_BLK_DEV_INITRD
378 initrd_start
= data
[0] + KERNELBASE
;
379 initrd_end
= data
[0] + data
[1] + KERNELBASE
;
381 #endif /* CONFIG_BLK_DEV_INITRD */
383 boot_mem_size
= data
[0];
386 rec
= (struct bi_record
*)((ulong
)rec
+ rec
->size
);
391 * Find out what kind of machine we're on and save any data we need
392 * from the early boot process (devtree is copied on pmac by prom_init()).
393 * This is called very early on the boot process, after a minimal
394 * MMU environment has been set up but before MMU_init is called.
397 machine_init(unsigned long r3
, unsigned long r4
, unsigned long r5
,
398 unsigned long r6
, unsigned long r7
)
400 #ifdef CONFIG_CMDLINE
401 strlcpy(cmd_line
, CONFIG_CMDLINE
, sizeof(cmd_line
));
402 #endif /* CONFIG_CMDLINE */
405 ppc_md
.power_save
= ppc6xx_idle
;
408 platform_init(r3
, r4
, r5
, r6
, r7
);
411 ppc_md
.progress("id mach(): done", 0x200);
413 #ifdef CONFIG_BOOKE_WDT
414 /* Checks wdt=x and wdt_period=xx command-line option */
415 int __init
early_parse_wdt(char *p
)
417 if (p
&& strncmp(p
, "0", 1) != 0)
418 booke_wdt_enabled
= 1;
422 early_param("wdt", early_parse_wdt
);
424 int __init
early_parse_wdt_period (char *p
)
427 booke_wdt_period
= simple_strtoul(p
, NULL
, 0);
431 early_param("wdt_period", early_parse_wdt_period
);
432 #endif /* CONFIG_BOOKE_WDT */
434 /* Checks "l2cr=xxxx" command-line option */
435 int __init
ppc_setup_l2cr(char *str
)
437 if (cpu_has_feature(CPU_FTR_L2CR
)) {
438 unsigned long val
= simple_strtoul(str
, NULL
, 0);
439 printk(KERN_INFO
"l2cr set to %lx\n", val
);
440 _set_L2CR(0); /* force invalidate by disable cache */
441 _set_L2CR(val
); /* and enable it */
445 __setup("l2cr=", ppc_setup_l2cr
);
447 #ifdef CONFIG_GENERIC_NVRAM
449 /* Generic nvram hooks used by drivers/char/gen_nvram.c */
450 unsigned char nvram_read_byte(int addr
)
452 if (ppc_md
.nvram_read_val
)
453 return ppc_md
.nvram_read_val(addr
);
456 EXPORT_SYMBOL(nvram_read_byte
);
458 void nvram_write_byte(unsigned char val
, int addr
)
460 if (ppc_md
.nvram_write_val
)
461 ppc_md
.nvram_write_val(addr
, val
);
463 EXPORT_SYMBOL(nvram_write_byte
);
465 void nvram_sync(void)
467 if (ppc_md
.nvram_sync
)
470 EXPORT_SYMBOL(nvram_sync
);
472 #endif /* CONFIG_NVRAM */
474 static struct cpu cpu_devices
[NR_CPUS
];
476 int __init
ppc_init(void)
480 /* clear the progress line */
481 if ( ppc_md
.progress
) ppc_md
.progress(" ", 0xffff);
483 /* register CPU devices */
484 for_each_possible_cpu(i
)
485 register_cpu(&cpu_devices
[i
], i
);
487 /* call platform init */
488 if (ppc_md
.init
!= NULL
) {
494 arch_initcall(ppc_init
);
496 /* Warning, IO base is not yet inited */
497 void __init
setup_arch(char **cmdline_p
)
500 extern void do_init_bootmem(void);
502 /* so udelay does something sensible, assume <= 1000 bogomips */
503 loops_per_jiffy
= 500000000 / HZ
;
505 if (ppc_md
.init_early
)
510 if (strstr(cmd_line
, "xmon"))
512 #endif /* CONFIG_XMON */
513 if ( ppc_md
.progress
) ppc_md
.progress("setup_arch: enter", 0x3eab);
515 #if defined(CONFIG_KGDB)
516 if (ppc_md
.kgdb_map_scc
)
517 ppc_md
.kgdb_map_scc();
519 if (strstr(cmd_line
, "gdb")) {
521 ppc_md
.progress("setup_arch: kgdb breakpoint", 0x4000);
522 printk("kgdb breakpoint activated\n");
528 * Set cache line size based on type of cpu as a default.
529 * Systems with OF can look in the properties on the cpu node(s)
530 * for a possibly more accurate value.
532 if (! cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE
)) {
533 dcache_bsize
= cur_cpu_spec
->dcache_bsize
;
534 icache_bsize
= cur_cpu_spec
->icache_bsize
;
537 ucache_bsize
= dcache_bsize
= icache_bsize
538 = cur_cpu_spec
->dcache_bsize
;
540 /* reboot on panic */
543 init_mm
.start_code
= PAGE_OFFSET
;
544 init_mm
.end_code
= (unsigned long) _etext
;
545 init_mm
.end_data
= (unsigned long) _edata
;
546 init_mm
.brk
= (unsigned long) klimit
;
548 /* Save unparsed command line copy for /proc/cmdline */
549 strlcpy(boot_command_line
, cmd_line
, COMMAND_LINE_SIZE
);
550 *cmdline_p
= cmd_line
;
554 /* set up the bootmem stuff with available memory */
556 if ( ppc_md
.progress
) ppc_md
.progress("setup_arch: bootmem", 0x3eab);
558 #ifdef CONFIG_PPC_OCP
559 /* Initialize OCP device list */
561 if ( ppc_md
.progress
) ppc_md
.progress("ocp: exit", 0x3eab);
564 #ifdef CONFIG_DUMMY_CONSOLE
565 conswitchp
= &dummy_con
;
569 if ( ppc_md
.progress
) ppc_md
.progress("arch: exit", 0x3eab);