arch/ppc/platforms/lopec.c

   1 /*
   2  * Setup routines for the Motorola LoPEC.
   3  *
   4  * Author: Dan Cox
   5  * Maintainer: Tom Rini <trini@kernel.crashing.org>
   6  *
   7  * 2001-2004 (c) MontaVista, Software, Inc.  This file is licensed under
   8  * the terms of the GNU General Public License version 2.  This program
   9  * is licensed "as is" without any warranty of any kind, whether express
  10  * or implied.
  11  */
  12
  13 #include <linux/types.h>
  14 #include <linux/delay.h>
  15 #include <linux/pci_ids.h>
  16 #include <linux/ioport.h>
  17 #include <linux/init.h>
  18 #include <linux/seq_file.h>
  19 #include <linux/initrd.h>
  20 #include <linux/console.h>
  21 #include <linux/root_dev.h>
  22 #include <linux/pci.h>
  23
  24 #include <asm/machdep.h>
  25 #include <asm/pci-bridge.h>
  26 #include <asm/io.h>
  27 #include <asm/open_pic.h>
  28 #include <asm/i8259.h>
  29 #include <asm/todc.h>
  30 #include <asm/bootinfo.h>
  31 #include <asm/mpc10x.h>
  32 #include <asm/hw_irq.h>
  33 #include <asm/prep_nvram.h>
  34 #include <asm/kgdb.h>
  35
  36 /*
  37  * Define all of the IRQ senses and polarities.  Taken from the
  38  * LoPEC Programmer's Reference Guide.
  39  */
  40 static u_char lopec_openpic_initsenses[16] __initdata = {
  41         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* IRQ 0 */
  42         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 1 */
  43         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* IRQ 2 */
  44         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 3 */
  45         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* IRQ 4 */
  46         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* IRQ 5 */
  47         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 6 */
  48         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 7 */
  49         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 8 */
  50         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 9 */
  51         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 10 */
  52         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 11 */
  53         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),      /* IRQ 12 */
  54         (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),      /* IRQ 13 */
  55         (IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE),       /* IRQ 14 */
  56         (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE)       /* IRQ 15 */
  57 };
  58
  59 static inline int __init
  60 lopec_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
  61 {
  62         int irq;
  63         static char pci_irq_table[][4] = {
  64                 {16, 0, 0, 0}, /* ID 11 - Winbond */
  65                 {22, 0, 0, 0}, /* ID 12 - SCSI */
  66                 {0, 0, 0, 0}, /* ID 13 - nothing */
  67                 {17, 0, 0, 0}, /* ID 14 - 82559 Ethernet */
  68                 {27, 0, 0, 0}, /* ID 15 - USB */
  69                 {23, 0, 0, 0}, /* ID 16 - PMC slot 1 */
  70                 {24, 0, 0, 0}, /* ID 17 - PMC slot 2 */
  71                 {25, 0, 0, 0}, /* ID 18 - PCI slot */
  72                 {0, 0, 0, 0}, /* ID 19 - nothing */
  73                 {0, 0, 0, 0}, /* ID 20 - nothing */
  74                 {0, 0, 0, 0}, /* ID 21 - nothing */
  75                 {0, 0, 0, 0}, /* ID 22 - nothing */
  76                 {0, 0, 0, 0}, /* ID 23 - nothing */
  77                 {0, 0, 0, 0}, /* ID 24 - PMC slot 1b */
  78                 {0, 0, 0, 0}, /* ID 25 - nothing */
  79                 {0, 0, 0, 0}  /* ID 26 - PMC Slot 2b */
  80         };
  81         const long min_idsel = 11, max_idsel = 26, irqs_per_slot = 4;
  82
  83         irq = PCI_IRQ_TABLE_LOOKUP;
  84         if (!irq)
  85                 return 0;
  86
  87         return irq;
  88 }
  89
  90 static void __init
  91 lopec_setup_winbond_83553(struct pci_controller *hose)
  92 {
  93         int devfn;
  94
  95         devfn = PCI_DEVFN(11,0);
  96
  97         /* IDE interrupt routing (primary 14, secondary 15) */
  98         early_write_config_byte(hose, 0, devfn, 0x43, 0xef);
  99         /* PCI interrupt routing */
 100         early_write_config_word(hose, 0, devfn, 0x44, 0x0000);
 101
 102         /* ISA-PCI address decoder */
 103         early_write_config_byte(hose, 0, devfn, 0x48, 0xf0);
 104
 105         /* RTC, kb, not used in PPC */
 106         early_write_config_byte(hose, 0, devfn, 0x4d, 0x00);
 107         early_write_config_byte(hose, 0, devfn, 0x4e, 0x04);
 108         devfn = PCI_DEVFN(11, 1);
 109         early_write_config_byte(hose, 0, devfn, 0x09, 0x8f);
 110         early_write_config_dword(hose, 0, devfn, 0x40, 0x00ff0011);
 111 }
 112
 113 static void __init
 114 lopec_find_bridges(void)
 115 {
 116         struct pci_controller *hose;
 117
 118         hose = pcibios_alloc_controller();
 119         if (!hose)
 120                 return;
 121
 122         hose->first_busno = 0;
 123         hose->last_busno = 0xff;
 124
 125         if (mpc10x_bridge_init(hose, MPC10X_MEM_MAP_B, MPC10X_MEM_MAP_B,
 126                                 MPC10X_MAPB_EUMB_BASE) == 0) {
 127
 128                 hose->mem_resources[0].end = 0xffffffff;
 129                 lopec_setup_winbond_83553(hose);
 130                 hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
 131                 ppc_md.pci_swizzle = common_swizzle;
 132                 ppc_md.pci_map_irq = lopec_map_irq;
 133         }
 134 }
 135
 136 static int
 137 lopec_show_cpuinfo(struct seq_file *m)
 138 {
 139         seq_printf(m, "machine\t\t: Motorola LoPEC\n");
 140         return 0;
 141 }
 142
 143 static void
 144 lopec_restart(char *cmd)
 145 {
 146 #define LOPEC_SYSSTAT1 0xffe00000
 147         /* force a hard reset, if possible */
 148         unsigned char reg = *((unsigned char *) LOPEC_SYSSTAT1);
 149         reg |= 0x80;
 150         *((unsigned char *) LOPEC_SYSSTAT1) = reg;
 151
 152         local_irq_disable();
 153         while(1);
 154 #undef LOPEC_SYSSTAT1
 155 }
 156
 157 static void
 158 lopec_halt(void)
 159 {
 160         local_irq_disable();
 161         while(1);
 162 }
 163
 164 static void
 165 lopec_power_off(void)
 166 {
 167         lopec_halt();
 168 }
 169
 170 static void __init
 171 lopec_init_IRQ(void)
 172 {
 173         int i;
 174
 175         /*
 176          * Provide the open_pic code with the correct table of interrupts.
 177          */
 178         OpenPIC_InitSenses = lopec_openpic_initsenses;
 179         OpenPIC_NumInitSenses = sizeof(lopec_openpic_initsenses);
 180
 181         mpc10x_set_openpic();
 182
 183         /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
 184         openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
 185                         &i8259_irq);
 186
 187         /*
 188          * The EPIC allows for a read in the range of 0xFEF00000 ->
 189          * 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction.
 190          */
 191         i8259_init(0xfef00000, 0);
 192 }
 193
 194 static int __init
 195 lopec_request_io(void)
 196 {
 197         outb(0x00, 0x4d0);
 198         outb(0xc0, 0x4d1);
 199
 200         request_region(0x00, 0x20, "dma1");
 201         request_region(0x20, 0x20, "pic1");
 202         request_region(0x40, 0x20, "timer");
 203         request_region(0x80, 0x10, "dma page reg");
 204         request_region(0xa0, 0x20, "pic2");
 205         request_region(0xc0, 0x20, "dma2");
 206
 207         return 0;
 208 }
 209
 210 device_initcall(lopec_request_io);
 211
 212 static void __init
 213 lopec_map_io(void)
 214 {
 215         io_block_mapping(0xf0000000, 0xf0000000, 0x10000000, _PAGE_IO);
 216         io_block_mapping(0xb0000000, 0xb0000000, 0x10000000, _PAGE_IO);
 217 }
 218
 219 /*
 220  * Set BAT 3 to map 0xf8000000 to end of physical memory space 1-to-1.
 221  */
 222 static __inline__ void
 223 lopec_set_bat(void)
 224 {
 225         mb();
 226         mtspr(SPRN_DBAT1U, 0xf8000ffe);
 227         mtspr(SPRN_DBAT1L, 0xf800002a);
 228         mb();
 229 }
 230
 231 TODC_ALLOC();
 232
 233 static void __init
 234 lopec_setup_arch(void)
 235 {
 236
 237         TODC_INIT(TODC_TYPE_MK48T37, 0, 0,
 238                   ioremap(0xffe80000, 0x8000), 8);
 239
 240         loops_per_jiffy = 100000000/HZ;
 241
 242         lopec_find_bridges();
 243
 244 #ifdef CONFIG_BLK_DEV_INITRD
 245         if (initrd_start)
 246                 ROOT_DEV = Root_RAM0;
 247         else
 248 #elif defined(CONFIG_ROOT_NFS)
 249                 ROOT_DEV = Root_NFS;
 250 #elif defined(CONFIG_BLK_DEV_IDEDISK)
 251                 ROOT_DEV = Root_HDA1;
 252 #else
 253                 ROOT_DEV = Root_SDA1;
 254 #endif
 255
 256 #ifdef CONFIG_PPCBUG_NVRAM
 257         /* Read in NVRAM data */
 258         init_prep_nvram();
 259
 260         /* if no bootargs, look in NVRAM */
 261         if ( cmd_line[0] == '\0' ) {
 262                 char *bootargs;
 263                  bootargs = prep_nvram_get_var("bootargs");
 264                  if (bootargs != NULL) {
 265                          strcpy(cmd_line, bootargs);
 266                          /* again.. */
 267                          strcpy(boot_command_line, cmd_line);
 268                 }
 269         }
 270 #endif
 271 }
 272
 273 void __init
 274 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 275               unsigned long r6, unsigned long r7)
 276 {
 277         parse_bootinfo(find_bootinfo());
 278         lopec_set_bat();
 279
 280         isa_io_base = MPC10X_MAPB_ISA_IO_BASE;
 281         isa_mem_base = MPC10X_MAPB_ISA_MEM_BASE;
 282         pci_dram_offset = MPC10X_MAPB_DRAM_OFFSET;
 283         ISA_DMA_THRESHOLD = 0x00ffffff;
 284         DMA_MODE_READ = 0x44;
 285         DMA_MODE_WRITE = 0x48;
 286         ppc_do_canonicalize_irqs = 1;
 287
 288         ppc_md.setup_arch = lopec_setup_arch;
 289         ppc_md.show_cpuinfo = lopec_show_cpuinfo;
 290         ppc_md.init_IRQ = lopec_init_IRQ;
 291         ppc_md.get_irq = openpic_get_irq;
 292
 293         ppc_md.restart = lopec_restart;
 294         ppc_md.power_off = lopec_power_off;
 295         ppc_md.halt = lopec_halt;
 296
 297         ppc_md.setup_io_mappings = lopec_map_io;
 298
 299         ppc_md.time_init = todc_time_init;
 300         ppc_md.set_rtc_time = todc_set_rtc_time;
 301         ppc_md.get_rtc_time = todc_get_rtc_time;
 302         ppc_md.calibrate_decr = todc_calibrate_decr;
 303
 304         ppc_md.nvram_read_val = todc_direct_read_val;
 305         ppc_md.nvram_write_val = todc_direct_write_val;
 306
 307 #ifdef CONFIG_SERIAL_TEXT_DEBUG
 308         ppc_md.progress = gen550_progress;
 309 #endif
 310 }