ia64/kvm: compilation fix. export account_system_vtime.
[pv_ops_mirror.git] / drivers / char / rio / rioinit.c
blobadd1718295efb4a52d51b37463b87796d7c23894
1 /*
2 ** -----------------------------------------------------------------------------
3 **
4 ** Perle Specialix driver for Linux
5 ** Ported from existing RIO Driver for SCO sources.
7 * (C) 1990 - 2000 Specialix International Ltd., Byfleet, Surrey, UK.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 ** Module : rioinit.c
24 ** SID : 1.3
25 ** Last Modified : 11/6/98 10:33:43
26 ** Retrieved : 11/6/98 10:33:49
28 ** ident @(#)rioinit.c 1.3
30 ** -----------------------------------------------------------------------------
32 #ifdef SCCS_LABELS
33 static char *_rioinit_c_sccs_ = "@(#)rioinit.c 1.3";
34 #endif
36 #include <linux/module.h>
37 #include <linux/slab.h>
38 #include <linux/errno.h>
39 #include <linux/delay.h>
40 #include <asm/io.h>
41 #include <asm/system.h>
42 #include <asm/string.h>
43 #include <asm/uaccess.h>
45 #include <linux/termios.h>
46 #include <linux/serial.h>
48 #include <linux/generic_serial.h>
51 #include "linux_compat.h"
52 #include "pkt.h"
53 #include "daemon.h"
54 #include "rio.h"
55 #include "riospace.h"
56 #include "cmdpkt.h"
57 #include "map.h"
58 #include "rup.h"
59 #include "port.h"
60 #include "riodrvr.h"
61 #include "rioinfo.h"
62 #include "func.h"
63 #include "errors.h"
64 #include "pci.h"
66 #include "parmmap.h"
67 #include "unixrup.h"
68 #include "board.h"
69 #include "host.h"
70 #include "phb.h"
71 #include "link.h"
72 #include "cmdblk.h"
73 #include "route.h"
74 #include "cirrus.h"
75 #include "rioioctl.h"
76 #include "rio_linux.h"
78 int RIOPCIinit(struct rio_info *p, int Mode);
80 static int RIOScrub(int, u8 __iomem *, int);
83 /**
84 ** RIOAssignAT :
86 ** Fill out the fields in the p->RIOHosts structure now we know we know
87 ** we have a board present.
89 ** bits < 0 indicates 8 bit operation requested,
90 ** bits > 0 indicates 16 bit operation.
93 int RIOAssignAT(struct rio_info *p, int Base, void __iomem *virtAddr, int mode)
95 int bits;
96 struct DpRam __iomem *cardp = (struct DpRam __iomem *)virtAddr;
98 if ((Base < ONE_MEG) || (mode & BYTE_ACCESS_MODE))
99 bits = BYTE_OPERATION;
100 else
101 bits = WORD_OPERATION;
104 ** Board has passed its scrub test. Fill in all the
105 ** transient stuff.
107 p->RIOHosts[p->RIONumHosts].Caddr = virtAddr;
108 p->RIOHosts[p->RIONumHosts].CardP = virtAddr;
111 ** Revision 01 AT host cards don't support WORD operations,
113 if (readb(&cardp->DpRevision) == 01)
114 bits = BYTE_OPERATION;
116 p->RIOHosts[p->RIONumHosts].Type = RIO_AT;
117 p->RIOHosts[p->RIONumHosts].Copy = rio_copy_to_card;
118 /* set this later */
119 p->RIOHosts[p->RIONumHosts].Slot = -1;
120 p->RIOHosts[p->RIONumHosts].Mode = SLOW_LINKS | SLOW_AT_BUS | bits;
121 writeb(BOOT_FROM_RAM | EXTERNAL_BUS_OFF | p->RIOHosts[p->RIONumHosts].Mode | INTERRUPT_DISABLE ,
122 &p->RIOHosts[p->RIONumHosts].Control);
123 writeb(0xFF, &p->RIOHosts[p->RIONumHosts].ResetInt);
124 writeb(BOOT_FROM_RAM | EXTERNAL_BUS_OFF | p->RIOHosts[p->RIONumHosts].Mode | INTERRUPT_DISABLE,
125 &p->RIOHosts[p->RIONumHosts].Control);
126 writeb(0xFF, &p->RIOHosts[p->RIONumHosts].ResetInt);
127 p->RIOHosts[p->RIONumHosts].UniqueNum =
128 ((readb(&p->RIOHosts[p->RIONumHosts].Unique[0])&0xFF)<<0)|
129 ((readb(&p->RIOHosts[p->RIONumHosts].Unique[1])&0xFF)<<8)|
130 ((readb(&p->RIOHosts[p->RIONumHosts].Unique[2])&0xFF)<<16)|
131 ((readb(&p->RIOHosts[p->RIONumHosts].Unique[3])&0xFF)<<24);
132 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Uniquenum 0x%x\n",p->RIOHosts[p->RIONumHosts].UniqueNum);
134 p->RIONumHosts++;
135 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Tests Passed at 0x%x\n", Base);
136 return(1);
139 static u8 val[] = {
140 #ifdef VERY_LONG_TEST
141 0x00, 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
142 0xa5, 0xff, 0x5a, 0x00, 0xff, 0xc9, 0x36,
143 #endif
144 0xff, 0x00, 0x00 };
146 #define TEST_END sizeof(val)
149 ** RAM test a board.
150 ** Nothing too complicated, just enough to check it out.
152 int RIOBoardTest(unsigned long paddr, void __iomem *caddr, unsigned char type, int slot)
154 struct DpRam __iomem *DpRam = caddr;
155 void __iomem *ram[4];
156 int size[4];
157 int op, bank;
158 int nbanks;
160 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Reset host type=%d, DpRam=%p, slot=%d\n",
161 type, DpRam, slot);
163 RIOHostReset(type, DpRam, slot);
166 ** Scrub the memory. This comes in several banks:
167 ** DPsram1 - 7000h bytes
168 ** DPsram2 - 200h bytes
169 ** DPsram3 - 7000h bytes
170 ** scratch - 1000h bytes
173 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Setup ram/size arrays\n");
175 size[0] = DP_SRAM1_SIZE;
176 size[1] = DP_SRAM2_SIZE;
177 size[2] = DP_SRAM3_SIZE;
178 size[3] = DP_SCRATCH_SIZE;
180 ram[0] = DpRam->DpSram1;
181 ram[1] = DpRam->DpSram2;
182 ram[2] = DpRam->DpSram3;
183 nbanks = (type == RIO_PCI) ? 3 : 4;
184 if (nbanks == 4)
185 ram[3] = DpRam->DpScratch;
188 if (nbanks == 3) {
189 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Memory: %p(0x%x), %p(0x%x), %p(0x%x)\n",
190 ram[0], size[0], ram[1], size[1], ram[2], size[2]);
191 } else {
192 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: %p(0x%x), %p(0x%x), %p(0x%x), %p(0x%x)\n",
193 ram[0], size[0], ram[1], size[1], ram[2], size[2], ram[3], size[3]);
197 ** This scrub operation will test for crosstalk between
198 ** banks. TEST_END is a magic number, and relates to the offset
199 ** within the 'val' array used by Scrub.
201 for (op=0; op<TEST_END; op++) {
202 for (bank=0; bank<nbanks; bank++) {
203 if (RIOScrub(op, ram[bank], size[bank]) == RIO_FAIL) {
204 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: RIOScrub band %d, op %d failed\n",
205 bank, op);
206 return RIO_FAIL;
211 rio_dprintk (RIO_DEBUG_INIT, "Test completed\n");
212 return 0;
217 ** Scrub an area of RAM.
218 ** Define PRETEST and POSTTEST for a more thorough checking of the
219 ** state of the memory.
220 ** Call with op set to an index into the above 'val' array to determine
221 ** which value will be written into memory.
222 ** Call with op set to zero means that the RAM will not be read and checked
223 ** before it is written.
224 ** Call with op not zero and the RAM will be read and compared with val[op-1]
225 ** to check that the data from the previous phase was retained.
228 static int RIOScrub(int op, u8 __iomem *ram, int size)
230 int off;
231 unsigned char oldbyte;
232 unsigned char newbyte;
233 unsigned char invbyte;
234 unsigned short oldword;
235 unsigned short newword;
236 unsigned short invword;
237 unsigned short swapword;
239 if (op) {
240 oldbyte = val[op-1];
241 oldword = oldbyte | (oldbyte<<8);
242 } else
243 oldbyte = oldword = 0; /* Tell the compiler we've initilalized them. */
244 newbyte = val[op];
245 newword = newbyte | (newbyte<<8);
246 invbyte = ~newbyte;
247 invword = invbyte | (invbyte<<8);
250 ** Check that the RAM contains the value that should have been left there
251 ** by the previous test (not applicable for pass zero)
253 if (op) {
254 for (off=0; off<size; off++) {
255 if (readb(ram + off) != oldbyte) {
256 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Pre Check 1: BYTE at offset 0x%x should have been=%x, was=%x\n", off, oldbyte, readb(ram + off));
257 return RIO_FAIL;
260 for (off=0; off<size; off+=2) {
261 if (readw(ram + off) != oldword) {
262 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Pre Check: WORD at offset 0x%x should have been=%x, was=%x\n",off,oldword, readw(ram + off));
263 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Pre Check: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram+off+1));
264 return RIO_FAIL;
270 ** Now write the INVERSE of the test data into every location, using
271 ** BYTE write operations, first checking before each byte is written
272 ** that the location contains the old value still, and checking after
273 ** the write that the location contains the data specified - this is
274 ** the BYTE read/write test.
276 for (off=0; off<size; off++) {
277 if (op && (readb(ram + off) != oldbyte)) {
278 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Pre Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off, oldbyte, readb(ram + off));
279 return RIO_FAIL;
281 writeb(invbyte, ram + off);
282 if (readb(ram + off) != invbyte) {
283 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Byte Inv Check: BYTE at offset 0x%x should have been=%x, was=%x\n", off, invbyte, readb(ram + off));
284 return RIO_FAIL;
289 ** now, use WORD operations to write the test value into every location,
290 ** check as before that the location contains the previous test value
291 ** before overwriting, and that it contains the data value written
292 ** afterwards.
293 ** This is the WORD operation test.
295 for (off=0; off<size; off+=2) {
296 if (readw(ram + off) != invword) {
297 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Inv Check: WORD at offset 0x%x should have been=%x, was=%x\n", off, invword, readw(ram + off));
298 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Word Inv Check: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram+off+1));
299 return RIO_FAIL;
302 writew(newword, ram + off);
303 if ( readw(ram + off) != newword ) {
304 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 1: WORD at offset 0x%x should have been=%x, was=%x\n", off, newword, readw(ram + off));
305 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 1: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram + off + 1));
306 return RIO_FAIL;
311 ** now run through the block of memory again, first in byte mode
312 ** then in word mode, and check that all the locations contain the
313 ** required test data.
315 for (off=0; off<size; off++) {
316 if (readb(ram + off) != newbyte) {
317 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Byte Check: BYTE at offset 0x%x should have been=%x, was=%x\n", off, newbyte, readb(ram + off));
318 return RIO_FAIL;
322 for (off=0; off<size; off+=2) {
323 if (readw(ram + off) != newword ) {
324 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 2: WORD at offset 0x%x should have been=%x, was=%x\n", off, newword, readw(ram + off));
325 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: Post Word Check 2: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram + off + 1));
326 return RIO_FAIL;
331 ** time to check out byte swapping errors
333 swapword = invbyte | (newbyte << 8);
335 for (off=0; off<size; off+=2) {
336 writeb(invbyte, &ram[off]);
337 writeb(newbyte, &ram[off+1]);
340 for ( off=0; off<size; off+=2 ) {
341 if (readw(ram + off) != swapword) {
342 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 1: WORD at offset 0x%x should have been=%x, was=%x\n", off, swapword, readw(ram + off));
343 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 1: BYTE at offset 0x%x is %x BYTE at offset 0x%x is %x\n", off, readb(ram + off), off+1, readb(ram + off + 1));
344 return RIO_FAIL;
346 writew(~swapword, ram + off);
349 for (off=0; off<size; off+=2) {
350 if (readb(ram + off) != newbyte) {
351 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off, newbyte, readb(ram + off));
352 return RIO_FAIL;
354 if (readb(ram + off + 1) != invbyte) {
355 rio_dprintk (RIO_DEBUG_INIT, "RIO-init: SwapWord Check 2: BYTE at offset 0x%x should have been=%x, was=%x\n", off+1, invbyte, readb(ram + off + 1));
356 return RIO_FAIL;
358 writew(newword, ram + off);
360 return 0;
364 int RIODefaultName(struct rio_info *p, struct Host *HostP, unsigned int UnitId)
366 memcpy(HostP->Mapping[UnitId].Name, "UNKNOWN RTA X-XX", 17);
367 HostP->Mapping[UnitId].Name[12]='1'+(HostP-p->RIOHosts);
368 if ((UnitId+1) > 9) {
369 HostP->Mapping[UnitId].Name[14]='0'+((UnitId+1)/10);
370 HostP->Mapping[UnitId].Name[15]='0'+((UnitId+1)%10);
372 else {
373 HostP->Mapping[UnitId].Name[14]='1'+UnitId;
374 HostP->Mapping[UnitId].Name[15]=0;
376 return 0;
379 #define RIO_RELEASE "Linux"
380 #define RELEASE_ID "1.0"
382 static struct rioVersion stVersion;
384 struct rioVersion *RIOVersid(void)
386 strlcpy(stVersion.version, "RIO driver for linux V1.0",
387 sizeof(stVersion.version));
388 strlcpy(stVersion.buildDate, __DATE__,
389 sizeof(stVersion.buildDate));
391 return &stVersion;
394 void RIOHostReset(unsigned int Type, struct DpRam __iomem *DpRamP, unsigned int Slot)
397 ** Reset the Tpu
399 rio_dprintk (RIO_DEBUG_INIT, "RIOHostReset: type 0x%x", Type);
400 switch ( Type ) {
401 case RIO_AT:
402 rio_dprintk (RIO_DEBUG_INIT, " (RIO_AT)\n");
403 writeb(BOOT_FROM_RAM | EXTERNAL_BUS_OFF | INTERRUPT_DISABLE | BYTE_OPERATION |
404 SLOW_LINKS | SLOW_AT_BUS, &DpRamP->DpControl);
405 writeb(0xFF, &DpRamP->DpResetTpu);
406 udelay(3);
407 rio_dprintk (RIO_DEBUG_INIT, "RIOHostReset: Don't know if it worked. Try reset again\n");
408 writeb(BOOT_FROM_RAM | EXTERNAL_BUS_OFF | INTERRUPT_DISABLE |
409 BYTE_OPERATION | SLOW_LINKS | SLOW_AT_BUS, &DpRamP->DpControl);
410 writeb(0xFF, &DpRamP->DpResetTpu);
411 udelay(3);
412 break;
413 case RIO_PCI:
414 rio_dprintk (RIO_DEBUG_INIT, " (RIO_PCI)\n");
415 writeb(RIO_PCI_BOOT_FROM_RAM, &DpRamP->DpControl);
416 writeb(0xFF, &DpRamP->DpResetInt);
417 writeb(0xFF, &DpRamP->DpResetTpu);
418 udelay(100);
419 break;
420 default:
421 rio_dprintk (RIO_DEBUG_INIT, " (UNKNOWN)\n");
422 break;
424 return;