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ia64/kvm: compilation fix. export account_system_vtime.
[pv_ops_mirror.git] / drivers / media / video / tvaudio.c
blobc77914d99d15c5972c94e9763a08b5789098e90a
1 /*
2 * experimental driver for simple i2c audio chips.
3 *
4 * Copyright (c) 2000 Gerd Knorr
5 * based on code by:
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
9 *
10 * This code is placed under the terms of the GNU General Public License
11 *
12 * OPTIONS:
13 * debug - set to 1 if you'd like to see debug messages
14 *
15 */
16
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/string.h>
21 #include <linux/timer.h>
22 #include <linux/delay.h>
23 #include <linux/errno.h>
24 #include <linux/slab.h>
25 #include <linux/videodev.h>
26 #include <linux/i2c.h>
27 #include <linux/init.h>
28 #include <linux/kthread.h>
29 #include <linux/freezer.h>
30
31 #include <media/tvaudio.h>
32 #include <media/v4l2-common.h>
33 #include <media/v4l2-chip-ident.h>
34 #include <media/v4l2-i2c-drv-legacy.h>
35
36 #include <media/i2c-addr.h>
37
38 /* ---------------------------------------------------------------------- */
39 /* insmod args */
40
41 static int debug; /* insmod parameter */
42 module_param(debug, int, 0644);
43
44 MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
45 MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
46 MODULE_LICENSE("GPL");
47
48 #define UNSET (-1U)
49
50 /* ---------------------------------------------------------------------- */
51 /* our structs */
52
53 #define MAXREGS 64
54
55 struct CHIPSTATE;
56 typedef int (*getvalue)(int);
57 typedef int (*checkit)(struct CHIPSTATE*);
58 typedef int (*initialize)(struct CHIPSTATE*);
59 typedef int (*getmode)(struct CHIPSTATE*);
60 typedef void (*setmode)(struct CHIPSTATE*, int mode);
61 typedef void (*checkmode)(struct CHIPSTATE*);
62
63 /* i2c command */
64 typedef struct AUDIOCMD {
65 int count; /* # of bytes to send */
66 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
67 } audiocmd;
68
69 /* chip description */
70 struct CHIPDESC {
71 char *name; /* chip name */
72 int id; /* ID */
73 int addr_lo, addr_hi; /* i2c address range */
74 int registers; /* # of registers */
75
76 int *insmodopt;
77 checkit checkit;
78 initialize initialize;
79 int flags;
80 #define CHIP_HAS_VOLUME 1
81 #define CHIP_HAS_BASSTREBLE 2
82 #define CHIP_HAS_INPUTSEL 4
83
84 /* various i2c command sequences */
85 audiocmd init;
86
87 /* which register has which value */
88 int leftreg,rightreg,treblereg,bassreg;
89
90 /* initialize with (defaults to 65535/65535/32768/32768 */
91 int leftinit,rightinit,trebleinit,bassinit;
92
93 /* functions to convert the values (v4l -> chip) */
94 getvalue volfunc,treblefunc,bassfunc;
95
96 /* get/set mode */
97 getmode getmode;
98 setmode setmode;
99
100 /* check / autoswitch audio after channel switches */
101 checkmode checkmode;
102
103 /* input switch register + values for v4l inputs */
104 int inputreg;
105 int inputmap[4];
106 int inputmute;
107 int inputmask;
108 };
109 static struct CHIPDESC chiplist[];
110
111 /* current state of the chip */
112 struct CHIPSTATE {
113 struct i2c_client *c;
114
115 /* index into CHIPDESC array */
116 int type;
117
118 /* shadow register set */
119 audiocmd shadow;
120
121 /* current settings */
122 __u16 left,right,treble,bass,muted,mode;
123 int prevmode;
124 int radio;
125 int input;
126
127 /* thread */
128 struct task_struct *thread;
129 struct timer_list wt;
130 int watch_stereo;
131 int audmode;
132 };
133
134 /* ---------------------------------------------------------------------- */
135 /* i2c addresses */
136
137 static unsigned short normal_i2c[] = {
138 I2C_ADDR_TDA8425 >> 1,
139 I2C_ADDR_TEA6300 >> 1,
140 I2C_ADDR_TEA6420 >> 1,
141 I2C_ADDR_TDA9840 >> 1,
142 I2C_ADDR_TDA985x_L >> 1,
143 I2C_ADDR_TDA985x_H >> 1,
144 I2C_ADDR_TDA9874 >> 1,
145 I2C_ADDR_PIC16C54 >> 1,
146 I2C_CLIENT_END };
147 I2C_CLIENT_INSMOD;
148
149 /* ---------------------------------------------------------------------- */
150 /* i2c I/O functions */
151
152 static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
153 {
154 unsigned char buffer[2];
155
156 if (-1 == subaddr) {
157 v4l_dbg(1, debug, chip->c, "%s: chip_write: 0x%x\n",
158 chip->c->name, val);
159 chip->shadow.bytes[1] = val;
160 buffer[0] = val;
161 if (1 != i2c_master_send(chip->c,buffer,1)) {
162 v4l_warn(chip->c, "%s: I/O error (write 0x%x)\n",
163 chip->c->name, val);
164 return -1;
165 }
166 } else {
167 v4l_dbg(1, debug, chip->c, "%s: chip_write: reg%d=0x%x\n",
168 chip->c->name, subaddr, val);
169 chip->shadow.bytes[subaddr+1] = val;
170 buffer[0] = subaddr;
171 buffer[1] = val;
172 if (2 != i2c_master_send(chip->c,buffer,2)) {
173 v4l_warn(chip->c, "%s: I/O error (write reg%d=0x%x)\n",
174 chip->c->name, subaddr, val);
175 return -1;
176 }
177 }
178 return 0;
179 }
180
181 static int chip_write_masked(struct CHIPSTATE *chip, int subaddr, int val, int mask)
182 {
183 if (mask != 0) {
184 if (-1 == subaddr) {
185 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
186 } else {
187 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
188 }
189 }
190 return chip_write(chip, subaddr, val);
191 }
192
193 static int chip_read(struct CHIPSTATE *chip)
194 {
195 unsigned char buffer;
196
197 if (1 != i2c_master_recv(chip->c,&buffer,1)) {
198 v4l_warn(chip->c, "%s: I/O error (read)\n",
199 chip->c->name);
200 return -1;
201 }
202 v4l_dbg(1, debug, chip->c, "%s: chip_read: 0x%x\n",chip->c->name, buffer);
203 return buffer;
204 }
205
206 static int chip_read2(struct CHIPSTATE *chip, int subaddr)
207 {
208 unsigned char write[1];
209 unsigned char read[1];
210 struct i2c_msg msgs[2] = {
211 { chip->c->addr, 0, 1, write },
212 { chip->c->addr, I2C_M_RD, 1, read }
213 };
214 write[0] = subaddr;
215
216 if (2 != i2c_transfer(chip->c->adapter,msgs,2)) {
217 v4l_warn(chip->c, "%s: I/O error (read2)\n", chip->c->name);
218 return -1;
219 }
220 v4l_dbg(1, debug, chip->c, "%s: chip_read2: reg%d=0x%x\n",
221 chip->c->name, subaddr,read[0]);
222 return read[0];
223 }
224
225 static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
226 {
227 int i;
228
229 if (0 == cmd->count)
230 return 0;
231
232 /* update our shadow register set; print bytes if (debug > 0) */
233 v4l_dbg(1, debug, chip->c, "%s: chip_cmd(%s): reg=%d, data:",
234 chip->c->name, name,cmd->bytes[0]);
235 for (i = 1; i < cmd->count; i++) {
236 if (debug)
237 printk(" 0x%x",cmd->bytes[i]);
238 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
239 }
240 if (debug)
241 printk("\n");
242
243 /* send data to the chip */
244 if (cmd->count != i2c_master_send(chip->c,cmd->bytes,cmd->count)) {
245 v4l_warn(chip->c, "%s: I/O error (%s)\n", chip->c->name, name);
246 return -1;
247 }
248 return 0;
249 }
250
251 /* ---------------------------------------------------------------------- */
252 /* kernel thread for doing i2c stuff asyncronly
253 * right now it is used only to check the audio mode (mono/stereo/whatever)
254 * some time after switching to another TV channel, then turn on stereo
255 * if available, ...
256 */
257
258 static void chip_thread_wake(unsigned long data)
259 {
260 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
261 wake_up_process(chip->thread);
262 }
263
264 static int chip_thread(void *data)
265 {
266 struct CHIPSTATE *chip = data;
267 struct CHIPDESC *desc = chiplist + chip->type;
268
269 v4l_dbg(1, debug, chip->c, "%s: thread started\n", chip->c->name);
270 set_freezable();
271 for (;;) {
272 set_current_state(TASK_INTERRUPTIBLE);
273 if (!kthread_should_stop())
274 schedule();
275 set_current_state(TASK_RUNNING);
276 try_to_freeze();
277 if (kthread_should_stop())
278 break;
279 v4l_dbg(1, debug, chip->c, "%s: thread wakeup\n", chip->c->name);
280
281 /* don't do anything for radio or if mode != auto */
282 if (chip->radio || chip->mode != 0)
283 continue;
284
285 /* have a look what's going on */
286 desc->checkmode(chip);
287
288 /* schedule next check */
289 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
290 }
291
292 v4l_dbg(1, debug, chip->c, "%s: thread exiting\n", chip->c->name);
293 return 0;
294 }
295
296 static void generic_checkmode(struct CHIPSTATE *chip)
297 {
298 struct CHIPDESC *desc = chiplist + chip->type;
299 int mode = desc->getmode(chip);
300
301 if (mode == chip->prevmode)
302 return;
303
304 v4l_dbg(1, debug, chip->c, "%s: thread checkmode\n", chip->c->name);
305 chip->prevmode = mode;
306
307 if (mode & V4L2_TUNER_MODE_STEREO)
308 desc->setmode(chip,V4L2_TUNER_MODE_STEREO);
309 if (mode & V4L2_TUNER_MODE_LANG1_LANG2)
310 desc->setmode(chip,V4L2_TUNER_MODE_STEREO);
311 else if (mode & V4L2_TUNER_MODE_LANG1)
312 desc->setmode(chip,V4L2_TUNER_MODE_LANG1);
313 else if (mode & V4L2_TUNER_MODE_LANG2)
314 desc->setmode(chip,V4L2_TUNER_MODE_LANG2);
315 else
316 desc->setmode(chip,V4L2_TUNER_MODE_MONO);
317 }
318
319 /* ---------------------------------------------------------------------- */
320 /* audio chip descriptions - defines+functions for tda9840 */
321
322 #define TDA9840_SW 0x00
323 #define TDA9840_LVADJ 0x02
324 #define TDA9840_STADJ 0x03
325 #define TDA9840_TEST 0x04
326
327 #define TDA9840_MONO 0x10
328 #define TDA9840_STEREO 0x2a
329 #define TDA9840_DUALA 0x12
330 #define TDA9840_DUALB 0x1e
331 #define TDA9840_DUALAB 0x1a
332 #define TDA9840_DUALBA 0x16
333 #define TDA9840_EXTERNAL 0x7a
334
335 #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
336 #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
337 #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
338
339 #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
340 #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
341
342 static int tda9840_getmode(struct CHIPSTATE *chip)
343 {
344 int val, mode;
345
346 val = chip_read(chip);
347 mode = V4L2_TUNER_MODE_MONO;
348 if (val & TDA9840_DS_DUAL)
349 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
350 if (val & TDA9840_ST_STEREO)
351 mode |= V4L2_TUNER_MODE_STEREO;
352
353 v4l_dbg(1, debug, chip->c, "tda9840_getmode(): raw chip read: %d, return: %d\n",
354 val, mode);
355 return mode;
356 }
357
358 static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
359 {
360 int update = 1;
361 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
362
363 switch (mode) {
364 case V4L2_TUNER_MODE_MONO:
365 t |= TDA9840_MONO;
366 break;
367 case V4L2_TUNER_MODE_STEREO:
368 t |= TDA9840_STEREO;
369 break;
370 case V4L2_TUNER_MODE_LANG1:
371 t |= TDA9840_DUALA;
372 break;
373 case V4L2_TUNER_MODE_LANG2:
374 t |= TDA9840_DUALB;
375 break;
376 default:
377 update = 0;
378 }
379
380 if (update)
381 chip_write(chip, TDA9840_SW, t);
382 }
383
384 static int tda9840_checkit(struct CHIPSTATE *chip)
385 {
386 int rc;
387 rc = chip_read(chip);
388 /* lower 5 bits should be 0 */
389 return ((rc & 0x1f) == 0) ? 1 : 0;
390 }
391
392 /* ---------------------------------------------------------------------- */
393 /* audio chip descriptions - defines+functions for tda985x */
394
395 /* subaddresses for TDA9855 */
396 #define TDA9855_VR 0x00 /* Volume, right */
397 #define TDA9855_VL 0x01 /* Volume, left */
398 #define TDA9855_BA 0x02 /* Bass */
399 #define TDA9855_TR 0x03 /* Treble */
400 #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
401
402 /* subaddresses for TDA9850 */
403 #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
404
405 /* subaddesses for both chips */
406 #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
407 #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
408 #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
409 #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
410 #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
411 #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
412
413 /* Masks for bits in TDA9855 subaddresses */
414 /* 0x00 - VR in TDA9855 */
415 /* 0x01 - VL in TDA9855 */
416 /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
417 * in 1dB steps - mute is 0x27 */
418
419
420 /* 0x02 - BA in TDA9855 */
421 /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
422 * in .5dB steps - 0 is 0x0E */
423
424
425 /* 0x03 - TR in TDA9855 */
426 /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
427 * in 3dB steps - 0 is 0x7 */
428
429 /* Masks for bits in both chips' subaddresses */
430 /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
431 /* Unique to TDA9855: */
432 /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
433 * in 3dB steps - mute is 0x0 */
434
435 /* Unique to TDA9850: */
436 /* lower 4 bits control stereo noise threshold, over which stereo turns off
437 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
438
439
440 /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
441 /* Unique to TDA9855: */
442 #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
443 #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
444 #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
445 #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
446 /* Bits 0 to 3 select various combinations
447 * of line in and line out, only the
448 * interesting ones are defined */
449 #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
450 #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
451
452 /* Unique to TDA9850: */
453 /* lower 4 bits contol SAP noise threshold, over which SAP turns off
454 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
455
456
457 /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
458 /* Common to TDA9855 and TDA9850: */
459 #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
460 #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
461 #define TDA985x_MONO 0 /* Forces Mono output */
462 #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
463
464 /* Unique to TDA9855: */
465 #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
466 #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
467 #define TDA9855_LINEAR 0 /* Linear Stereo */
468 #define TDA9855_PSEUDO 1 /* Pseudo Stereo */
469 #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
470 #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
471 #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
472
473 /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
474 /* Common to both TDA9855 and TDA9850: */
475 /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
476 * in .5dB steps - 0dB is 0x7 */
477
478 /* 0x08, 0x09 - A1 and A2 (read/write) */
479 /* Common to both TDA9855 and TDA9850: */
480 /* lower 5 bites are wideband and spectral expander alignment
481 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
482 #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
483 #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
484 #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
485
486 /* 0x0a - A3 */
487 /* Common to both TDA9855 and TDA9850: */
488 /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
489 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
490 #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
491
492 static int tda9855_volume(int val) { return val/0x2e8+0x27; }
493 static int tda9855_bass(int val) { return val/0xccc+0x06; }
494 static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
495
496 static int tda985x_getmode(struct CHIPSTATE *chip)
497 {
498 int mode;
499
500 mode = ((TDA985x_STP | TDA985x_SAPP) &
501 chip_read(chip)) >> 4;
502 /* Add mono mode regardless of SAP and stereo */
503 /* Allows forced mono */
504 return mode | V4L2_TUNER_MODE_MONO;
505 }
506
507 static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
508 {
509 int update = 1;
510 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
511
512 switch (mode) {
513 case V4L2_TUNER_MODE_MONO:
514 c6 |= TDA985x_MONO;
515 break;
516 case V4L2_TUNER_MODE_STEREO:
517 c6 |= TDA985x_STEREO;
518 break;
519 case V4L2_TUNER_MODE_LANG1:
520 c6 |= TDA985x_SAP;
521 break;
522 default:
523 update = 0;
524 }
525 if (update)
526 chip_write(chip,TDA985x_C6,c6);
527 }
528
529
530 /* ---------------------------------------------------------------------- */
531 /* audio chip descriptions - defines+functions for tda9873h */
532
533 /* Subaddresses for TDA9873H */
534
535 #define TDA9873_SW 0x00 /* Switching */
536 #define TDA9873_AD 0x01 /* Adjust */
537 #define TDA9873_PT 0x02 /* Port */
538
539 /* Subaddress 0x00: Switching Data
540 * B7..B0:
541 *
542 * B1, B0: Input source selection
543 * 0, 0 internal
544 * 1, 0 external stereo
545 * 0, 1 external mono
546 */
547 #define TDA9873_INP_MASK 3
548 #define TDA9873_INTERNAL 0
549 #define TDA9873_EXT_STEREO 2
550 #define TDA9873_EXT_MONO 1
551
552 /* B3, B2: output signal select
553 * B4 : transmission mode
554 * 0, 0, 1 Mono
555 * 1, 0, 0 Stereo
556 * 1, 1, 1 Stereo (reversed channel)
557 * 0, 0, 0 Dual AB
558 * 0, 0, 1 Dual AA
559 * 0, 1, 0 Dual BB
560 * 0, 1, 1 Dual BA
561 */
562
563 #define TDA9873_TR_MASK (7 << 2)
564 #define TDA9873_TR_MONO 4
565 #define TDA9873_TR_STEREO 1 << 4
566 #define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
567 #define TDA9873_TR_DUALA 1 << 2
568 #define TDA9873_TR_DUALB 1 << 3
569
570 /* output level controls
571 * B5: output level switch (0 = reduced gain, 1 = normal gain)
572 * B6: mute (1 = muted)
573 * B7: auto-mute (1 = auto-mute enabled)
574 */
575
576 #define TDA9873_GAIN_NORMAL 1 << 5
577 #define TDA9873_MUTE 1 << 6
578 #define TDA9873_AUTOMUTE 1 << 7
579
580 /* Subaddress 0x01: Adjust/standard */
581
582 /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
583 * Recommended value is +0 dB
584 */
585
586 #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
587
588 /* Bits C6..C4 control FM stantard
589 * C6, C5, C4
590 * 0, 0, 0 B/G (PAL FM)
591 * 0, 0, 1 M
592 * 0, 1, 0 D/K(1)
593 * 0, 1, 1 D/K(2)
594 * 1, 0, 0 D/K(3)
595 * 1, 0, 1 I
596 */
597 #define TDA9873_BG 0
598 #define TDA9873_M 1
599 #define TDA9873_DK1 2
600 #define TDA9873_DK2 3
601 #define TDA9873_DK3 4
602 #define TDA9873_I 5
603
604 /* C7 controls identification response time (1=fast/0=normal)
605 */
606 #define TDA9873_IDR_NORM 0
607 #define TDA9873_IDR_FAST 1 << 7
608
609
610 /* Subaddress 0x02: Port data */
611
612 /* E1, E0 free programmable ports P1/P2
613 0, 0 both ports low
614 0, 1 P1 high
615 1, 0 P2 high
616 1, 1 both ports high
617 */
618
619 #define TDA9873_PORTS 3
620
621 /* E2: test port */
622 #define TDA9873_TST_PORT 1 << 2
623
624 /* E5..E3 control mono output channel (together with transmission mode bit B4)
625 *
626 * E5 E4 E3 B4 OUTM
627 * 0 0 0 0 mono
628 * 0 0 1 0 DUAL B
629 * 0 1 0 1 mono (from stereo decoder)
630 */
631 #define TDA9873_MOUT_MONO 0
632 #define TDA9873_MOUT_FMONO 0
633 #define TDA9873_MOUT_DUALA 0
634 #define TDA9873_MOUT_DUALB 1 << 3
635 #define TDA9873_MOUT_ST 1 << 4
636 #define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
637 #define TDA9873_MOUT_EXTL 1 << 5
638 #define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
639 #define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
640 #define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
641
642 /* Status bits: (chip read) */
643 #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
644 #define TDA9873_STEREO 2 /* Stereo sound is identified */
645 #define TDA9873_DUAL 4 /* Dual sound is identified */
646
647 static int tda9873_getmode(struct CHIPSTATE *chip)
648 {
649 int val,mode;
650
651 val = chip_read(chip);
652 mode = V4L2_TUNER_MODE_MONO;
653 if (val & TDA9873_STEREO)
654 mode |= V4L2_TUNER_MODE_STEREO;
655 if (val & TDA9873_DUAL)
656 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
657 v4l_dbg(1, debug, chip->c, "tda9873_getmode(): raw chip read: %d, return: %d\n",
658 val, mode);
659 return mode;
660 }
661
662 static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
663 {
664 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
665 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
666
667 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
668 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): external input\n");
669 return;
670 }
671
672 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
673 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): sw_data = %d\n", sw_data);
674
675 switch (mode) {
676 case V4L2_TUNER_MODE_MONO:
677 sw_data |= TDA9873_TR_MONO;
678 break;
679 case V4L2_TUNER_MODE_STEREO:
680 sw_data |= TDA9873_TR_STEREO;
681 break;
682 case V4L2_TUNER_MODE_LANG1:
683 sw_data |= TDA9873_TR_DUALA;
684 break;
685 case V4L2_TUNER_MODE_LANG2:
686 sw_data |= TDA9873_TR_DUALB;
687 break;
688 default:
689 chip->mode = 0;
690 return;
691 }
692
693 chip_write(chip, TDA9873_SW, sw_data);
694 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
695 mode, sw_data);
696 }
697
698 static int tda9873_checkit(struct CHIPSTATE *chip)
699 {
700 int rc;
701
702 if (-1 == (rc = chip_read2(chip,254)))
703 return 0;
704 return (rc & ~0x1f) == 0x80;
705 }
706
707
708 /* ---------------------------------------------------------------------- */
709 /* audio chip description - defines+functions for tda9874h and tda9874a */
710 /* Dariusz Kowalewski <darekk@automex.pl> */
711
712 /* Subaddresses for TDA9874H and TDA9874A (slave rx) */
713 #define TDA9874A_AGCGR 0x00 /* AGC gain */
714 #define TDA9874A_GCONR 0x01 /* general config */
715 #define TDA9874A_MSR 0x02 /* monitor select */
716 #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
717 #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
718 #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
719 #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
720 #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
721 #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
722 #define TDA9874A_DCR 0x09 /* demodulator config */
723 #define TDA9874A_FMER 0x0a /* FM de-emphasis */
724 #define TDA9874A_FMMR 0x0b /* FM dematrix */
725 #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
726 #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
727 #define TDA9874A_NCONR 0x0e /* NICAM config */
728 #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
729 #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
730 #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
731 #define TDA9874A_AMCONR 0x12 /* audio mute control */
732 #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
733 #define TDA9874A_AOSR 0x14 /* analog output select */
734 #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
735 #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
736 #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
737 #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
738 #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
739
740 /* Subaddresses for TDA9874H and TDA9874A (slave tx) */
741 #define TDA9874A_DSR 0x00 /* device status */
742 #define TDA9874A_NSR 0x01 /* NICAM status */
743 #define TDA9874A_NECR 0x02 /* NICAM error count */
744 #define TDA9874A_DR1 0x03 /* add. data LSB */
745 #define TDA9874A_DR2 0x04 /* add. data MSB */
746 #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
747 #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
748 #define TDA9874A_SIFLR 0x07 /* SIF level */
749 #define TDA9874A_TR2 252 /* test reg. 2 */
750 #define TDA9874A_TR1 253 /* test reg. 1 */
751 #define TDA9874A_DIC 254 /* device id. code */
752 #define TDA9874A_SIC 255 /* software id. code */
753
754
755 static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
756 static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
757 static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
758 static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
759 static int tda9874a_dic = -1; /* device id. code */
760
761 /* insmod options for tda9874a */
762 static unsigned int tda9874a_SIF = UNSET;
763 static unsigned int tda9874a_AMSEL = UNSET;
764 static unsigned int tda9874a_STD = UNSET;
765 module_param(tda9874a_SIF, int, 0444);
766 module_param(tda9874a_AMSEL, int, 0444);
767 module_param(tda9874a_STD, int, 0444);
768
769 /*
770 * initialization table for tda9874 decoder:
771 * - carrier 1 freq. registers (3 bytes)
772 * - carrier 2 freq. registers (3 bytes)
773 * - demudulator config register
774 * - FM de-emphasis register (slow identification mode)
775 * Note: frequency registers must be written in single i2c transfer.
776 */
777 static struct tda9874a_MODES {
778 char *name;
779 audiocmd cmd;
780 } tda9874a_modelist[9] = {
781 { "A2, B/G",
782 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
783 { "A2, M (Korea)",
784 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
785 { "A2, D/K (1)",
786 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
787 { "A2, D/K (2)",
788 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
789 { "A2, D/K (3)",
790 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
791 { "NICAM, I",
792 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
793 { "NICAM, B/G",
794 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
795 { "NICAM, D/K", /* default */
796 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
797 { "NICAM, L",
798 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
799 };
800
801 static int tda9874a_setup(struct CHIPSTATE *chip)
802 {
803 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
804 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
805 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
806 if(tda9874a_dic == 0x11) {
807 chip_write(chip, TDA9874A_FMMR, 0x80);
808 } else { /* dic == 0x07 */
809 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
810 chip_write(chip, TDA9874A_FMMR, 0x00);
811 }
812 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
813 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
814 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
815 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
816 /* Note: If signal quality is poor you may want to change NICAM */
817 /* error limit registers (NLELR and NUELR) to some greater values. */
818 /* Then the sound would remain stereo, but won't be so clear. */
819 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
820 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
821
822 if(tda9874a_dic == 0x11) {
823 chip_write(chip, TDA9874A_AMCONR, 0xf9);
824 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
825 chip_write(chip, TDA9874A_AOSR, 0x80);
826 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
827 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
828 } else { /* dic == 0x07 */
829 chip_write(chip, TDA9874A_AMCONR, 0xfb);
830 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
831 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
832 }
833 v4l_dbg(1, debug, chip->c, "tda9874a_setup(): %s [0x%02X].\n",
834 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
835 return 1;
836 }
837
838 static int tda9874a_getmode(struct CHIPSTATE *chip)
839 {
840 int dsr,nsr,mode;
841 int necr; /* just for debugging */
842
843 mode = V4L2_TUNER_MODE_MONO;
844
845 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
846 return mode;
847 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
848 return mode;
849 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
850 return mode;
851
852 /* need to store dsr/nsr somewhere */
853 chip->shadow.bytes[MAXREGS-2] = dsr;
854 chip->shadow.bytes[MAXREGS-1] = nsr;
855
856 if(tda9874a_mode) {
857 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
858 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
859 * that sound has (temporarily) switched from NICAM to
860 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
861 * error count. So in fact there is no stereo in this case :-(
862 * But changing the mode to V4L2_TUNER_MODE_MONO would switch
863 * external 4052 multiplexer in audio_hook().
864 */
865 if(nsr & 0x02) /* NSR.S/MB=1 */
866 mode |= V4L2_TUNER_MODE_STEREO;
867 if(nsr & 0x01) /* NSR.D/SB=1 */
868 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
869 } else {
870 if(dsr & 0x02) /* DSR.IDSTE=1 */
871 mode |= V4L2_TUNER_MODE_STEREO;
872 if(dsr & 0x04) /* DSR.IDDUA=1 */
873 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
874 }
875
876 v4l_dbg(1, debug, chip->c, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
877 dsr, nsr, necr, mode);
878 return mode;
879 }
880
881 static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
882 {
883 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
884 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
885 if(tda9874a_mode) {
886 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
887 tda9874a_NCONR &= 0xfe; /* enable */
888 else
889 tda9874a_NCONR |= 0x01; /* disable */
890 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
891 }
892
893 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
894 * and has auto-select function for audio output (AOSR register).
895 * Old TDA9874H doesn't support these features.
896 * TDA9874A also has additional mono output pin (OUTM), which
897 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
898 */
899 if(tda9874a_dic == 0x11) {
900 int aosr = 0x80;
901 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
902
903 switch(mode) {
904 case V4L2_TUNER_MODE_MONO:
905 case V4L2_TUNER_MODE_STEREO:
906 break;
907 case V4L2_TUNER_MODE_LANG1:
908 aosr = 0x80; /* auto-select, dual A/A */
909 mdacosr = (tda9874a_mode) ? 0x82:0x80;
910 break;
911 case V4L2_TUNER_MODE_LANG2:
912 aosr = 0xa0; /* auto-select, dual B/B */
913 mdacosr = (tda9874a_mode) ? 0x83:0x81;
914 break;
915 default:
916 chip->mode = 0;
917 return;
918 }
919 chip_write(chip, TDA9874A_AOSR, aosr);
920 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
921
922 v4l_dbg(1, debug, chip->c, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
923 mode, aosr, mdacosr);
924
925 } else { /* dic == 0x07 */
926 int fmmr,aosr;
927
928 switch(mode) {
929 case V4L2_TUNER_MODE_MONO:
930 fmmr = 0x00; /* mono */
931 aosr = 0x10; /* A/A */
932 break;
933 case V4L2_TUNER_MODE_STEREO:
934 if(tda9874a_mode) {
935 fmmr = 0x00;
936 aosr = 0x00; /* handled by NICAM auto-mute */
937 } else {
938 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
939 aosr = 0x00;
940 }
941 break;
942 case V4L2_TUNER_MODE_LANG1:
943 fmmr = 0x02; /* dual */
944 aosr = 0x10; /* dual A/A */
945 break;
946 case V4L2_TUNER_MODE_LANG2:
947 fmmr = 0x02; /* dual */
948 aosr = 0x20; /* dual B/B */
949 break;
950 default:
951 chip->mode = 0;
952 return;
953 }
954 chip_write(chip, TDA9874A_FMMR, fmmr);
955 chip_write(chip, TDA9874A_AOSR, aosr);
956
957 v4l_dbg(1, debug, chip->c, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
958 mode, fmmr, aosr);
959 }
960 }
961
962 static int tda9874a_checkit(struct CHIPSTATE *chip)
963 {
964 int dic,sic; /* device id. and software id. codes */
965
966 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
967 return 0;
968 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
969 return 0;
970
971 v4l_dbg(1, debug, chip->c, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
972
973 if((dic == 0x11)||(dic == 0x07)) {
974 v4l_info(chip->c, "found tda9874%s.\n", (dic == 0x11) ? "a":"h");
975 tda9874a_dic = dic; /* remember device id. */
976 return 1;
977 }
978 return 0; /* not found */
979 }
980
981 static int tda9874a_initialize(struct CHIPSTATE *chip)
982 {
983 if (tda9874a_SIF > 2)
984 tda9874a_SIF = 1;
985 if (tda9874a_STD > 8)
986 tda9874a_STD = 0;
987 if(tda9874a_AMSEL > 1)
988 tda9874a_AMSEL = 0;
989
990 if(tda9874a_SIF == 1)
991 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
992 else
993 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
994
995 tda9874a_ESP = tda9874a_STD;
996 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
997
998 if(tda9874a_AMSEL == 0)
999 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
1000 else
1001 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1002
1003 tda9874a_setup(chip);
1004 return 0;
1005 }
1006
1007
1008 /* ---------------------------------------------------------------------- */
1009 /* audio chip descriptions - defines+functions for tea6420 */
1010
1011 #define TEA6300_VL 0x00 /* volume left */
1012 #define TEA6300_VR 0x01 /* volume right */
1013 #define TEA6300_BA 0x02 /* bass */
1014 #define TEA6300_TR 0x03 /* treble */
1015 #define TEA6300_FA 0x04 /* fader control */
1016 #define TEA6300_S 0x05 /* switch register */
1017 /* values for those registers: */
1018 #define TEA6300_S_SA 0x01 /* stereo A input */
1019 #define TEA6300_S_SB 0x02 /* stereo B */
1020 #define TEA6300_S_SC 0x04 /* stereo C */
1021 #define TEA6300_S_GMU 0x80 /* general mute */
1022
1023 #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1024 #define TEA6320_FFR 0x01 /* fader front right (0-5) */
1025 #define TEA6320_FFL 0x02 /* fader front left (0-5) */
1026 #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1027 #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1028 #define TEA6320_BA 0x05 /* bass (0-4) */
1029 #define TEA6320_TR 0x06 /* treble (0-4) */
1030 #define TEA6320_S 0x07 /* switch register */
1031 /* values for those registers: */
1032 #define TEA6320_S_SA 0x07 /* stereo A input */
1033 #define TEA6320_S_SB 0x06 /* stereo B */
1034 #define TEA6320_S_SC 0x05 /* stereo C */
1035 #define TEA6320_S_SD 0x04 /* stereo D */
1036 #define TEA6320_S_GMU 0x80 /* general mute */
1037
1038 #define TEA6420_S_SA 0x00 /* stereo A input */
1039 #define TEA6420_S_SB 0x01 /* stereo B */
1040 #define TEA6420_S_SC 0x02 /* stereo C */
1041 #define TEA6420_S_SD 0x03 /* stereo D */
1042 #define TEA6420_S_SE 0x04 /* stereo E */
1043 #define TEA6420_S_GMU 0x05 /* general mute */
1044
1045 static int tea6300_shift10(int val) { return val >> 10; }
1046 static int tea6300_shift12(int val) { return val >> 12; }
1047
1048 /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1049 /* 0x0c mirror those immediately higher) */
1050 static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1051 static int tea6320_shift11(int val) { return val >> 11; }
1052 static int tea6320_initialize(struct CHIPSTATE * chip)
1053 {
1054 chip_write(chip, TEA6320_FFR, 0x3f);
1055 chip_write(chip, TEA6320_FFL, 0x3f);
1056 chip_write(chip, TEA6320_FRR, 0x3f);
1057 chip_write(chip, TEA6320_FRL, 0x3f);
1058
1059 return 0;
1060 }
1061
1062
1063 /* ---------------------------------------------------------------------- */
1064 /* audio chip descriptions - defines+functions for tda8425 */
1065
1066 #define TDA8425_VL 0x00 /* volume left */
1067 #define TDA8425_VR 0x01 /* volume right */
1068 #define TDA8425_BA 0x02 /* bass */
1069 #define TDA8425_TR 0x03 /* treble */
1070 #define TDA8425_S1 0x08 /* switch functions */
1071 /* values for those registers: */
1072 #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1073 #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1074 #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1075 #define TDA8425_S1_MU 0x20 /* mute bit */
1076 #define TDA8425_S1_STEREO 0x18 /* stereo bits */
1077 #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1078 #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1079 #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1080 #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1081 #define TDA8425_S1_ML 0x06 /* language selector */
1082 #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1083 #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1084 #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1085 #define TDA8425_S1_IS 0x01 /* channel selector */
1086
1087
1088 static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1089 static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1090
1091 static int tda8425_initialize(struct CHIPSTATE *chip)
1092 {
1093 struct CHIPDESC *desc = chiplist + chip->type;
1094 int inputmap[4] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
1095 /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF};
1096
1097 if (chip->c->adapter->id == I2C_HW_B_RIVA) {
1098 memcpy (desc->inputmap, inputmap, sizeof (inputmap));
1099 }
1100 return 0;
1101 }
1102
1103 static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1104 {
1105 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1106
1107 if (mode & V4L2_TUNER_MODE_LANG1) {
1108 s1 |= TDA8425_S1_ML_SOUND_A;
1109 s1 |= TDA8425_S1_STEREO_PSEUDO;
1110
1111 } else if (mode & V4L2_TUNER_MODE_LANG2) {
1112 s1 |= TDA8425_S1_ML_SOUND_B;
1113 s1 |= TDA8425_S1_STEREO_PSEUDO;
1114
1115 } else {
1116 s1 |= TDA8425_S1_ML_STEREO;
1117
1118 if (mode & V4L2_TUNER_MODE_MONO)
1119 s1 |= TDA8425_S1_STEREO_MONO;
1120 if (mode & V4L2_TUNER_MODE_STEREO)
1121 s1 |= TDA8425_S1_STEREO_SPATIAL;
1122 }
1123 chip_write(chip,TDA8425_S1,s1);
1124 }
1125
1126
1127 /* ---------------------------------------------------------------------- */
1128 /* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1129
1130 /* the registers of 16C54, I2C sub address. */
1131 #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1132 #define PIC16C54_REG_MISC 0x02
1133
1134 /* bit definition of the RESET register, I2C data. */
1135 #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
1136 /* code of remote controller */
1137 #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1138 #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1139 #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1140 #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1141 #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1142 #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1143 #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1144
1145 /* ---------------------------------------------------------------------- */
1146 /* audio chip descriptions - defines+functions for TA8874Z */
1147
1148 /* write 1st byte */
1149 #define TA8874Z_LED_STE 0x80
1150 #define TA8874Z_LED_BIL 0x40
1151 #define TA8874Z_LED_EXT 0x20
1152 #define TA8874Z_MONO_SET 0x10
1153 #define TA8874Z_MUTE 0x08
1154 #define TA8874Z_F_MONO 0x04
1155 #define TA8874Z_MODE_SUB 0x02
1156 #define TA8874Z_MODE_MAIN 0x01
1157
1158 /* write 2nd byte */
1159 /*#define TA8874Z_TI 0x80 */ /* test mode */
1160 #define TA8874Z_SEPARATION 0x3f
1161 #define TA8874Z_SEPARATION_DEFAULT 0x10
1162
1163 /* read */
1164 #define TA8874Z_B1 0x80
1165 #define TA8874Z_B0 0x40
1166 #define TA8874Z_CHAG_FLAG 0x20
1167
1168 /*
1169 * B1 B0
1170 * mono L H
1171 * stereo L L
1172 * BIL H L
1173 */
1174 static int ta8874z_getmode(struct CHIPSTATE *chip)
1175 {
1176 int val, mode;
1177
1178 val = chip_read(chip);
1179 mode = V4L2_TUNER_MODE_MONO;
1180 if (val & TA8874Z_B1){
1181 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1182 }else if (!(val & TA8874Z_B0)){
1183 mode |= V4L2_TUNER_MODE_STEREO;
1184 }
1185 /* v4l_dbg(1, debug, chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1186 return mode;
1187 }
1188
1189 static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1190 static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1191 static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1192 static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1193
1194 static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1195 {
1196 int update = 1;
1197 audiocmd *t = NULL;
1198 v4l_dbg(1, debug, chip->c, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1199
1200 switch(mode){
1201 case V4L2_TUNER_MODE_MONO:
1202 t = &ta8874z_mono;
1203 break;
1204 case V4L2_TUNER_MODE_STEREO:
1205 t = &ta8874z_stereo;
1206 break;
1207 case V4L2_TUNER_MODE_LANG1:
1208 t = &ta8874z_main;
1209 break;
1210 case V4L2_TUNER_MODE_LANG2:
1211 t = &ta8874z_sub;
1212 break;
1213 default:
1214 update = 0;
1215 }
1216
1217 if(update)
1218 chip_cmd(chip, "TA8874Z", t);
1219 }
1220
1221 static int ta8874z_checkit(struct CHIPSTATE *chip)
1222 {
1223 int rc;
1224 rc = chip_read(chip);
1225 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1226 }
1227
1228 /* ---------------------------------------------------------------------- */
1229 /* audio chip descriptions - struct CHIPDESC */
1230
1231 /* insmod options to enable/disable individual audio chips */
1232 static int tda8425 = 1;
1233 static int tda9840 = 1;
1234 static int tda9850 = 1;
1235 static int tda9855 = 1;
1236 static int tda9873 = 1;
1237 static int tda9874a = 1;
1238 static int tea6300; /* default 0 - address clash with msp34xx */
1239 static int tea6320; /* default 0 - address clash with msp34xx */
1240 static int tea6420 = 1;
1241 static int pic16c54 = 1;
1242 static int ta8874z; /* default 0 - address clash with tda9840 */
1243
1244 module_param(tda8425, int, 0444);
1245 module_param(tda9840, int, 0444);
1246 module_param(tda9850, int, 0444);
1247 module_param(tda9855, int, 0444);
1248 module_param(tda9873, int, 0444);
1249 module_param(tda9874a, int, 0444);
1250 module_param(tea6300, int, 0444);
1251 module_param(tea6320, int, 0444);
1252 module_param(tea6420, int, 0444);
1253 module_param(pic16c54, int, 0444);
1254 module_param(ta8874z, int, 0444);
1255
1256 static struct CHIPDESC chiplist[] = {
1257 {
1258 .name = "tda9840",
1259 .id = I2C_DRIVERID_TDA9840,
1260 .insmodopt = &tda9840,
1261 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1262 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1263 .registers = 5,
1264
1265 .checkit = tda9840_checkit,
1266 .getmode = tda9840_getmode,
1267 .setmode = tda9840_setmode,
1268 .checkmode = generic_checkmode,
1269
1270 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1271 /* ,TDA9840_SW, TDA9840_MONO */} }
1272 },
1273 {
1274 .name = "tda9873h",
1275 .id = I2C_DRIVERID_TDA9873,
1276 .checkit = tda9873_checkit,
1277 .insmodopt = &tda9873,
1278 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1279 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1280 .registers = 3,
1281 .flags = CHIP_HAS_INPUTSEL,
1282
1283 .getmode = tda9873_getmode,
1284 .setmode = tda9873_setmode,
1285 .checkmode = generic_checkmode,
1286
1287 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1288 .inputreg = TDA9873_SW,
1289 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1290 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1291 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1292
1293 },
1294 {
1295 .name = "tda9874h/a",
1296 .id = I2C_DRIVERID_TDA9874,
1297 .checkit = tda9874a_checkit,
1298 .initialize = tda9874a_initialize,
1299 .insmodopt = &tda9874a,
1300 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1301 .addr_hi = I2C_ADDR_TDA9874 >> 1,
1302
1303 .getmode = tda9874a_getmode,
1304 .setmode = tda9874a_setmode,
1305 .checkmode = generic_checkmode,
1306 },
1307 {
1308 .name = "tda9850",
1309 .id = I2C_DRIVERID_TDA9850,
1310 .insmodopt = &tda9850,
1311 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1312 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1313 .registers = 11,
1314
1315 .getmode = tda985x_getmode,
1316 .setmode = tda985x_setmode,
1317
1318 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1319 },
1320 {
1321 .name = "tda9855",
1322 .id = I2C_DRIVERID_TDA9855,
1323 .insmodopt = &tda9855,
1324 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1325 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1326 .registers = 11,
1327 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1328
1329 .leftreg = TDA9855_VL,
1330 .rightreg = TDA9855_VR,
1331 .bassreg = TDA9855_BA,
1332 .treblereg = TDA9855_TR,
1333 .volfunc = tda9855_volume,
1334 .bassfunc = tda9855_bass,
1335 .treblefunc = tda9855_treble,
1336
1337 .getmode = tda985x_getmode,
1338 .setmode = tda985x_setmode,
1339
1340 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1341 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1342 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1343 0x07, 0x10, 0x10, 0x03 }}
1344 },
1345 {
1346 .name = "tea6300",
1347 .id = I2C_DRIVERID_TEA6300,
1348 .insmodopt = &tea6300,
1349 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1350 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1351 .registers = 6,
1352 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1353
1354 .leftreg = TEA6300_VR,
1355 .rightreg = TEA6300_VL,
1356 .bassreg = TEA6300_BA,
1357 .treblereg = TEA6300_TR,
1358 .volfunc = tea6300_shift10,
1359 .bassfunc = tea6300_shift12,
1360 .treblefunc = tea6300_shift12,
1361
1362 .inputreg = TEA6300_S,
1363 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1364 .inputmute = TEA6300_S_GMU,
1365 },
1366 {
1367 .name = "tea6320",
1368 .id = I2C_DRIVERID_TEA6300,
1369 .initialize = tea6320_initialize,
1370 .insmodopt = &tea6320,
1371 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1372 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1373 .registers = 8,
1374 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1375
1376 .leftreg = TEA6320_V,
1377 .rightreg = TEA6320_V,
1378 .bassreg = TEA6320_BA,
1379 .treblereg = TEA6320_TR,
1380 .volfunc = tea6320_volume,
1381 .bassfunc = tea6320_shift11,
1382 .treblefunc = tea6320_shift11,
1383
1384 .inputreg = TEA6320_S,
1385 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1386 .inputmute = TEA6300_S_GMU,
1387 },
1388 {
1389 .name = "tea6420",
1390 .id = I2C_DRIVERID_TEA6420,
1391 .insmodopt = &tea6420,
1392 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1393 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1394 .registers = 1,
1395 .flags = CHIP_HAS_INPUTSEL,
1396
1397 .inputreg = -1,
1398 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1399 .inputmute = TEA6300_S_GMU,
1400 },
1401 {
1402 .name = "tda8425",
1403 .id = I2C_DRIVERID_TDA8425,
1404 .insmodopt = &tda8425,
1405 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1406 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1407 .registers = 9,
1408 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1409
1410 .leftreg = TDA8425_VL,
1411 .rightreg = TDA8425_VR,
1412 .bassreg = TDA8425_BA,
1413 .treblereg = TDA8425_TR,
1414 .volfunc = tda8425_shift10,
1415 .bassfunc = tda8425_shift12,
1416 .treblefunc = tda8425_shift12,
1417
1418 .inputreg = TDA8425_S1,
1419 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1420 .inputmute = TDA8425_S1_OFF,
1421
1422 .setmode = tda8425_setmode,
1423 .initialize = tda8425_initialize,
1424 },
1425 {
1426 .name = "pic16c54 (PV951)",
1427 .id = I2C_DRIVERID_PIC16C54_PV9,
1428 .insmodopt = &pic16c54,
1429 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1430 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1431 .registers = 2,
1432 .flags = CHIP_HAS_INPUTSEL,
1433
1434 .inputreg = PIC16C54_REG_MISC,
1435 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1436 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1437 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1438 PIC16C54_MISC_SND_MUTE},
1439 .inputmute = PIC16C54_MISC_SND_MUTE,
1440 },
1441 {
1442 .name = "ta8874z",
1443 .id = -1,
1444 /*.id = I2C_DRIVERID_TA8874Z, */
1445 .checkit = ta8874z_checkit,
1446 .insmodopt = &ta8874z,
1447 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1448 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1449 .registers = 2,
1450
1451 .getmode = ta8874z_getmode,
1452 .setmode = ta8874z_setmode,
1453 .checkmode = generic_checkmode,
1454
1455 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1456 },
1457 { .name = NULL } /* EOF */
1458 };
1459
1460
1461 /* ---------------------------------------------------------------------- */
1462 /* i2c registration */
1463
1464 static int chip_probe(struct i2c_client *client, const struct i2c_device_id *id)
1465 {
1466 struct CHIPSTATE *chip;
1467 struct CHIPDESC *desc;
1468
1469 if (debug) {
1470 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1471 printk(KERN_INFO "tvaudio: known chips: ");
1472 for (desc = chiplist; desc->name != NULL; desc++)
1473 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1474 printk("\n");
1475 }
1476
1477 chip = kzalloc(sizeof(*chip),GFP_KERNEL);
1478 if (!chip)
1479 return -ENOMEM;
1480 chip->c = client;
1481 i2c_set_clientdata(client, chip);
1482
1483 /* find description for the chip */
1484 v4l_dbg(1, debug, client, "chip found @ 0x%x\n", client->addr<<1);
1485 for (desc = chiplist; desc->name != NULL; desc++) {
1486 if (0 == *(desc->insmodopt))
1487 continue;
1488 if (client->addr < desc->addr_lo ||
1489 client->addr > desc->addr_hi)
1490 continue;
1491 if (desc->checkit && !desc->checkit(chip))
1492 continue;
1493 break;
1494 }
1495 if (desc->name == NULL) {
1496 v4l_dbg(1, debug, client, "no matching chip description found\n");
1497 return -EIO;
1498 }
1499 v4l_info(client, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
1500 if (desc->flags) {
1501 v4l_dbg(1, debug, client, "matches:%s%s%s.\n",
1502 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1503 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1504 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
1505 }
1506
1507 /* fill required data structures */
1508 if (!id)
1509 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
1510 chip->type = desc-chiplist;
1511 chip->shadow.count = desc->registers+1;
1512 chip->prevmode = -1;
1513 chip->audmode = V4L2_TUNER_MODE_LANG1;
1514
1515 /* initialization */
1516 if (desc->initialize != NULL)
1517 desc->initialize(chip);
1518 else
1519 chip_cmd(chip,"init",&desc->init);
1520
1521 if (desc->flags & CHIP_HAS_VOLUME) {
1522 chip->left = desc->leftinit ? desc->leftinit : 65535;
1523 chip->right = desc->rightinit ? desc->rightinit : 65535;
1524 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1525 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1526 }
1527 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1528 chip->treble = desc->trebleinit ? desc->trebleinit : 32768;
1529 chip->bass = desc->bassinit ? desc->bassinit : 32768;
1530 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1531 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1532 }
1533
1534 chip->thread = NULL;
1535 if (desc->checkmode) {
1536 /* start async thread */
1537 init_timer(&chip->wt);
1538 chip->wt.function = chip_thread_wake;
1539 chip->wt.data = (unsigned long)chip;
1540 chip->thread = kthread_run(chip_thread, chip, chip->c->name);
1541 if (IS_ERR(chip->thread)) {
1542 v4l_warn(chip->c, "%s: failed to create kthread\n",
1543 chip->c->name);
1544 chip->thread = NULL;
1545 }
1546 }
1547 return 0;
1548 }
1549
1550 static int chip_remove(struct i2c_client *client)
1551 {
1552 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1553
1554 del_timer_sync(&chip->wt);
1555 if (chip->thread) {
1556 /* shutdown async thread */
1557 kthread_stop(chip->thread);
1558 chip->thread = NULL;
1559 }
1560
1561 kfree(chip);
1562 return 0;
1563 }
1564
1565 static int tvaudio_get_ctrl(struct CHIPSTATE *chip,
1566 struct v4l2_control *ctrl)
1567 {
1568 struct CHIPDESC *desc = chiplist + chip->type;
1569
1570 switch (ctrl->id) {
1571 case V4L2_CID_AUDIO_MUTE:
1572 ctrl->value=chip->muted;
1573 return 0;
1574 case V4L2_CID_AUDIO_VOLUME:
1575 if (!(desc->flags & CHIP_HAS_VOLUME))
1576 break;
1577 ctrl->value = max(chip->left,chip->right);
1578 return 0;
1579 case V4L2_CID_AUDIO_BALANCE:
1580 {
1581 int volume;
1582 if (!(desc->flags & CHIP_HAS_VOLUME))
1583 break;
1584 volume = max(chip->left,chip->right);
1585 if (volume)
1586 ctrl->value=(32768*min(chip->left,chip->right))/volume;
1587 else
1588 ctrl->value=32768;
1589 return 0;
1590 }
1591 case V4L2_CID_AUDIO_BASS:
1592 if (desc->flags & CHIP_HAS_BASSTREBLE)
1593 break;
1594 ctrl->value = chip->bass;
1595 return 0;
1596 case V4L2_CID_AUDIO_TREBLE:
1597 if (desc->flags & CHIP_HAS_BASSTREBLE)
1598 return -EINVAL;
1599 ctrl->value = chip->treble;
1600 return 0;
1601 }
1602 return -EINVAL;
1603 }
1604
1605 static int tvaudio_set_ctrl(struct CHIPSTATE *chip,
1606 struct v4l2_control *ctrl)
1607 {
1608 struct CHIPDESC *desc = chiplist + chip->type;
1609
1610 switch (ctrl->id) {
1611 case V4L2_CID_AUDIO_MUTE:
1612 if (ctrl->value < 0 || ctrl->value >= 2)
1613 return -ERANGE;
1614 chip->muted = ctrl->value;
1615 if (chip->muted)
1616 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1617 else
1618 chip_write_masked(chip,desc->inputreg,
1619 desc->inputmap[chip->input],desc->inputmask);
1620 return 0;
1621 case V4L2_CID_AUDIO_VOLUME:
1622 {
1623 int volume,balance;
1624
1625 if (!(desc->flags & CHIP_HAS_VOLUME))
1626 break;
1627
1628 volume = max(chip->left,chip->right);
1629 if (volume)
1630 balance=(32768*min(chip->left,chip->right))/volume;
1631 else
1632 balance=32768;
1633
1634 volume=ctrl->value;
1635 chip->left = (min(65536 - balance,32768) * volume) / 32768;
1636 chip->right = (min(balance,volume *(__u16)32768)) / 32768;
1637
1638 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1639 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1640
1641 return 0;
1642 }
1643 case V4L2_CID_AUDIO_BALANCE:
1644 {
1645 int volume, balance;
1646 if (!(desc->flags & CHIP_HAS_VOLUME))
1647 break;
1648
1649 volume = max(chip->left,chip->right);
1650 balance = ctrl->value;
1651
1652 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1653 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1654
1655 return 0;
1656 }
1657 case V4L2_CID_AUDIO_BASS:
1658 if (desc->flags & CHIP_HAS_BASSTREBLE)
1659 break;
1660 chip->bass = ctrl->value;
1661 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1662
1663 return 0;
1664 case V4L2_CID_AUDIO_TREBLE:
1665 if (desc->flags & CHIP_HAS_BASSTREBLE)
1666 return -EINVAL;
1667
1668 chip->treble = ctrl->value;
1669 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1670
1671 return 0;
1672 }
1673 return -EINVAL;
1674 }
1675
1676
1677 /* ---------------------------------------------------------------------- */
1678 /* video4linux interface */
1679
1680 static int chip_command(struct i2c_client *client,
1681 unsigned int cmd, void *arg)
1682 {
1683 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1684 struct CHIPDESC *desc = chiplist + chip->type;
1685
1686 v4l_dbg(1, debug, chip->c, "%s: chip_command 0x%x\n", chip->c->name, cmd);
1687
1688 switch (cmd) {
1689 case AUDC_SET_RADIO:
1690 chip->radio = 1;
1691 chip->watch_stereo = 0;
1692 /* del_timer(&chip->wt); */
1693 break;
1694 /* --- v4l ioctls --- */
1695 /* take care: bttv does userspace copying, we'll get a
1696 kernel pointer here... */
1697 case VIDIOC_QUERYCTRL:
1698 {
1699 struct v4l2_queryctrl *qc = arg;
1700
1701 switch (qc->id) {
1702 case V4L2_CID_AUDIO_MUTE:
1703 break;
1704 case V4L2_CID_AUDIO_VOLUME:
1705 case V4L2_CID_AUDIO_BALANCE:
1706 if (!(desc->flags & CHIP_HAS_VOLUME))
1707 return -EINVAL;
1708 break;
1709 case V4L2_CID_AUDIO_BASS:
1710 case V4L2_CID_AUDIO_TREBLE:
1711 if (desc->flags & CHIP_HAS_BASSTREBLE)
1712 return -EINVAL;
1713 break;
1714 default:
1715 return -EINVAL;
1716 }
1717 return v4l2_ctrl_query_fill_std(qc);
1718 }
1719 case VIDIOC_S_CTRL:
1720 return tvaudio_set_ctrl(chip, arg);
1721
1722 case VIDIOC_G_CTRL:
1723 return tvaudio_get_ctrl(chip, arg);
1724 case VIDIOC_INT_G_AUDIO_ROUTING:
1725 {
1726 struct v4l2_routing *rt = arg;
1727
1728 rt->input = chip->input;
1729 rt->output = 0;
1730 break;
1731 }
1732 case VIDIOC_INT_S_AUDIO_ROUTING:
1733 {
1734 struct v4l2_routing *rt = arg;
1735
1736 if (!(desc->flags & CHIP_HAS_INPUTSEL) || rt->input >= 4)
1737 return -EINVAL;
1738 /* There are four inputs: tuner, radio, extern and intern. */
1739 chip->input = rt->input;
1740 if (chip->muted)
1741 break;
1742 chip_write_masked(chip, desc->inputreg,
1743 desc->inputmap[chip->input], desc->inputmask);
1744 break;
1745 }
1746 case VIDIOC_S_TUNER:
1747 {
1748 struct v4l2_tuner *vt = arg;
1749 int mode = 0;
1750
1751 if (chip->radio)
1752 break;
1753 switch (vt->audmode) {
1754 case V4L2_TUNER_MODE_MONO:
1755 case V4L2_TUNER_MODE_STEREO:
1756 case V4L2_TUNER_MODE_LANG1:
1757 case V4L2_TUNER_MODE_LANG2:
1758 mode = vt->audmode;
1759 break;
1760 case V4L2_TUNER_MODE_LANG1_LANG2:
1761 mode = V4L2_TUNER_MODE_STEREO;
1762 break;
1763 default:
1764 return -EINVAL;
1765 }
1766 chip->audmode = vt->audmode;
1767
1768 if (desc->setmode && mode) {
1769 chip->watch_stereo = 0;
1770 /* del_timer(&chip->wt); */
1771 chip->mode = mode;
1772 desc->setmode(chip, mode);
1773 }
1774 break;
1775 }
1776 case VIDIOC_G_TUNER:
1777 {
1778 struct v4l2_tuner *vt = arg;
1779 int mode = V4L2_TUNER_MODE_MONO;
1780
1781 if (chip->radio)
1782 break;
1783 vt->audmode = chip->audmode;
1784 vt->rxsubchans = 0;
1785 vt->capability = V4L2_TUNER_CAP_STEREO |
1786 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1787
1788 if (desc->getmode)
1789 mode = desc->getmode(chip);
1790
1791 if (mode & V4L2_TUNER_MODE_MONO)
1792 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1793 if (mode & V4L2_TUNER_MODE_STEREO)
1794 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
1795 /* Note: for SAP it should be mono/lang2 or stereo/lang2.
1796 When this module is converted fully to v4l2, then this
1797 should change for those chips that can detect SAP. */
1798 if (mode & V4L2_TUNER_MODE_LANG1)
1799 vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
1800 V4L2_TUNER_SUB_LANG2;
1801 break;
1802 }
1803 case VIDIOC_S_STD:
1804 chip->radio = 0;
1805 break;
1806 case VIDIOC_S_FREQUENCY:
1807 chip->mode = 0; /* automatic */
1808 if (desc->checkmode) {
1809 desc->setmode(chip,V4L2_TUNER_MODE_MONO);
1810 if (chip->prevmode != V4L2_TUNER_MODE_MONO)
1811 chip->prevmode = -1; /* reset previous mode */
1812 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1813 /* the thread will call checkmode() later */
1814 }
1815 break;
1816
1817 case VIDIOC_G_CHIP_IDENT:
1818 return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_TVAUDIO, 0);
1819 }
1820 return 0;
1821 }
1822
1823 static int chip_legacy_probe(struct i2c_adapter *adap)
1824 {
1825 /* don't attach on saa7146 based cards,
1826 because dedicated drivers are used */
1827 if ((adap->id == I2C_HW_SAA7146))
1828 return 0;
1829 if (adap->class & I2C_CLASS_TV_ANALOG)
1830 return 1;
1831 return 0;
1832 }
1833
1834 /* This driver supports many devices and the idea is to let the driver
1835 detect which device is present. So rather than listing all supported
1836 devices here, we pretend to support a single, fake device type. */
1837 static const struct i2c_device_id chip_id[] = {
1838 { "tvaudio", 0 },
1839 { }
1840 };
1841 MODULE_DEVICE_TABLE(i2c, chip_id);
1842
1843 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
1844 .name = "tvaudio",
1845 .driverid = I2C_DRIVERID_TVAUDIO,
1846 .command = chip_command,
1847 .probe = chip_probe,
1848 .remove = chip_remove,
1849 .legacy_probe = chip_legacy_probe,
1850 .id_table = chip_id,
1851 };
1852
1853 /*
1854 * Local variables:
1855 * c-basic-offset: 8
1856 * End:
1857 */
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