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ia64/kvm: compilation fix. export account_system_vtime.
[pv_ops_mirror.git] / drivers / net / e1000 / e1000_main.c
blob59579b1d8843221304a143f638e59d49f2deba1b
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
40 const char e1000_driver_version[] = DRV_VERSION;
41 static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50 #ifdef CONFIG_E1000E_ENABLED
51 #define PCIE(x)
52 #else
53 #define PCIE(x) x,
54 #endif
55
56 static struct pci_device_id e1000_pci_tbl[] = {
57 INTEL_E1000_ETHERNET_DEVICE(0x1000),
58 INTEL_E1000_ETHERNET_DEVICE(0x1001),
59 INTEL_E1000_ETHERNET_DEVICE(0x1004),
60 INTEL_E1000_ETHERNET_DEVICE(0x1008),
61 INTEL_E1000_ETHERNET_DEVICE(0x1009),
62 INTEL_E1000_ETHERNET_DEVICE(0x100C),
63 INTEL_E1000_ETHERNET_DEVICE(0x100D),
64 INTEL_E1000_ETHERNET_DEVICE(0x100E),
65 INTEL_E1000_ETHERNET_DEVICE(0x100F),
66 INTEL_E1000_ETHERNET_DEVICE(0x1010),
67 INTEL_E1000_ETHERNET_DEVICE(0x1011),
68 INTEL_E1000_ETHERNET_DEVICE(0x1012),
69 INTEL_E1000_ETHERNET_DEVICE(0x1013),
70 INTEL_E1000_ETHERNET_DEVICE(0x1014),
71 INTEL_E1000_ETHERNET_DEVICE(0x1015),
72 INTEL_E1000_ETHERNET_DEVICE(0x1016),
73 INTEL_E1000_ETHERNET_DEVICE(0x1017),
74 INTEL_E1000_ETHERNET_DEVICE(0x1018),
75 INTEL_E1000_ETHERNET_DEVICE(0x1019),
76 INTEL_E1000_ETHERNET_DEVICE(0x101A),
77 INTEL_E1000_ETHERNET_DEVICE(0x101D),
78 INTEL_E1000_ETHERNET_DEVICE(0x101E),
79 INTEL_E1000_ETHERNET_DEVICE(0x1026),
80 INTEL_E1000_ETHERNET_DEVICE(0x1027),
81 INTEL_E1000_ETHERNET_DEVICE(0x1028),
82 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1049))
83 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104A))
84 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104B))
85 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104C))
86 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104D))
87 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x105E))
88 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x105F))
89 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1060))
90 INTEL_E1000_ETHERNET_DEVICE(0x1075),
91 INTEL_E1000_ETHERNET_DEVICE(0x1076),
92 INTEL_E1000_ETHERNET_DEVICE(0x1077),
93 INTEL_E1000_ETHERNET_DEVICE(0x1078),
94 INTEL_E1000_ETHERNET_DEVICE(0x1079),
95 INTEL_E1000_ETHERNET_DEVICE(0x107A),
96 INTEL_E1000_ETHERNET_DEVICE(0x107B),
97 INTEL_E1000_ETHERNET_DEVICE(0x107C),
98 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x107D))
99 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x107E))
100 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x107F))
101 INTEL_E1000_ETHERNET_DEVICE(0x108A),
102 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x108B))
103 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x108C))
104 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1096))
105 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1098))
106 INTEL_E1000_ETHERNET_DEVICE(0x1099),
107 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x109A))
108 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10A4))
109 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10A5))
110 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
111 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10B9))
112 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10BA))
113 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10BB))
114 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10BC))
115 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10C4))
116 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10C5))
117 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10D5))
118 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10D9))
119 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10DA))
120 /* required last entry */
121 {0,}
122 };
123
124 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
125
126 int e1000_up(struct e1000_adapter *adapter);
127 void e1000_down(struct e1000_adapter *adapter);
128 void e1000_reinit_locked(struct e1000_adapter *adapter);
129 void e1000_reset(struct e1000_adapter *adapter);
130 int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
131 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
132 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
133 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
134 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
135 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
136 struct e1000_tx_ring *txdr);
137 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rxdr);
139 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
140 struct e1000_tx_ring *tx_ring);
141 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
142 struct e1000_rx_ring *rx_ring);
143 void e1000_update_stats(struct e1000_adapter *adapter);
144
145 static int e1000_init_module(void);
146 static void e1000_exit_module(void);
147 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
148 static void __devexit e1000_remove(struct pci_dev *pdev);
149 static int e1000_alloc_queues(struct e1000_adapter *adapter);
150 static int e1000_sw_init(struct e1000_adapter *adapter);
151 static int e1000_open(struct net_device *netdev);
152 static int e1000_close(struct net_device *netdev);
153 static void e1000_configure_tx(struct e1000_adapter *adapter);
154 static void e1000_configure_rx(struct e1000_adapter *adapter);
155 static void e1000_setup_rctl(struct e1000_adapter *adapter);
156 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
157 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
158 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
159 struct e1000_tx_ring *tx_ring);
160 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
161 struct e1000_rx_ring *rx_ring);
162 static void e1000_set_rx_mode(struct net_device *netdev);
163 static void e1000_update_phy_info(unsigned long data);
164 static void e1000_watchdog(unsigned long data);
165 static void e1000_82547_tx_fifo_stall(unsigned long data);
166 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
167 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
168 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
169 static int e1000_set_mac(struct net_device *netdev, void *p);
170 static irqreturn_t e1000_intr(int irq, void *data);
171 static irqreturn_t e1000_intr_msi(int irq, void *data);
172 static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
173 struct e1000_tx_ring *tx_ring);
174 #ifdef CONFIG_E1000_NAPI
175 static int e1000_clean(struct napi_struct *napi, int budget);
176 static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
177 struct e1000_rx_ring *rx_ring,
178 int *work_done, int work_to_do);
179 static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
180 struct e1000_rx_ring *rx_ring,
181 int *work_done, int work_to_do);
182 #else
183 static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
184 struct e1000_rx_ring *rx_ring);
185 static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
186 struct e1000_rx_ring *rx_ring);
187 #endif
188 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
189 struct e1000_rx_ring *rx_ring,
190 int cleaned_count);
191 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
192 struct e1000_rx_ring *rx_ring,
193 int cleaned_count);
194 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
195 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
196 int cmd);
197 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
198 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
199 static void e1000_tx_timeout(struct net_device *dev);
200 static void e1000_reset_task(struct work_struct *work);
201 static void e1000_smartspeed(struct e1000_adapter *adapter);
202 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
203 struct sk_buff *skb);
204
205 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
206 static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
207 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
208 static void e1000_restore_vlan(struct e1000_adapter *adapter);
209
210 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
211 #ifdef CONFIG_PM
212 static int e1000_resume(struct pci_dev *pdev);
213 #endif
214 static void e1000_shutdown(struct pci_dev *pdev);
215
216 #ifdef CONFIG_NET_POLL_CONTROLLER
217 /* for netdump / net console */
218 static void e1000_netpoll (struct net_device *netdev);
219 #endif
220
221 #define COPYBREAK_DEFAULT 256
222 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
223 module_param(copybreak, uint, 0644);
224 MODULE_PARM_DESC(copybreak,
225 "Maximum size of packet that is copied to a new buffer on receive");
226
227 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
228 pci_channel_state_t state);
229 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
230 static void e1000_io_resume(struct pci_dev *pdev);
231
232 static struct pci_error_handlers e1000_err_handler = {
233 .error_detected = e1000_io_error_detected,
234 .slot_reset = e1000_io_slot_reset,
235 .resume = e1000_io_resume,
236 };
237
238 static struct pci_driver e1000_driver = {
239 .name = e1000_driver_name,
240 .id_table = e1000_pci_tbl,
241 .probe = e1000_probe,
242 .remove = __devexit_p(e1000_remove),
243 #ifdef CONFIG_PM
244 /* Power Managment Hooks */
245 .suspend = e1000_suspend,
246 .resume = e1000_resume,
247 #endif
248 .shutdown = e1000_shutdown,
249 .err_handler = &e1000_err_handler
250 };
251
252 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
253 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
254 MODULE_LICENSE("GPL");
255 MODULE_VERSION(DRV_VERSION);
256
257 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
258 module_param(debug, int, 0);
259 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
260
261 /**
262 * e1000_init_module - Driver Registration Routine
263 *
264 * e1000_init_module is the first routine called when the driver is
265 * loaded. All it does is register with the PCI subsystem.
266 **/
267
268 static int __init
269 e1000_init_module(void)
270 {
271 int ret;
272 printk(KERN_INFO "%s - version %s\n",
273 e1000_driver_string, e1000_driver_version);
274
275 printk(KERN_INFO "%s\n", e1000_copyright);
276
277 ret = pci_register_driver(&e1000_driver);
278 if (copybreak != COPYBREAK_DEFAULT) {
279 if (copybreak == 0)
280 printk(KERN_INFO "e1000: copybreak disabled\n");
281 else
282 printk(KERN_INFO "e1000: copybreak enabled for "
283 "packets <= %u bytes\n", copybreak);
284 }
285 return ret;
286 }
287
288 module_init(e1000_init_module);
289
290 /**
291 * e1000_exit_module - Driver Exit Cleanup Routine
292 *
293 * e1000_exit_module is called just before the driver is removed
294 * from memory.
295 **/
296
297 static void __exit
298 e1000_exit_module(void)
299 {
300 pci_unregister_driver(&e1000_driver);
301 }
302
303 module_exit(e1000_exit_module);
304
305 static int e1000_request_irq(struct e1000_adapter *adapter)
306 {
307 struct net_device *netdev = adapter->netdev;
308 irq_handler_t handler = e1000_intr;
309 int irq_flags = IRQF_SHARED;
310 int err;
311
312 if (adapter->hw.mac_type >= e1000_82571) {
313 adapter->have_msi = !pci_enable_msi(adapter->pdev);
314 if (adapter->have_msi) {
315 handler = e1000_intr_msi;
316 irq_flags = 0;
317 }
318 }
319
320 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
321 netdev);
322 if (err) {
323 if (adapter->have_msi)
324 pci_disable_msi(adapter->pdev);
325 DPRINTK(PROBE, ERR,
326 "Unable to allocate interrupt Error: %d\n", err);
327 }
328
329 return err;
330 }
331
332 static void e1000_free_irq(struct e1000_adapter *adapter)
333 {
334 struct net_device *netdev = adapter->netdev;
335
336 free_irq(adapter->pdev->irq, netdev);
337
338 if (adapter->have_msi)
339 pci_disable_msi(adapter->pdev);
340 }
341
342 /**
343 * e1000_irq_disable - Mask off interrupt generation on the NIC
344 * @adapter: board private structure
345 **/
346
347 static void
348 e1000_irq_disable(struct e1000_adapter *adapter)
349 {
350 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
351 E1000_WRITE_FLUSH(&adapter->hw);
352 synchronize_irq(adapter->pdev->irq);
353 }
354
355 /**
356 * e1000_irq_enable - Enable default interrupt generation settings
357 * @adapter: board private structure
358 **/
359
360 static void
361 e1000_irq_enable(struct e1000_adapter *adapter)
362 {
363 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
364 E1000_WRITE_FLUSH(&adapter->hw);
365 }
366
367 static void
368 e1000_update_mng_vlan(struct e1000_adapter *adapter)
369 {
370 struct net_device *netdev = adapter->netdev;
371 u16 vid = adapter->hw.mng_cookie.vlan_id;
372 u16 old_vid = adapter->mng_vlan_id;
373 if (adapter->vlgrp) {
374 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
375 if (adapter->hw.mng_cookie.status &
376 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
377 e1000_vlan_rx_add_vid(netdev, vid);
378 adapter->mng_vlan_id = vid;
379 } else
380 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
381
382 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
383 (vid != old_vid) &&
384 !vlan_group_get_device(adapter->vlgrp, old_vid))
385 e1000_vlan_rx_kill_vid(netdev, old_vid);
386 } else
387 adapter->mng_vlan_id = vid;
388 }
389 }
390
391 /**
392 * e1000_release_hw_control - release control of the h/w to f/w
393 * @adapter: address of board private structure
394 *
395 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
396 * For ASF and Pass Through versions of f/w this means that the
397 * driver is no longer loaded. For AMT version (only with 82573) i
398 * of the f/w this means that the network i/f is closed.
399 *
400 **/
401
402 static void
403 e1000_release_hw_control(struct e1000_adapter *adapter)
404 {
405 u32 ctrl_ext;
406 u32 swsm;
407
408 /* Let firmware taken over control of h/w */
409 switch (adapter->hw.mac_type) {
410 case e1000_82573:
411 swsm = E1000_READ_REG(&adapter->hw, SWSM);
412 E1000_WRITE_REG(&adapter->hw, SWSM,
413 swsm & ~E1000_SWSM_DRV_LOAD);
414 break;
415 case e1000_82571:
416 case e1000_82572:
417 case e1000_80003es2lan:
418 case e1000_ich8lan:
419 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
420 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
421 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
422 break;
423 default:
424 break;
425 }
426 }
427
428 /**
429 * e1000_get_hw_control - get control of the h/w from f/w
430 * @adapter: address of board private structure
431 *
432 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
433 * For ASF and Pass Through versions of f/w this means that
434 * the driver is loaded. For AMT version (only with 82573)
435 * of the f/w this means that the network i/f is open.
436 *
437 **/
438
439 static void
440 e1000_get_hw_control(struct e1000_adapter *adapter)
441 {
442 u32 ctrl_ext;
443 u32 swsm;
444
445 /* Let firmware know the driver has taken over */
446 switch (adapter->hw.mac_type) {
447 case e1000_82573:
448 swsm = E1000_READ_REG(&adapter->hw, SWSM);
449 E1000_WRITE_REG(&adapter->hw, SWSM,
450 swsm | E1000_SWSM_DRV_LOAD);
451 break;
452 case e1000_82571:
453 case e1000_82572:
454 case e1000_80003es2lan:
455 case e1000_ich8lan:
456 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
457 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
458 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
459 break;
460 default:
461 break;
462 }
463 }
464
465 static void
466 e1000_init_manageability(struct e1000_adapter *adapter)
467 {
468 if (adapter->en_mng_pt) {
469 u32 manc = E1000_READ_REG(&adapter->hw, MANC);
470
471 /* disable hardware interception of ARP */
472 manc &= ~(E1000_MANC_ARP_EN);
473
474 /* enable receiving management packets to the host */
475 /* this will probably generate destination unreachable messages
476 * from the host OS, but the packets will be handled on SMBUS */
477 if (adapter->hw.has_manc2h) {
478 u32 manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
479
480 manc |= E1000_MANC_EN_MNG2HOST;
481 #define E1000_MNG2HOST_PORT_623 (1 << 5)
482 #define E1000_MNG2HOST_PORT_664 (1 << 6)
483 manc2h |= E1000_MNG2HOST_PORT_623;
484 manc2h |= E1000_MNG2HOST_PORT_664;
485 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
486 }
487
488 E1000_WRITE_REG(&adapter->hw, MANC, manc);
489 }
490 }
491
492 static void
493 e1000_release_manageability(struct e1000_adapter *adapter)
494 {
495 if (adapter->en_mng_pt) {
496 u32 manc = E1000_READ_REG(&adapter->hw, MANC);
497
498 /* re-enable hardware interception of ARP */
499 manc |= E1000_MANC_ARP_EN;
500
501 if (adapter->hw.has_manc2h)
502 manc &= ~E1000_MANC_EN_MNG2HOST;
503
504 /* don't explicitly have to mess with MANC2H since
505 * MANC has an enable disable that gates MANC2H */
506
507 E1000_WRITE_REG(&adapter->hw, MANC, manc);
508 }
509 }
510
511 /**
512 * e1000_configure - configure the hardware for RX and TX
513 * @adapter = private board structure
514 **/
515 static void e1000_configure(struct e1000_adapter *adapter)
516 {
517 struct net_device *netdev = adapter->netdev;
518 int i;
519
520 e1000_set_rx_mode(netdev);
521
522 e1000_restore_vlan(adapter);
523 e1000_init_manageability(adapter);
524
525 e1000_configure_tx(adapter);
526 e1000_setup_rctl(adapter);
527 e1000_configure_rx(adapter);
528 /* call E1000_DESC_UNUSED which always leaves
529 * at least 1 descriptor unused to make sure
530 * next_to_use != next_to_clean */
531 for (i = 0; i < adapter->num_rx_queues; i++) {
532 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
533 adapter->alloc_rx_buf(adapter, ring,
534 E1000_DESC_UNUSED(ring));
535 }
536
537 adapter->tx_queue_len = netdev->tx_queue_len;
538 }
539
540 int e1000_up(struct e1000_adapter *adapter)
541 {
542 /* hardware has been reset, we need to reload some things */
543 e1000_configure(adapter);
544
545 clear_bit(__E1000_DOWN, &adapter->flags);
546
547 #ifdef CONFIG_E1000_NAPI
548 napi_enable(&adapter->napi);
549 #endif
550 e1000_irq_enable(adapter);
551
552 /* fire a link change interrupt to start the watchdog */
553 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
554 return 0;
555 }
556
557 /**
558 * e1000_power_up_phy - restore link in case the phy was powered down
559 * @adapter: address of board private structure
560 *
561 * The phy may be powered down to save power and turn off link when the
562 * driver is unloaded and wake on lan is not enabled (among others)
563 * *** this routine MUST be followed by a call to e1000_reset ***
564 *
565 **/
566
567 void e1000_power_up_phy(struct e1000_adapter *adapter)
568 {
569 u16 mii_reg = 0;
570
571 /* Just clear the power down bit to wake the phy back up */
572 if (adapter->hw.media_type == e1000_media_type_copper) {
573 /* according to the manual, the phy will retain its
574 * settings across a power-down/up cycle */
575 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
576 mii_reg &= ~MII_CR_POWER_DOWN;
577 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
578 }
579 }
580
581 static void e1000_power_down_phy(struct e1000_adapter *adapter)
582 {
583 /* Power down the PHY so no link is implied when interface is down *
584 * The PHY cannot be powered down if any of the following is true *
585 * (a) WoL is enabled
586 * (b) AMT is active
587 * (c) SoL/IDER session is active */
588 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
589 adapter->hw.media_type == e1000_media_type_copper) {
590 u16 mii_reg = 0;
591
592 switch (adapter->hw.mac_type) {
593 case e1000_82540:
594 case e1000_82545:
595 case e1000_82545_rev_3:
596 case e1000_82546:
597 case e1000_82546_rev_3:
598 case e1000_82541:
599 case e1000_82541_rev_2:
600 case e1000_82547:
601 case e1000_82547_rev_2:
602 if (E1000_READ_REG(&adapter->hw, MANC) &
603 E1000_MANC_SMBUS_EN)
604 goto out;
605 break;
606 case e1000_82571:
607 case e1000_82572:
608 case e1000_82573:
609 case e1000_80003es2lan:
610 case e1000_ich8lan:
611 if (e1000_check_mng_mode(&adapter->hw) ||
612 e1000_check_phy_reset_block(&adapter->hw))
613 goto out;
614 break;
615 default:
616 goto out;
617 }
618 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
619 mii_reg |= MII_CR_POWER_DOWN;
620 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
621 mdelay(1);
622 }
623 out:
624 return;
625 }
626
627 void
628 e1000_down(struct e1000_adapter *adapter)
629 {
630 struct net_device *netdev = adapter->netdev;
631
632 /* signal that we're down so the interrupt handler does not
633 * reschedule our watchdog timer */
634 set_bit(__E1000_DOWN, &adapter->flags);
635
636 #ifdef CONFIG_E1000_NAPI
637 napi_disable(&adapter->napi);
638 #endif
639 e1000_irq_disable(adapter);
640
641 del_timer_sync(&adapter->tx_fifo_stall_timer);
642 del_timer_sync(&adapter->watchdog_timer);
643 del_timer_sync(&adapter->phy_info_timer);
644
645 netdev->tx_queue_len = adapter->tx_queue_len;
646 adapter->link_speed = 0;
647 adapter->link_duplex = 0;
648 netif_carrier_off(netdev);
649 netif_stop_queue(netdev);
650
651 e1000_reset(adapter);
652 e1000_clean_all_tx_rings(adapter);
653 e1000_clean_all_rx_rings(adapter);
654 }
655
656 void
657 e1000_reinit_locked(struct e1000_adapter *adapter)
658 {
659 WARN_ON(in_interrupt());
660 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
661 msleep(1);
662 e1000_down(adapter);
663 e1000_up(adapter);
664 clear_bit(__E1000_RESETTING, &adapter->flags);
665 }
666
667 void
668 e1000_reset(struct e1000_adapter *adapter)
669 {
670 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
671 u16 fc_high_water_mark = E1000_FC_HIGH_DIFF;
672 bool legacy_pba_adjust = false;
673
674 /* Repartition Pba for greater than 9k mtu
675 * To take effect CTRL.RST is required.
676 */
677
678 switch (adapter->hw.mac_type) {
679 case e1000_82542_rev2_0:
680 case e1000_82542_rev2_1:
681 case e1000_82543:
682 case e1000_82544:
683 case e1000_82540:
684 case e1000_82541:
685 case e1000_82541_rev_2:
686 legacy_pba_adjust = true;
687 pba = E1000_PBA_48K;
688 break;
689 case e1000_82545:
690 case e1000_82545_rev_3:
691 case e1000_82546:
692 case e1000_82546_rev_3:
693 pba = E1000_PBA_48K;
694 break;
695 case e1000_82547:
696 case e1000_82547_rev_2:
697 legacy_pba_adjust = true;
698 pba = E1000_PBA_30K;
699 break;
700 case e1000_82571:
701 case e1000_82572:
702 case e1000_80003es2lan:
703 pba = E1000_PBA_38K;
704 break;
705 case e1000_82573:
706 pba = E1000_PBA_20K;
707 break;
708 case e1000_ich8lan:
709 pba = E1000_PBA_8K;
710 case e1000_undefined:
711 case e1000_num_macs:
712 break;
713 }
714
715 if (legacy_pba_adjust) {
716 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
717 pba -= 8; /* allocate more FIFO for Tx */
718
719 if (adapter->hw.mac_type == e1000_82547) {
720 adapter->tx_fifo_head = 0;
721 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
722 adapter->tx_fifo_size =
723 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
724 atomic_set(&adapter->tx_fifo_stall, 0);
725 }
726 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
727 /* adjust PBA for jumbo frames */
728 E1000_WRITE_REG(&adapter->hw, PBA, pba);
729
730 /* To maintain wire speed transmits, the Tx FIFO should be
731 * large enough to accomodate two full transmit packets,
732 * rounded up to the next 1KB and expressed in KB. Likewise,
733 * the Rx FIFO should be large enough to accomodate at least
734 * one full receive packet and is similarly rounded up and
735 * expressed in KB. */
736 pba = E1000_READ_REG(&adapter->hw, PBA);
737 /* upper 16 bits has Tx packet buffer allocation size in KB */
738 tx_space = pba >> 16;
739 /* lower 16 bits has Rx packet buffer allocation size in KB */
740 pba &= 0xffff;
741 /* don't include ethernet FCS because hardware appends/strips */
742 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
743 VLAN_TAG_SIZE;
744 min_tx_space = min_rx_space;
745 min_tx_space *= 2;
746 min_tx_space = ALIGN(min_tx_space, 1024);
747 min_tx_space >>= 10;
748 min_rx_space = ALIGN(min_rx_space, 1024);
749 min_rx_space >>= 10;
750
751 /* If current Tx allocation is less than the min Tx FIFO size,
752 * and the min Tx FIFO size is less than the current Rx FIFO
753 * allocation, take space away from current Rx allocation */
754 if (tx_space < min_tx_space &&
755 ((min_tx_space - tx_space) < pba)) {
756 pba = pba - (min_tx_space - tx_space);
757
758 /* PCI/PCIx hardware has PBA alignment constraints */
759 switch (adapter->hw.mac_type) {
760 case e1000_82545 ... e1000_82546_rev_3:
761 pba &= ~(E1000_PBA_8K - 1);
762 break;
763 default:
764 break;
765 }
766
767 /* if short on rx space, rx wins and must trump tx
768 * adjustment or use Early Receive if available */
769 if (pba < min_rx_space) {
770 switch (adapter->hw.mac_type) {
771 case e1000_82573:
772 /* ERT enabled in e1000_configure_rx */
773 break;
774 default:
775 pba = min_rx_space;
776 break;
777 }
778 }
779 }
780 }
781
782 E1000_WRITE_REG(&adapter->hw, PBA, pba);
783
784 /* flow control settings */
785 /* Set the FC high water mark to 90% of the FIFO size.
786 * Required to clear last 3 LSB */
787 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
788 /* We can't use 90% on small FIFOs because the remainder
789 * would be less than 1 full frame. In this case, we size
790 * it to allow at least a full frame above the high water
791 * mark. */
792 if (pba < E1000_PBA_16K)
793 fc_high_water_mark = (pba * 1024) - 1600;
794
795 adapter->hw.fc_high_water = fc_high_water_mark;
796 adapter->hw.fc_low_water = fc_high_water_mark - 8;
797 if (adapter->hw.mac_type == e1000_80003es2lan)
798 adapter->hw.fc_pause_time = 0xFFFF;
799 else
800 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
801 adapter->hw.fc_send_xon = 1;
802 adapter->hw.fc = adapter->hw.original_fc;
803
804 /* Allow time for pending master requests to run */
805 e1000_reset_hw(&adapter->hw);
806 if (adapter->hw.mac_type >= e1000_82544)
807 E1000_WRITE_REG(&adapter->hw, WUC, 0);
808
809 if (e1000_init_hw(&adapter->hw))
810 DPRINTK(PROBE, ERR, "Hardware Error\n");
811 e1000_update_mng_vlan(adapter);
812
813 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
814 if (adapter->hw.mac_type >= e1000_82544 &&
815 adapter->hw.mac_type <= e1000_82547_rev_2 &&
816 adapter->hw.autoneg == 1 &&
817 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
818 u32 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
819 /* clear phy power management bit if we are in gig only mode,
820 * which if enabled will attempt negotiation to 100Mb, which
821 * can cause a loss of link at power off or driver unload */
822 ctrl &= ~E1000_CTRL_SWDPIN3;
823 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
824 }
825
826 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
827 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
828
829 e1000_reset_adaptive(&adapter->hw);
830 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
831
832 if (!adapter->smart_power_down &&
833 (adapter->hw.mac_type == e1000_82571 ||
834 adapter->hw.mac_type == e1000_82572)) {
835 u16 phy_data = 0;
836 /* speed up time to link by disabling smart power down, ignore
837 * the return value of this function because there is nothing
838 * different we would do if it failed */
839 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
840 &phy_data);
841 phy_data &= ~IGP02E1000_PM_SPD;
842 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
843 phy_data);
844 }
845
846 e1000_release_manageability(adapter);
847 }
848
849 /**
850 * Dump the eeprom for users having checksum issues
851 **/
852 static void e1000_dump_eeprom(struct e1000_adapter *adapter)
853 {
854 struct net_device *netdev = adapter->netdev;
855 struct ethtool_eeprom eeprom;
856 const struct ethtool_ops *ops = netdev->ethtool_ops;
857 u8 *data;
858 int i;
859 u16 csum_old, csum_new = 0;
860
861 eeprom.len = ops->get_eeprom_len(netdev);
862 eeprom.offset = 0;
863
864 data = kmalloc(eeprom.len, GFP_KERNEL);
865 if (!data) {
866 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
867 " data\n");
868 return;
869 }
870
871 ops->get_eeprom(netdev, &eeprom, data);
872
873 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
874 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
875 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
876 csum_new += data[i] + (data[i + 1] << 8);
877 csum_new = EEPROM_SUM - csum_new;
878
879 printk(KERN_ERR "/*********************/\n");
880 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
881 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
882
883 printk(KERN_ERR "Offset Values\n");
884 printk(KERN_ERR "======== ======\n");
885 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
886
887 printk(KERN_ERR "Include this output when contacting your support "
888 "provider.\n");
889 printk(KERN_ERR "This is not a software error! Something bad "
890 "happened to your hardware or\n");
891 printk(KERN_ERR "EEPROM image. Ignoring this "
892 "problem could result in further problems,\n");
893 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
894 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
895 "which is invalid\n");
896 printk(KERN_ERR "and requires you to set the proper MAC "
897 "address manually before continuing\n");
898 printk(KERN_ERR "to enable this network device.\n");
899 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
900 "to your hardware vendor\n");
901 printk(KERN_ERR "or Intel Customer Support: linux-nics@intel.com\n");
902 printk(KERN_ERR "/*********************/\n");
903
904 kfree(data);
905 }
906
907 /**
908 * e1000_probe - Device Initialization Routine
909 * @pdev: PCI device information struct
910 * @ent: entry in e1000_pci_tbl
911 *
912 * Returns 0 on success, negative on failure
913 *
914 * e1000_probe initializes an adapter identified by a pci_dev structure.
915 * The OS initialization, configuring of the adapter private structure,
916 * and a hardware reset occur.
917 **/
918
919 static int __devinit
920 e1000_probe(struct pci_dev *pdev,
921 const struct pci_device_id *ent)
922 {
923 struct net_device *netdev;
924 struct e1000_adapter *adapter;
925
926 static int cards_found = 0;
927 static int global_quad_port_a = 0; /* global ksp3 port a indication */
928 int i, err, pci_using_dac;
929 u16 eeprom_data = 0;
930 u16 eeprom_apme_mask = E1000_EEPROM_APME;
931 DECLARE_MAC_BUF(mac);
932
933 if ((err = pci_enable_device(pdev)))
934 return err;
935
936 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
937 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
938 pci_using_dac = 1;
939 } else {
940 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
941 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
942 E1000_ERR("No usable DMA configuration, aborting\n");
943 goto err_dma;
944 }
945 pci_using_dac = 0;
946 }
947
948 if ((err = pci_request_regions(pdev, e1000_driver_name)))
949 goto err_pci_reg;
950
951 pci_set_master(pdev);
952
953 err = -ENOMEM;
954 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
955 if (!netdev)
956 goto err_alloc_etherdev;
957
958 SET_NETDEV_DEV(netdev, &pdev->dev);
959
960 pci_set_drvdata(pdev, netdev);
961 adapter = netdev_priv(netdev);
962 adapter->netdev = netdev;
963 adapter->pdev = pdev;
964 adapter->hw.back = adapter;
965 adapter->msg_enable = (1 << debug) - 1;
966
967 err = -EIO;
968 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, BAR_0),
969 pci_resource_len(pdev, BAR_0));
970 if (!adapter->hw.hw_addr)
971 goto err_ioremap;
972
973 for (i = BAR_1; i <= BAR_5; i++) {
974 if (pci_resource_len(pdev, i) == 0)
975 continue;
976 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
977 adapter->hw.io_base = pci_resource_start(pdev, i);
978 break;
979 }
980 }
981
982 netdev->open = &e1000_open;
983 netdev->stop = &e1000_close;
984 netdev->hard_start_xmit = &e1000_xmit_frame;
985 netdev->get_stats = &e1000_get_stats;
986 netdev->set_rx_mode = &e1000_set_rx_mode;
987 netdev->set_mac_address = &e1000_set_mac;
988 netdev->change_mtu = &e1000_change_mtu;
989 netdev->do_ioctl = &e1000_ioctl;
990 e1000_set_ethtool_ops(netdev);
991 netdev->tx_timeout = &e1000_tx_timeout;
992 netdev->watchdog_timeo = 5 * HZ;
993 #ifdef CONFIG_E1000_NAPI
994 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
995 #endif
996 netdev->vlan_rx_register = e1000_vlan_rx_register;
997 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
998 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
999 #ifdef CONFIG_NET_POLL_CONTROLLER
1000 netdev->poll_controller = e1000_netpoll;
1001 #endif
1002 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1003
1004 adapter->bd_number = cards_found;
1005
1006 /* setup the private structure */
1007
1008 if ((err = e1000_sw_init(adapter)))
1009 goto err_sw_init;
1010
1011 err = -EIO;
1012 /* Flash BAR mapping must happen after e1000_sw_init
1013 * because it depends on mac_type */
1014 if ((adapter->hw.mac_type == e1000_ich8lan) &&
1015 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
1016 adapter->hw.flash_address =
1017 ioremap(pci_resource_start(pdev, 1),
1018 pci_resource_len(pdev, 1));
1019 if (!adapter->hw.flash_address)
1020 goto err_flashmap;
1021 }
1022
1023 if (e1000_check_phy_reset_block(&adapter->hw))
1024 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
1025
1026 if (adapter->hw.mac_type >= e1000_82543) {
1027 netdev->features = NETIF_F_SG |
1028 NETIF_F_HW_CSUM |
1029 NETIF_F_HW_VLAN_TX |
1030 NETIF_F_HW_VLAN_RX |
1031 NETIF_F_HW_VLAN_FILTER;
1032 if (adapter->hw.mac_type == e1000_ich8lan)
1033 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1034 }
1035
1036 if ((adapter->hw.mac_type >= e1000_82544) &&
1037 (adapter->hw.mac_type != e1000_82547))
1038 netdev->features |= NETIF_F_TSO;
1039
1040 if (adapter->hw.mac_type > e1000_82547_rev_2)
1041 netdev->features |= NETIF_F_TSO6;
1042 if (pci_using_dac)
1043 netdev->features |= NETIF_F_HIGHDMA;
1044
1045 netdev->features |= NETIF_F_LLTX;
1046
1047 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
1048
1049 /* initialize eeprom parameters */
1050 if (e1000_init_eeprom_params(&adapter->hw)) {
1051 E1000_ERR("EEPROM initialization failed\n");
1052 goto err_eeprom;
1053 }
1054
1055 /* before reading the EEPROM, reset the controller to
1056 * put the device in a known good starting state */
1057
1058 e1000_reset_hw(&adapter->hw);
1059
1060 /* make sure the EEPROM is good */
1061 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1062 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1063 e1000_dump_eeprom(adapter);
1064 /*
1065 * set MAC address to all zeroes to invalidate and temporary
1066 * disable this device for the user. This blocks regular
1067 * traffic while still permitting ethtool ioctls from reaching
1068 * the hardware as well as allowing the user to run the
1069 * interface after manually setting a hw addr using
1070 * `ip set address`
1071 */
1072 memset(adapter->hw.mac_addr, 0, netdev->addr_len);
1073 } else {
1074 /* copy the MAC address out of the EEPROM */
1075 if (e1000_read_mac_addr(&adapter->hw))
1076 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1077 }
1078 /* don't block initalization here due to bad MAC address */
1079 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1080 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1081
1082 if (!is_valid_ether_addr(netdev->perm_addr))
1083 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1084
1085 e1000_get_bus_info(&adapter->hw);
1086
1087 init_timer(&adapter->tx_fifo_stall_timer);
1088 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1089 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1090
1091 init_timer(&adapter->watchdog_timer);
1092 adapter->watchdog_timer.function = &e1000_watchdog;
1093 adapter->watchdog_timer.data = (unsigned long) adapter;
1094
1095 init_timer(&adapter->phy_info_timer);
1096 adapter->phy_info_timer.function = &e1000_update_phy_info;
1097 adapter->phy_info_timer.data = (unsigned long) adapter;
1098
1099 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1100
1101 e1000_check_options(adapter);
1102
1103 /* Initial Wake on LAN setting
1104 * If APM wake is enabled in the EEPROM,
1105 * enable the ACPI Magic Packet filter
1106 */
1107
1108 switch (adapter->hw.mac_type) {
1109 case e1000_82542_rev2_0:
1110 case e1000_82542_rev2_1:
1111 case e1000_82543:
1112 break;
1113 case e1000_82544:
1114 e1000_read_eeprom(&adapter->hw,
1115 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1116 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1117 break;
1118 case e1000_ich8lan:
1119 e1000_read_eeprom(&adapter->hw,
1120 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1121 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1122 break;
1123 case e1000_82546:
1124 case e1000_82546_rev_3:
1125 case e1000_82571:
1126 case e1000_80003es2lan:
1127 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1128 e1000_read_eeprom(&adapter->hw,
1129 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1130 break;
1131 }
1132 /* Fall Through */
1133 default:
1134 e1000_read_eeprom(&adapter->hw,
1135 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1136 break;
1137 }
1138 if (eeprom_data & eeprom_apme_mask)
1139 adapter->eeprom_wol |= E1000_WUFC_MAG;
1140
1141 /* now that we have the eeprom settings, apply the special cases
1142 * where the eeprom may be wrong or the board simply won't support
1143 * wake on lan on a particular port */
1144 switch (pdev->device) {
1145 case E1000_DEV_ID_82546GB_PCIE:
1146 adapter->eeprom_wol = 0;
1147 break;
1148 case E1000_DEV_ID_82546EB_FIBER:
1149 case E1000_DEV_ID_82546GB_FIBER:
1150 case E1000_DEV_ID_82571EB_FIBER:
1151 /* Wake events only supported on port A for dual fiber
1152 * regardless of eeprom setting */
1153 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1154 adapter->eeprom_wol = 0;
1155 break;
1156 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1157 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1158 case E1000_DEV_ID_82571EB_QUAD_FIBER:
1159 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1160 case E1000_DEV_ID_82571PT_QUAD_COPPER:
1161 /* if quad port adapter, disable WoL on all but port A */
1162 if (global_quad_port_a != 0)
1163 adapter->eeprom_wol = 0;
1164 else
1165 adapter->quad_port_a = 1;
1166 /* Reset for multiple quad port adapters */
1167 if (++global_quad_port_a == 4)
1168 global_quad_port_a = 0;
1169 break;
1170 }
1171
1172 /* initialize the wol settings based on the eeprom settings */
1173 adapter->wol = adapter->eeprom_wol;
1174
1175 /* print bus type/speed/width info */
1176 {
1177 struct e1000_hw *hw = &adapter->hw;
1178 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1179 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1180 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1181 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1182 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1183 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1184 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1185 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1186 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1187 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1188 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1189 "32-bit"));
1190 }
1191
1192 printk("%s\n", print_mac(mac, netdev->dev_addr));
1193
1194 if (adapter->hw.bus_type == e1000_bus_type_pci_express) {
1195 DPRINTK(PROBE, WARNING, "This device (id %04x:%04x) will no "
1196 "longer be supported by this driver in the future.\n",
1197 pdev->vendor, pdev->device);
1198 DPRINTK(PROBE, WARNING, "please use the \"e1000e\" "
1199 "driver instead.\n");
1200 }
1201
1202 /* reset the hardware with the new settings */
1203 e1000_reset(adapter);
1204
1205 /* If the controller is 82573 and f/w is AMT, do not set
1206 * DRV_LOAD until the interface is up. For all other cases,
1207 * let the f/w know that the h/w is now under the control
1208 * of the driver. */
1209 if (adapter->hw.mac_type != e1000_82573 ||
1210 !e1000_check_mng_mode(&adapter->hw))
1211 e1000_get_hw_control(adapter);
1212
1213 /* tell the stack to leave us alone until e1000_open() is called */
1214 netif_carrier_off(netdev);
1215 netif_stop_queue(netdev);
1216
1217 strcpy(netdev->name, "eth%d");
1218 if ((err = register_netdev(netdev)))
1219 goto err_register;
1220
1221 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1222
1223 cards_found++;
1224 return 0;
1225
1226 err_register:
1227 e1000_release_hw_control(adapter);
1228 err_eeprom:
1229 if (!e1000_check_phy_reset_block(&adapter->hw))
1230 e1000_phy_hw_reset(&adapter->hw);
1231
1232 if (adapter->hw.flash_address)
1233 iounmap(adapter->hw.flash_address);
1234 err_flashmap:
1235 #ifdef CONFIG_E1000_NAPI
1236 for (i = 0; i < adapter->num_rx_queues; i++)
1237 dev_put(&adapter->polling_netdev[i]);
1238 #endif
1239
1240 kfree(adapter->tx_ring);
1241 kfree(adapter->rx_ring);
1242 #ifdef CONFIG_E1000_NAPI
1243 kfree(adapter->polling_netdev);
1244 #endif
1245 err_sw_init:
1246 iounmap(adapter->hw.hw_addr);
1247 err_ioremap:
1248 free_netdev(netdev);
1249 err_alloc_etherdev:
1250 pci_release_regions(pdev);
1251 err_pci_reg:
1252 err_dma:
1253 pci_disable_device(pdev);
1254 return err;
1255 }
1256
1257 /**
1258 * e1000_remove - Device Removal Routine
1259 * @pdev: PCI device information struct
1260 *
1261 * e1000_remove is called by the PCI subsystem to alert the driver
1262 * that it should release a PCI device. The could be caused by a
1263 * Hot-Plug event, or because the driver is going to be removed from
1264 * memory.
1265 **/
1266
1267 static void __devexit
1268 e1000_remove(struct pci_dev *pdev)
1269 {
1270 struct net_device *netdev = pci_get_drvdata(pdev);
1271 struct e1000_adapter *adapter = netdev_priv(netdev);
1272 #ifdef CONFIG_E1000_NAPI
1273 int i;
1274 #endif
1275
1276 cancel_work_sync(&adapter->reset_task);
1277
1278 e1000_release_manageability(adapter);
1279
1280 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1281 * would have already happened in close and is redundant. */
1282 e1000_release_hw_control(adapter);
1283
1284 #ifdef CONFIG_E1000_NAPI
1285 for (i = 0; i < adapter->num_rx_queues; i++)
1286 dev_put(&adapter->polling_netdev[i]);
1287 #endif
1288
1289 unregister_netdev(netdev);
1290
1291 if (!e1000_check_phy_reset_block(&adapter->hw))
1292 e1000_phy_hw_reset(&adapter->hw);
1293
1294 kfree(adapter->tx_ring);
1295 kfree(adapter->rx_ring);
1296 #ifdef CONFIG_E1000_NAPI
1297 kfree(adapter->polling_netdev);
1298 #endif
1299
1300 iounmap(adapter->hw.hw_addr);
1301 if (adapter->hw.flash_address)
1302 iounmap(adapter->hw.flash_address);
1303 pci_release_regions(pdev);
1304
1305 free_netdev(netdev);
1306
1307 pci_disable_device(pdev);
1308 }
1309
1310 /**
1311 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1312 * @adapter: board private structure to initialize
1313 *
1314 * e1000_sw_init initializes the Adapter private data structure.
1315 * Fields are initialized based on PCI device information and
1316 * OS network device settings (MTU size).
1317 **/
1318
1319 static int __devinit
1320 e1000_sw_init(struct e1000_adapter *adapter)
1321 {
1322 struct e1000_hw *hw = &adapter->hw;
1323 struct net_device *netdev = adapter->netdev;
1324 struct pci_dev *pdev = adapter->pdev;
1325 #ifdef CONFIG_E1000_NAPI
1326 int i;
1327 #endif
1328
1329 /* PCI config space info */
1330
1331 hw->vendor_id = pdev->vendor;
1332 hw->device_id = pdev->device;
1333 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1334 hw->subsystem_id = pdev->subsystem_device;
1335 hw->revision_id = pdev->revision;
1336
1337 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1338
1339 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1340 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1341 hw->max_frame_size = netdev->mtu +
1342 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1343 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1344
1345 /* identify the MAC */
1346
1347 if (e1000_set_mac_type(hw)) {
1348 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1349 return -EIO;
1350 }
1351
1352 switch (hw->mac_type) {
1353 default:
1354 break;
1355 case e1000_82541:
1356 case e1000_82547:
1357 case e1000_82541_rev_2:
1358 case e1000_82547_rev_2:
1359 hw->phy_init_script = 1;
1360 break;
1361 }
1362
1363 e1000_set_media_type(hw);
1364
1365 hw->wait_autoneg_complete = false;
1366 hw->tbi_compatibility_en = true;
1367 hw->adaptive_ifs = true;
1368
1369 /* Copper options */
1370
1371 if (hw->media_type == e1000_media_type_copper) {
1372 hw->mdix = AUTO_ALL_MODES;
1373 hw->disable_polarity_correction = false;
1374 hw->master_slave = E1000_MASTER_SLAVE;
1375 }
1376
1377 adapter->num_tx_queues = 1;
1378 adapter->num_rx_queues = 1;
1379
1380 if (e1000_alloc_queues(adapter)) {
1381 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1382 return -ENOMEM;
1383 }
1384
1385 #ifdef CONFIG_E1000_NAPI
1386 for (i = 0; i < adapter->num_rx_queues; i++) {
1387 adapter->polling_netdev[i].priv = adapter;
1388 dev_hold(&adapter->polling_netdev[i]);
1389 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1390 }
1391 spin_lock_init(&adapter->tx_queue_lock);
1392 #endif
1393
1394 /* Explicitly disable IRQ since the NIC can be in any state. */
1395 e1000_irq_disable(adapter);
1396
1397 spin_lock_init(&adapter->stats_lock);
1398
1399 set_bit(__E1000_DOWN, &adapter->flags);
1400
1401 return 0;
1402 }
1403
1404 /**
1405 * e1000_alloc_queues - Allocate memory for all rings
1406 * @adapter: board private structure to initialize
1407 *
1408 * We allocate one ring per queue at run-time since we don't know the
1409 * number of queues at compile-time. The polling_netdev array is
1410 * intended for Multiqueue, but should work fine with a single queue.
1411 **/
1412
1413 static int __devinit
1414 e1000_alloc_queues(struct e1000_adapter *adapter)
1415 {
1416 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1417 sizeof(struct e1000_tx_ring), GFP_KERNEL);
1418 if (!adapter->tx_ring)
1419 return -ENOMEM;
1420
1421 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1422 sizeof(struct e1000_rx_ring), GFP_KERNEL);
1423 if (!adapter->rx_ring) {
1424 kfree(adapter->tx_ring);
1425 return -ENOMEM;
1426 }
1427
1428 #ifdef CONFIG_E1000_NAPI
1429 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1430 sizeof(struct net_device),
1431 GFP_KERNEL);
1432 if (!adapter->polling_netdev) {
1433 kfree(adapter->tx_ring);
1434 kfree(adapter->rx_ring);
1435 return -ENOMEM;
1436 }
1437 #endif
1438
1439 return E1000_SUCCESS;
1440 }
1441
1442 /**
1443 * e1000_open - Called when a network interface is made active
1444 * @netdev: network interface device structure
1445 *
1446 * Returns 0 on success, negative value on failure
1447 *
1448 * The open entry point is called when a network interface is made
1449 * active by the system (IFF_UP). At this point all resources needed
1450 * for transmit and receive operations are allocated, the interrupt
1451 * handler is registered with the OS, the watchdog timer is started,
1452 * and the stack is notified that the interface is ready.
1453 **/
1454
1455 static int
1456 e1000_open(struct net_device *netdev)
1457 {
1458 struct e1000_adapter *adapter = netdev_priv(netdev);
1459 int err;
1460
1461 /* disallow open during test */
1462 if (test_bit(__E1000_TESTING, &adapter->flags))
1463 return -EBUSY;
1464
1465 /* allocate transmit descriptors */
1466 err = e1000_setup_all_tx_resources(adapter);
1467 if (err)
1468 goto err_setup_tx;
1469
1470 /* allocate receive descriptors */
1471 err = e1000_setup_all_rx_resources(adapter);
1472 if (err)
1473 goto err_setup_rx;
1474
1475 e1000_power_up_phy(adapter);
1476
1477 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1478 if ((adapter->hw.mng_cookie.status &
1479 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1480 e1000_update_mng_vlan(adapter);
1481 }
1482
1483 /* If AMT is enabled, let the firmware know that the network
1484 * interface is now open */
1485 if (adapter->hw.mac_type == e1000_82573 &&
1486 e1000_check_mng_mode(&adapter->hw))
1487 e1000_get_hw_control(adapter);
1488
1489 /* before we allocate an interrupt, we must be ready to handle it.
1490 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1491 * as soon as we call pci_request_irq, so we have to setup our
1492 * clean_rx handler before we do so. */
1493 e1000_configure(adapter);
1494
1495 err = e1000_request_irq(adapter);
1496 if (err)
1497 goto err_req_irq;
1498
1499 /* From here on the code is the same as e1000_up() */
1500 clear_bit(__E1000_DOWN, &adapter->flags);
1501
1502 #ifdef CONFIG_E1000_NAPI
1503 napi_enable(&adapter->napi);
1504 #endif
1505
1506 e1000_irq_enable(adapter);
1507
1508 /* fire a link status change interrupt to start the watchdog */
1509 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1510
1511 return E1000_SUCCESS;
1512
1513 err_req_irq:
1514 e1000_release_hw_control(adapter);
1515 e1000_power_down_phy(adapter);
1516 e1000_free_all_rx_resources(adapter);
1517 err_setup_rx:
1518 e1000_free_all_tx_resources(adapter);
1519 err_setup_tx:
1520 e1000_reset(adapter);
1521
1522 return err;
1523 }
1524
1525 /**
1526 * e1000_close - Disables a network interface
1527 * @netdev: network interface device structure
1528 *
1529 * Returns 0, this is not allowed to fail
1530 *
1531 * The close entry point is called when an interface is de-activated
1532 * by the OS. The hardware is still under the drivers control, but
1533 * needs to be disabled. A global MAC reset is issued to stop the
1534 * hardware, and all transmit and receive resources are freed.
1535 **/
1536
1537 static int
1538 e1000_close(struct net_device *netdev)
1539 {
1540 struct e1000_adapter *adapter = netdev_priv(netdev);
1541
1542 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1543 e1000_down(adapter);
1544 e1000_power_down_phy(adapter);
1545 e1000_free_irq(adapter);
1546
1547 e1000_free_all_tx_resources(adapter);
1548 e1000_free_all_rx_resources(adapter);
1549
1550 /* kill manageability vlan ID if supported, but not if a vlan with
1551 * the same ID is registered on the host OS (let 8021q kill it) */
1552 if ((adapter->hw.mng_cookie.status &
1553 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1554 !(adapter->vlgrp &&
1555 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1556 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1557 }
1558
1559 /* If AMT is enabled, let the firmware know that the network
1560 * interface is now closed */
1561 if (adapter->hw.mac_type == e1000_82573 &&
1562 e1000_check_mng_mode(&adapter->hw))
1563 e1000_release_hw_control(adapter);
1564
1565 return 0;
1566 }
1567
1568 /**
1569 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1570 * @adapter: address of board private structure
1571 * @start: address of beginning of memory
1572 * @len: length of memory
1573 **/
1574 static bool
1575 e1000_check_64k_bound(struct e1000_adapter *adapter,
1576 void *start, unsigned long len)
1577 {
1578 unsigned long begin = (unsigned long) start;
1579 unsigned long end = begin + len;
1580
1581 /* First rev 82545 and 82546 need to not allow any memory
1582 * write location to cross 64k boundary due to errata 23 */
1583 if (adapter->hw.mac_type == e1000_82545 ||
1584 adapter->hw.mac_type == e1000_82546) {
1585 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1586 }
1587
1588 return true;
1589 }
1590
1591 /**
1592 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1593 * @adapter: board private structure
1594 * @txdr: tx descriptor ring (for a specific queue) to setup
1595 *
1596 * Return 0 on success, negative on failure
1597 **/
1598
1599 static int
1600 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1601 struct e1000_tx_ring *txdr)
1602 {
1603 struct pci_dev *pdev = adapter->pdev;
1604 int size;
1605
1606 size = sizeof(struct e1000_buffer) * txdr->count;
1607 txdr->buffer_info = vmalloc(size);
1608 if (!txdr->buffer_info) {
1609 DPRINTK(PROBE, ERR,
1610 "Unable to allocate memory for the transmit descriptor ring\n");
1611 return -ENOMEM;
1612 }
1613 memset(txdr->buffer_info, 0, size);
1614
1615 /* round up to nearest 4K */
1616
1617 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1618 txdr->size = ALIGN(txdr->size, 4096);
1619
1620 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1621 if (!txdr->desc) {
1622 setup_tx_desc_die:
1623 vfree(txdr->buffer_info);
1624 DPRINTK(PROBE, ERR,
1625 "Unable to allocate memory for the transmit descriptor ring\n");
1626 return -ENOMEM;
1627 }
1628
1629 /* Fix for errata 23, can't cross 64kB boundary */
1630 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1631 void *olddesc = txdr->desc;
1632 dma_addr_t olddma = txdr->dma;
1633 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1634 "at %p\n", txdr->size, txdr->desc);
1635 /* Try again, without freeing the previous */
1636 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1637 /* Failed allocation, critical failure */
1638 if (!txdr->desc) {
1639 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1640 goto setup_tx_desc_die;
1641 }
1642
1643 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1644 /* give up */
1645 pci_free_consistent(pdev, txdr->size, txdr->desc,
1646 txdr->dma);
1647 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1648 DPRINTK(PROBE, ERR,
1649 "Unable to allocate aligned memory "
1650 "for the transmit descriptor ring\n");
1651 vfree(txdr->buffer_info);
1652 return -ENOMEM;
1653 } else {
1654 /* Free old allocation, new allocation was successful */
1655 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1656 }
1657 }
1658 memset(txdr->desc, 0, txdr->size);
1659
1660 txdr->next_to_use = 0;
1661 txdr->next_to_clean = 0;
1662 spin_lock_init(&txdr->tx_lock);
1663
1664 return 0;
1665 }
1666
1667 /**
1668 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1669 * (Descriptors) for all queues
1670 * @adapter: board private structure
1671 *
1672 * Return 0 on success, negative on failure
1673 **/
1674
1675 int
1676 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1677 {
1678 int i, err = 0;
1679
1680 for (i = 0; i < adapter->num_tx_queues; i++) {
1681 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1682 if (err) {
1683 DPRINTK(PROBE, ERR,
1684 "Allocation for Tx Queue %u failed\n", i);
1685 for (i-- ; i >= 0; i--)
1686 e1000_free_tx_resources(adapter,
1687 &adapter->tx_ring[i]);
1688 break;
1689 }
1690 }
1691
1692 return err;
1693 }
1694
1695 /**
1696 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1697 * @adapter: board private structure
1698 *
1699 * Configure the Tx unit of the MAC after a reset.
1700 **/
1701
1702 static void
1703 e1000_configure_tx(struct e1000_adapter *adapter)
1704 {
1705 u64 tdba;
1706 struct e1000_hw *hw = &adapter->hw;
1707 u32 tdlen, tctl, tipg, tarc;
1708 u32 ipgr1, ipgr2;
1709
1710 /* Setup the HW Tx Head and Tail descriptor pointers */
1711
1712 switch (adapter->num_tx_queues) {
1713 case 1:
1714 default:
1715 tdba = adapter->tx_ring[0].dma;
1716 tdlen = adapter->tx_ring[0].count *
1717 sizeof(struct e1000_tx_desc);
1718 E1000_WRITE_REG(hw, TDLEN, tdlen);
1719 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1720 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1721 E1000_WRITE_REG(hw, TDT, 0);
1722 E1000_WRITE_REG(hw, TDH, 0);
1723 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1724 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1725 break;
1726 }
1727
1728 /* Set the default values for the Tx Inter Packet Gap timer */
1729 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1730 (hw->media_type == e1000_media_type_fiber ||
1731 hw->media_type == e1000_media_type_internal_serdes))
1732 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1733 else
1734 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1735
1736 switch (hw->mac_type) {
1737 case e1000_82542_rev2_0:
1738 case e1000_82542_rev2_1:
1739 tipg = DEFAULT_82542_TIPG_IPGT;
1740 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1741 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1742 break;
1743 case e1000_80003es2lan:
1744 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1745 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1746 break;
1747 default:
1748 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1749 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1750 break;
1751 }
1752 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1753 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1754 E1000_WRITE_REG(hw, TIPG, tipg);
1755
1756 /* Set the Tx Interrupt Delay register */
1757
1758 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1759 if (hw->mac_type >= e1000_82540)
1760 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1761
1762 /* Program the Transmit Control Register */
1763
1764 tctl = E1000_READ_REG(hw, TCTL);
1765 tctl &= ~E1000_TCTL_CT;
1766 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1767 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1768
1769 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1770 tarc = E1000_READ_REG(hw, TARC0);
1771 /* set the speed mode bit, we'll clear it if we're not at
1772 * gigabit link later */
1773 tarc |= (1 << 21);
1774 E1000_WRITE_REG(hw, TARC0, tarc);
1775 } else if (hw->mac_type == e1000_80003es2lan) {
1776 tarc = E1000_READ_REG(hw, TARC0);
1777 tarc |= 1;
1778 E1000_WRITE_REG(hw, TARC0, tarc);
1779 tarc = E1000_READ_REG(hw, TARC1);
1780 tarc |= 1;
1781 E1000_WRITE_REG(hw, TARC1, tarc);
1782 }
1783
1784 e1000_config_collision_dist(hw);
1785
1786 /* Setup Transmit Descriptor Settings for eop descriptor */
1787 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1788
1789 /* only set IDE if we are delaying interrupts using the timers */
1790 if (adapter->tx_int_delay)
1791 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1792
1793 if (hw->mac_type < e1000_82543)
1794 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1795 else
1796 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1797
1798 /* Cache if we're 82544 running in PCI-X because we'll
1799 * need this to apply a workaround later in the send path. */
1800 if (hw->mac_type == e1000_82544 &&
1801 hw->bus_type == e1000_bus_type_pcix)
1802 adapter->pcix_82544 = 1;
1803
1804 E1000_WRITE_REG(hw, TCTL, tctl);
1805
1806 }
1807
1808 /**
1809 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1810 * @adapter: board private structure
1811 * @rxdr: rx descriptor ring (for a specific queue) to setup
1812 *
1813 * Returns 0 on success, negative on failure
1814 **/
1815
1816 static int
1817 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1818 struct e1000_rx_ring *rxdr)
1819 {
1820 struct pci_dev *pdev = adapter->pdev;
1821 int size, desc_len;
1822
1823 size = sizeof(struct e1000_buffer) * rxdr->count;
1824 rxdr->buffer_info = vmalloc(size);
1825 if (!rxdr->buffer_info) {
1826 DPRINTK(PROBE, ERR,
1827 "Unable to allocate memory for the receive descriptor ring\n");
1828 return -ENOMEM;
1829 }
1830 memset(rxdr->buffer_info, 0, size);
1831
1832 rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
1833 GFP_KERNEL);
1834 if (!rxdr->ps_page) {
1835 vfree(rxdr->buffer_info);
1836 DPRINTK(PROBE, ERR,
1837 "Unable to allocate memory for the receive descriptor ring\n");
1838 return -ENOMEM;
1839 }
1840
1841 rxdr->ps_page_dma = kcalloc(rxdr->count,
1842 sizeof(struct e1000_ps_page_dma),
1843 GFP_KERNEL);
1844 if (!rxdr->ps_page_dma) {
1845 vfree(rxdr->buffer_info);
1846 kfree(rxdr->ps_page);
1847 DPRINTK(PROBE, ERR,
1848 "Unable to allocate memory for the receive descriptor ring\n");
1849 return -ENOMEM;
1850 }
1851
1852 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1853 desc_len = sizeof(struct e1000_rx_desc);
1854 else
1855 desc_len = sizeof(union e1000_rx_desc_packet_split);
1856
1857 /* Round up to nearest 4K */
1858
1859 rxdr->size = rxdr->count * desc_len;
1860 rxdr->size = ALIGN(rxdr->size, 4096);
1861
1862 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1863
1864 if (!rxdr->desc) {
1865 DPRINTK(PROBE, ERR,
1866 "Unable to allocate memory for the receive descriptor ring\n");
1867 setup_rx_desc_die:
1868 vfree(rxdr->buffer_info);
1869 kfree(rxdr->ps_page);
1870 kfree(rxdr->ps_page_dma);
1871 return -ENOMEM;
1872 }
1873
1874 /* Fix for errata 23, can't cross 64kB boundary */
1875 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1876 void *olddesc = rxdr->desc;
1877 dma_addr_t olddma = rxdr->dma;
1878 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1879 "at %p\n", rxdr->size, rxdr->desc);
1880 /* Try again, without freeing the previous */
1881 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1882 /* Failed allocation, critical failure */
1883 if (!rxdr->desc) {
1884 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1885 DPRINTK(PROBE, ERR,
1886 "Unable to allocate memory "
1887 "for the receive descriptor ring\n");
1888 goto setup_rx_desc_die;
1889 }
1890
1891 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1892 /* give up */
1893 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1894 rxdr->dma);
1895 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1896 DPRINTK(PROBE, ERR,
1897 "Unable to allocate aligned memory "
1898 "for the receive descriptor ring\n");
1899 goto setup_rx_desc_die;
1900 } else {
1901 /* Free old allocation, new allocation was successful */
1902 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1903 }
1904 }
1905 memset(rxdr->desc, 0, rxdr->size);
1906
1907 rxdr->next_to_clean = 0;
1908 rxdr->next_to_use = 0;
1909
1910 return 0;
1911 }
1912
1913 /**
1914 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1915 * (Descriptors) for all queues
1916 * @adapter: board private structure
1917 *
1918 * Return 0 on success, negative on failure
1919 **/
1920
1921 int
1922 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1923 {
1924 int i, err = 0;
1925
1926 for (i = 0; i < adapter->num_rx_queues; i++) {
1927 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1928 if (err) {
1929 DPRINTK(PROBE, ERR,
1930 "Allocation for Rx Queue %u failed\n", i);
1931 for (i-- ; i >= 0; i--)
1932 e1000_free_rx_resources(adapter,
1933 &adapter->rx_ring[i]);
1934 break;
1935 }
1936 }
1937
1938 return err;
1939 }
1940
1941 /**
1942 * e1000_setup_rctl - configure the receive control registers
1943 * @adapter: Board private structure
1944 **/
1945 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1946 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1947 static void
1948 e1000_setup_rctl(struct e1000_adapter *adapter)
1949 {
1950 u32 rctl, rfctl;
1951 u32 psrctl = 0;
1952 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1953 u32 pages = 0;
1954 #endif
1955
1956 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1957
1958 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1959
1960 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1961 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1962 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1963
1964 if (adapter->hw.tbi_compatibility_on == 1)
1965 rctl |= E1000_RCTL_SBP;
1966 else
1967 rctl &= ~E1000_RCTL_SBP;
1968
1969 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1970 rctl &= ~E1000_RCTL_LPE;
1971 else
1972 rctl |= E1000_RCTL_LPE;
1973
1974 /* Setup buffer sizes */
1975 rctl &= ~E1000_RCTL_SZ_4096;
1976 rctl |= E1000_RCTL_BSEX;
1977 switch (adapter->rx_buffer_len) {
1978 case E1000_RXBUFFER_256:
1979 rctl |= E1000_RCTL_SZ_256;
1980 rctl &= ~E1000_RCTL_BSEX;
1981 break;
1982 case E1000_RXBUFFER_512:
1983 rctl |= E1000_RCTL_SZ_512;
1984 rctl &= ~E1000_RCTL_BSEX;
1985 break;
1986 case E1000_RXBUFFER_1024:
1987 rctl |= E1000_RCTL_SZ_1024;
1988 rctl &= ~E1000_RCTL_BSEX;
1989 break;
1990 case E1000_RXBUFFER_2048:
1991 default:
1992 rctl |= E1000_RCTL_SZ_2048;
1993 rctl &= ~E1000_RCTL_BSEX;
1994 break;
1995 case E1000_RXBUFFER_4096:
1996 rctl |= E1000_RCTL_SZ_4096;
1997 break;
1998 case E1000_RXBUFFER_8192:
1999 rctl |= E1000_RCTL_SZ_8192;
2000 break;
2001 case E1000_RXBUFFER_16384:
2002 rctl |= E1000_RCTL_SZ_16384;
2003 break;
2004 }
2005
2006 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2007 /* 82571 and greater support packet-split where the protocol
2008 * header is placed in skb->data and the packet data is
2009 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2010 * In the case of a non-split, skb->data is linearly filled,
2011 * followed by the page buffers. Therefore, skb->data is
2012 * sized to hold the largest protocol header.
2013 */
2014 /* allocations using alloc_page take too long for regular MTU
2015 * so only enable packet split for jumbo frames */
2016 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
2017 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
2018 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
2019 adapter->rx_ps_pages = pages;
2020 else
2021 adapter->rx_ps_pages = 0;
2022 #endif
2023 if (adapter->rx_ps_pages) {
2024 /* Configure extra packet-split registers */
2025 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
2026 rfctl |= E1000_RFCTL_EXTEN;
2027 /* disable packet split support for IPv6 extension headers,
2028 * because some malformed IPv6 headers can hang the RX */
2029 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2030 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2031
2032 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
2033
2034 rctl |= E1000_RCTL_DTYP_PS;
2035
2036 psrctl |= adapter->rx_ps_bsize0 >>
2037 E1000_PSRCTL_BSIZE0_SHIFT;
2038
2039 switch (adapter->rx_ps_pages) {
2040 case 3:
2041 psrctl |= PAGE_SIZE <<
2042 E1000_PSRCTL_BSIZE3_SHIFT;
2043 case 2:
2044 psrctl |= PAGE_SIZE <<
2045 E1000_PSRCTL_BSIZE2_SHIFT;
2046 case 1:
2047 psrctl |= PAGE_SIZE >>
2048 E1000_PSRCTL_BSIZE1_SHIFT;
2049 break;
2050 }
2051
2052 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
2053 }
2054
2055 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2056 }
2057
2058 /**
2059 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
2060 * @adapter: board private structure
2061 *
2062 * Configure the Rx unit of the MAC after a reset.
2063 **/
2064
2065 static void
2066 e1000_configure_rx(struct e1000_adapter *adapter)
2067 {
2068 u64 rdba;
2069 struct e1000_hw *hw = &adapter->hw;
2070 u32 rdlen, rctl, rxcsum, ctrl_ext;
2071
2072 if (adapter->rx_ps_pages) {
2073 /* this is a 32 byte descriptor */
2074 rdlen = adapter->rx_ring[0].count *
2075 sizeof(union e1000_rx_desc_packet_split);
2076 adapter->clean_rx = e1000_clean_rx_irq_ps;
2077 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2078 } else {
2079 rdlen = adapter->rx_ring[0].count *
2080 sizeof(struct e1000_rx_desc);
2081 adapter->clean_rx = e1000_clean_rx_irq;
2082 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2083 }
2084
2085 /* disable receives while setting up the descriptors */
2086 rctl = E1000_READ_REG(hw, RCTL);
2087 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2088
2089 /* set the Receive Delay Timer Register */
2090 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2091
2092 if (hw->mac_type >= e1000_82540) {
2093 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2094 if (adapter->itr_setting != 0)
2095 E1000_WRITE_REG(hw, ITR,
2096 1000000000 / (adapter->itr * 256));
2097 }
2098
2099 if (hw->mac_type >= e1000_82571) {
2100 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2101 /* Reset delay timers after every interrupt */
2102 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2103 #ifdef CONFIG_E1000_NAPI
2104 /* Auto-Mask interrupts upon ICR access */
2105 ctrl_ext |= E1000_CTRL_EXT_IAME;
2106 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2107 #endif
2108 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2109 E1000_WRITE_FLUSH(hw);
2110 }
2111
2112 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2113 * the Base and Length of the Rx Descriptor Ring */
2114 switch (adapter->num_rx_queues) {
2115 case 1:
2116 default:
2117 rdba = adapter->rx_ring[0].dma;
2118 E1000_WRITE_REG(hw, RDLEN, rdlen);
2119 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2120 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2121 E1000_WRITE_REG(hw, RDT, 0);
2122 E1000_WRITE_REG(hw, RDH, 0);
2123 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2124 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2125 break;
2126 }
2127
2128 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2129 if (hw->mac_type >= e1000_82543) {
2130 rxcsum = E1000_READ_REG(hw, RXCSUM);
2131 if (adapter->rx_csum) {
2132 rxcsum |= E1000_RXCSUM_TUOFL;
2133
2134 /* Enable 82571 IPv4 payload checksum for UDP fragments
2135 * Must be used in conjunction with packet-split. */
2136 if ((hw->mac_type >= e1000_82571) &&
2137 (adapter->rx_ps_pages)) {
2138 rxcsum |= E1000_RXCSUM_IPPCSE;
2139 }
2140 } else {
2141 rxcsum &= ~E1000_RXCSUM_TUOFL;
2142 /* don't need to clear IPPCSE as it defaults to 0 */
2143 }
2144 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2145 }
2146
2147 /* enable early receives on 82573, only takes effect if using > 2048
2148 * byte total frame size. for example only for jumbo frames */
2149 #define E1000_ERT_2048 0x100
2150 if (hw->mac_type == e1000_82573)
2151 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2152
2153 /* Enable Receives */
2154 E1000_WRITE_REG(hw, RCTL, rctl);
2155 }
2156
2157 /**
2158 * e1000_free_tx_resources - Free Tx Resources per Queue
2159 * @adapter: board private structure
2160 * @tx_ring: Tx descriptor ring for a specific queue
2161 *
2162 * Free all transmit software resources
2163 **/
2164
2165 static void
2166 e1000_free_tx_resources(struct e1000_adapter *adapter,
2167 struct e1000_tx_ring *tx_ring)
2168 {
2169 struct pci_dev *pdev = adapter->pdev;
2170
2171 e1000_clean_tx_ring(adapter, tx_ring);
2172
2173 vfree(tx_ring->buffer_info);
2174 tx_ring->buffer_info = NULL;
2175
2176 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2177
2178 tx_ring->desc = NULL;
2179 }
2180
2181 /**
2182 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2183 * @adapter: board private structure
2184 *
2185 * Free all transmit software resources
2186 **/
2187
2188 void
2189 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2190 {
2191 int i;
2192
2193 for (i = 0; i < adapter->num_tx_queues; i++)
2194 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2195 }
2196
2197 static void
2198 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2199 struct e1000_buffer *buffer_info)
2200 {
2201 if (buffer_info->dma) {
2202 pci_unmap_page(adapter->pdev,
2203 buffer_info->dma,
2204 buffer_info->length,
2205 PCI_DMA_TODEVICE);
2206 buffer_info->dma = 0;
2207 }
2208 if (buffer_info->skb) {
2209 dev_kfree_skb_any(buffer_info->skb);
2210 buffer_info->skb = NULL;
2211 }
2212 /* buffer_info must be completely set up in the transmit path */
2213 }
2214
2215 /**
2216 * e1000_clean_tx_ring - Free Tx Buffers
2217 * @adapter: board private structure
2218 * @tx_ring: ring to be cleaned
2219 **/
2220
2221 static void
2222 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2223 struct e1000_tx_ring *tx_ring)
2224 {
2225 struct e1000_buffer *buffer_info;
2226 unsigned long size;
2227 unsigned int i;
2228
2229 /* Free all the Tx ring sk_buffs */
2230
2231 for (i = 0; i < tx_ring->count; i++) {
2232 buffer_info = &tx_ring->buffer_info[i];
2233 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2234 }
2235
2236 size = sizeof(struct e1000_buffer) * tx_ring->count;
2237 memset(tx_ring->buffer_info, 0, size);
2238
2239 /* Zero out the descriptor ring */
2240
2241 memset(tx_ring->desc, 0, tx_ring->size);
2242
2243 tx_ring->next_to_use = 0;
2244 tx_ring->next_to_clean = 0;
2245 tx_ring->last_tx_tso = 0;
2246
2247 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2248 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2249 }
2250
2251 /**
2252 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2253 * @adapter: board private structure
2254 **/
2255
2256 static void
2257 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2258 {
2259 int i;
2260
2261 for (i = 0; i < adapter->num_tx_queues; i++)
2262 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2263 }
2264
2265 /**
2266 * e1000_free_rx_resources - Free Rx Resources
2267 * @adapter: board private structure
2268 * @rx_ring: ring to clean the resources from
2269 *
2270 * Free all receive software resources
2271 **/
2272
2273 static void
2274 e1000_free_rx_resources(struct e1000_adapter *adapter,
2275 struct e1000_rx_ring *rx_ring)
2276 {
2277 struct pci_dev *pdev = adapter->pdev;
2278
2279 e1000_clean_rx_ring(adapter, rx_ring);
2280
2281 vfree(rx_ring->buffer_info);
2282 rx_ring->buffer_info = NULL;
2283 kfree(rx_ring->ps_page);
2284 rx_ring->ps_page = NULL;
2285 kfree(rx_ring->ps_page_dma);
2286 rx_ring->ps_page_dma = NULL;
2287
2288 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2289
2290 rx_ring->desc = NULL;
2291 }
2292
2293 /**
2294 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2295 * @adapter: board private structure
2296 *
2297 * Free all receive software resources
2298 **/
2299
2300 void
2301 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2302 {
2303 int i;
2304
2305 for (i = 0; i < adapter->num_rx_queues; i++)
2306 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2307 }
2308
2309 /**
2310 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2311 * @adapter: board private structure
2312 * @rx_ring: ring to free buffers from
2313 **/
2314
2315 static void
2316 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2317 struct e1000_rx_ring *rx_ring)
2318 {
2319 struct e1000_buffer *buffer_info;
2320 struct e1000_ps_page *ps_page;
2321 struct e1000_ps_page_dma *ps_page_dma;
2322 struct pci_dev *pdev = adapter->pdev;
2323 unsigned long size;
2324 unsigned int i, j;
2325
2326 /* Free all the Rx ring sk_buffs */
2327 for (i = 0; i < rx_ring->count; i++) {
2328 buffer_info = &rx_ring->buffer_info[i];
2329 if (buffer_info->skb) {
2330 pci_unmap_single(pdev,
2331 buffer_info->dma,
2332 buffer_info->length,
2333 PCI_DMA_FROMDEVICE);
2334
2335 dev_kfree_skb(buffer_info->skb);
2336 buffer_info->skb = NULL;
2337 }
2338 ps_page = &rx_ring->ps_page[i];
2339 ps_page_dma = &rx_ring->ps_page_dma[i];
2340 for (j = 0; j < adapter->rx_ps_pages; j++) {
2341 if (!ps_page->ps_page[j]) break;
2342 pci_unmap_page(pdev,
2343 ps_page_dma->ps_page_dma[j],
2344 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2345 ps_page_dma->ps_page_dma[j] = 0;
2346 put_page(ps_page->ps_page[j]);
2347 ps_page->ps_page[j] = NULL;
2348 }
2349 }
2350
2351 size = sizeof(struct e1000_buffer) * rx_ring->count;
2352 memset(rx_ring->buffer_info, 0, size);
2353 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2354 memset(rx_ring->ps_page, 0, size);
2355 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2356 memset(rx_ring->ps_page_dma, 0, size);
2357
2358 /* Zero out the descriptor ring */
2359
2360 memset(rx_ring->desc, 0, rx_ring->size);
2361
2362 rx_ring->next_to_clean = 0;
2363 rx_ring->next_to_use = 0;
2364
2365 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2366 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2367 }
2368
2369 /**
2370 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2371 * @adapter: board private structure
2372 **/
2373
2374 static void
2375 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2376 {
2377 int i;
2378
2379 for (i = 0; i < adapter->num_rx_queues; i++)
2380 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2381 }
2382
2383 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2384 * and memory write and invalidate disabled for certain operations
2385 */
2386 static void
2387 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2388 {
2389 struct net_device *netdev = adapter->netdev;
2390 u32 rctl;
2391
2392 e1000_pci_clear_mwi(&adapter->hw);
2393
2394 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2395 rctl |= E1000_RCTL_RST;
2396 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2397 E1000_WRITE_FLUSH(&adapter->hw);
2398 mdelay(5);
2399
2400 if (netif_running(netdev))
2401 e1000_clean_all_rx_rings(adapter);
2402 }
2403
2404 static void
2405 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2406 {
2407 struct net_device *netdev = adapter->netdev;
2408 u32 rctl;
2409
2410 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2411 rctl &= ~E1000_RCTL_RST;
2412 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2413 E1000_WRITE_FLUSH(&adapter->hw);
2414 mdelay(5);
2415
2416 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2417 e1000_pci_set_mwi(&adapter->hw);
2418
2419 if (netif_running(netdev)) {
2420 /* No need to loop, because 82542 supports only 1 queue */
2421 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2422 e1000_configure_rx(adapter);
2423 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2424 }
2425 }
2426
2427 /**
2428 * e1000_set_mac - Change the Ethernet Address of the NIC
2429 * @netdev: network interface device structure
2430 * @p: pointer to an address structure
2431 *
2432 * Returns 0 on success, negative on failure
2433 **/
2434
2435 static int
2436 e1000_set_mac(struct net_device *netdev, void *p)
2437 {
2438 struct e1000_adapter *adapter = netdev_priv(netdev);
2439 struct sockaddr *addr = p;
2440
2441 if (!is_valid_ether_addr(addr->sa_data))
2442 return -EADDRNOTAVAIL;
2443
2444 /* 82542 2.0 needs to be in reset to write receive address registers */
2445
2446 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2447 e1000_enter_82542_rst(adapter);
2448
2449 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2450 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2451
2452 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2453
2454 /* With 82571 controllers, LAA may be overwritten (with the default)
2455 * due to controller reset from the other port. */
2456 if (adapter->hw.mac_type == e1000_82571) {
2457 /* activate the work around */
2458 adapter->hw.laa_is_present = 1;
2459
2460 /* Hold a copy of the LAA in RAR[14] This is done so that
2461 * between the time RAR[0] gets clobbered and the time it
2462 * gets fixed (in e1000_watchdog), the actual LAA is in one
2463 * of the RARs and no incoming packets directed to this port
2464 * are dropped. Eventaully the LAA will be in RAR[0] and
2465 * RAR[14] */
2466 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2467 E1000_RAR_ENTRIES - 1);
2468 }
2469
2470 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2471 e1000_leave_82542_rst(adapter);
2472
2473 return 0;
2474 }
2475
2476 /**
2477 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
2478 * @netdev: network interface device structure
2479 *
2480 * The set_rx_mode entry point is called whenever the unicast or multicast
2481 * address lists or the network interface flags are updated. This routine is
2482 * responsible for configuring the hardware for proper unicast, multicast,
2483 * promiscuous mode, and all-multi behavior.
2484 **/
2485
2486 static void
2487 e1000_set_rx_mode(struct net_device *netdev)
2488 {
2489 struct e1000_adapter *adapter = netdev_priv(netdev);
2490 struct e1000_hw *hw = &adapter->hw;
2491 struct dev_addr_list *uc_ptr;
2492 struct dev_addr_list *mc_ptr;
2493 u32 rctl;
2494 u32 hash_value;
2495 int i, rar_entries = E1000_RAR_ENTRIES;
2496 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2497 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2498 E1000_NUM_MTA_REGISTERS;
2499
2500 if (adapter->hw.mac_type == e1000_ich8lan)
2501 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2502
2503 /* reserve RAR[14] for LAA over-write work-around */
2504 if (adapter->hw.mac_type == e1000_82571)
2505 rar_entries--;
2506
2507 /* Check for Promiscuous and All Multicast modes */
2508
2509 rctl = E1000_READ_REG(hw, RCTL);
2510
2511 if (netdev->flags & IFF_PROMISC) {
2512 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2513 } else if (netdev->flags & IFF_ALLMULTI) {
2514 rctl |= E1000_RCTL_MPE;
2515 } else {
2516 rctl &= ~E1000_RCTL_MPE;
2517 }
2518
2519 uc_ptr = NULL;
2520 if (netdev->uc_count > rar_entries - 1) {
2521 rctl |= E1000_RCTL_UPE;
2522 } else if (!(netdev->flags & IFF_PROMISC)) {
2523 rctl &= ~E1000_RCTL_UPE;
2524 uc_ptr = netdev->uc_list;
2525 }
2526
2527 E1000_WRITE_REG(hw, RCTL, rctl);
2528
2529 /* 82542 2.0 needs to be in reset to write receive address registers */
2530
2531 if (hw->mac_type == e1000_82542_rev2_0)
2532 e1000_enter_82542_rst(adapter);
2533
2534 /* load the first 14 addresses into the exact filters 1-14. Unicast
2535 * addresses take precedence to avoid disabling unicast filtering
2536 * when possible.
2537 *
2538 * RAR 0 is used for the station MAC adddress
2539 * if there are not 14 addresses, go ahead and clear the filters
2540 * -- with 82571 controllers only 0-13 entries are filled here
2541 */
2542 mc_ptr = netdev->mc_list;
2543
2544 for (i = 1; i < rar_entries; i++) {
2545 if (uc_ptr) {
2546 e1000_rar_set(hw, uc_ptr->da_addr, i);
2547 uc_ptr = uc_ptr->next;
2548 } else if (mc_ptr) {
2549 e1000_rar_set(hw, mc_ptr->da_addr, i);
2550 mc_ptr = mc_ptr->next;
2551 } else {
2552 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2553 E1000_WRITE_FLUSH(hw);
2554 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2555 E1000_WRITE_FLUSH(hw);
2556 }
2557 }
2558 WARN_ON(uc_ptr != NULL);
2559
2560 /* clear the old settings from the multicast hash table */
2561
2562 for (i = 0; i < mta_reg_count; i++) {
2563 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2564 E1000_WRITE_FLUSH(hw);
2565 }
2566
2567 /* load any remaining addresses into the hash table */
2568
2569 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2570 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
2571 e1000_mta_set(hw, hash_value);
2572 }
2573
2574 if (hw->mac_type == e1000_82542_rev2_0)
2575 e1000_leave_82542_rst(adapter);
2576 }
2577
2578 /* Need to wait a few seconds after link up to get diagnostic information from
2579 * the phy */
2580
2581 static void
2582 e1000_update_phy_info(unsigned long data)
2583 {
2584 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2585 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2586 }
2587
2588 /**
2589 * e1000_82547_tx_fifo_stall - Timer Call-back
2590 * @data: pointer to adapter cast into an unsigned long
2591 **/
2592
2593 static void
2594 e1000_82547_tx_fifo_stall(unsigned long data)
2595 {
2596 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2597 struct net_device *netdev = adapter->netdev;
2598 u32 tctl;
2599
2600 if (atomic_read(&adapter->tx_fifo_stall)) {
2601 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2602 E1000_READ_REG(&adapter->hw, TDH)) &&
2603 (E1000_READ_REG(&adapter->hw, TDFT) ==
2604 E1000_READ_REG(&adapter->hw, TDFH)) &&
2605 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2606 E1000_READ_REG(&adapter->hw, TDFHS))) {
2607 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2608 E1000_WRITE_REG(&adapter->hw, TCTL,
2609 tctl & ~E1000_TCTL_EN);
2610 E1000_WRITE_REG(&adapter->hw, TDFT,
2611 adapter->tx_head_addr);
2612 E1000_WRITE_REG(&adapter->hw, TDFH,
2613 adapter->tx_head_addr);
2614 E1000_WRITE_REG(&adapter->hw, TDFTS,
2615 adapter->tx_head_addr);
2616 E1000_WRITE_REG(&adapter->hw, TDFHS,
2617 adapter->tx_head_addr);
2618 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2619 E1000_WRITE_FLUSH(&adapter->hw);
2620
2621 adapter->tx_fifo_head = 0;
2622 atomic_set(&adapter->tx_fifo_stall, 0);
2623 netif_wake_queue(netdev);
2624 } else {
2625 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2626 }
2627 }
2628 }
2629
2630 /**
2631 * e1000_watchdog - Timer Call-back
2632 * @data: pointer to adapter cast into an unsigned long
2633 **/
2634 static void
2635 e1000_watchdog(unsigned long data)
2636 {
2637 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2638 struct net_device *netdev = adapter->netdev;
2639 struct e1000_tx_ring *txdr = adapter->tx_ring;
2640 u32 link, tctl;
2641 s32 ret_val;
2642
2643 ret_val = e1000_check_for_link(&adapter->hw);
2644 if ((ret_val == E1000_ERR_PHY) &&
2645 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2646 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2647 /* See e1000_kumeran_lock_loss_workaround() */
2648 DPRINTK(LINK, INFO,
2649 "Gigabit has been disabled, downgrading speed\n");
2650 }
2651
2652 if (adapter->hw.mac_type == e1000_82573) {
2653 e1000_enable_tx_pkt_filtering(&adapter->hw);
2654 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2655 e1000_update_mng_vlan(adapter);
2656 }
2657
2658 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2659 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2660 link = !adapter->hw.serdes_link_down;
2661 else
2662 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2663
2664 if (link) {
2665 if (!netif_carrier_ok(netdev)) {
2666 u32 ctrl;
2667 bool txb2b = true;
2668 e1000_get_speed_and_duplex(&adapter->hw,
2669 &adapter->link_speed,
2670 &adapter->link_duplex);
2671
2672 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2673 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2674 "Flow Control: %s\n",
2675 adapter->link_speed,
2676 adapter->link_duplex == FULL_DUPLEX ?
2677 "Full Duplex" : "Half Duplex",
2678 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2679 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2680 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2681 E1000_CTRL_TFCE) ? "TX" : "None" )));
2682
2683 /* tweak tx_queue_len according to speed/duplex
2684 * and adjust the timeout factor */
2685 netdev->tx_queue_len = adapter->tx_queue_len;
2686 adapter->tx_timeout_factor = 1;
2687 switch (adapter->link_speed) {
2688 case SPEED_10:
2689 txb2b = false;
2690 netdev->tx_queue_len = 10;
2691 adapter->tx_timeout_factor = 8;
2692 break;
2693 case SPEED_100:
2694 txb2b = false;
2695 netdev->tx_queue_len = 100;
2696 /* maybe add some timeout factor ? */
2697 break;
2698 }
2699
2700 if ((adapter->hw.mac_type == e1000_82571 ||
2701 adapter->hw.mac_type == e1000_82572) &&
2702 !txb2b) {
2703 u32 tarc0;
2704 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2705 tarc0 &= ~(1 << 21);
2706 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2707 }
2708
2709 /* disable TSO for pcie and 10/100 speeds, to avoid
2710 * some hardware issues */
2711 if (!adapter->tso_force &&
2712 adapter->hw.bus_type == e1000_bus_type_pci_express){
2713 switch (adapter->link_speed) {
2714 case SPEED_10:
2715 case SPEED_100:
2716 DPRINTK(PROBE,INFO,
2717 "10/100 speed: disabling TSO\n");
2718 netdev->features &= ~NETIF_F_TSO;
2719 netdev->features &= ~NETIF_F_TSO6;
2720 break;
2721 case SPEED_1000:
2722 netdev->features |= NETIF_F_TSO;
2723 netdev->features |= NETIF_F_TSO6;
2724 break;
2725 default:
2726 /* oops */
2727 break;
2728 }
2729 }
2730
2731 /* enable transmits in the hardware, need to do this
2732 * after setting TARC0 */
2733 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2734 tctl |= E1000_TCTL_EN;
2735 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2736
2737 netif_carrier_on(netdev);
2738 netif_wake_queue(netdev);
2739 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2740 adapter->smartspeed = 0;
2741 } else {
2742 /* make sure the receive unit is started */
2743 if (adapter->hw.rx_needs_kicking) {
2744 struct e1000_hw *hw = &adapter->hw;
2745 u32 rctl = E1000_READ_REG(hw, RCTL);
2746 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2747 }
2748 }
2749 } else {
2750 if (netif_carrier_ok(netdev)) {
2751 adapter->link_speed = 0;
2752 adapter->link_duplex = 0;
2753 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2754 netif_carrier_off(netdev);
2755 netif_stop_queue(netdev);
2756 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2757
2758 /* 80003ES2LAN workaround--
2759 * For packet buffer work-around on link down event;
2760 * disable receives in the ISR and
2761 * reset device here in the watchdog
2762 */
2763 if (adapter->hw.mac_type == e1000_80003es2lan)
2764 /* reset device */
2765 schedule_work(&adapter->reset_task);
2766 }
2767
2768 e1000_smartspeed(adapter);
2769 }
2770
2771 e1000_update_stats(adapter);
2772
2773 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2774 adapter->tpt_old = adapter->stats.tpt;
2775 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2776 adapter->colc_old = adapter->stats.colc;
2777
2778 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2779 adapter->gorcl_old = adapter->stats.gorcl;
2780 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2781 adapter->gotcl_old = adapter->stats.gotcl;
2782
2783 e1000_update_adaptive(&adapter->hw);
2784
2785 if (!netif_carrier_ok(netdev)) {
2786 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2787 /* We've lost link, so the controller stops DMA,
2788 * but we've got queued Tx work that's never going
2789 * to get done, so reset controller to flush Tx.
2790 * (Do the reset outside of interrupt context). */
2791 adapter->tx_timeout_count++;
2792 schedule_work(&adapter->reset_task);
2793 }
2794 }
2795
2796 /* Cause software interrupt to ensure rx ring is cleaned */
2797 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2798
2799 /* Force detection of hung controller every watchdog period */
2800 adapter->detect_tx_hung = true;
2801
2802 /* With 82571 controllers, LAA may be overwritten due to controller
2803 * reset from the other port. Set the appropriate LAA in RAR[0] */
2804 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2805 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2806
2807 /* Reset the timer */
2808 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2809 }
2810
2811 enum latency_range {
2812 lowest_latency = 0,
2813 low_latency = 1,
2814 bulk_latency = 2,
2815 latency_invalid = 255
2816 };
2817
2818 /**
2819 * e1000_update_itr - update the dynamic ITR value based on statistics
2820 * Stores a new ITR value based on packets and byte
2821 * counts during the last interrupt. The advantage of per interrupt
2822 * computation is faster updates and more accurate ITR for the current
2823 * traffic pattern. Constants in this function were computed
2824 * based on theoretical maximum wire speed and thresholds were set based
2825 * on testing data as well as attempting to minimize response time
2826 * while increasing bulk throughput.
2827 * this functionality is controlled by the InterruptThrottleRate module
2828 * parameter (see e1000_param.c)
2829 * @adapter: pointer to adapter
2830 * @itr_setting: current adapter->itr
2831 * @packets: the number of packets during this measurement interval
2832 * @bytes: the number of bytes during this measurement interval
2833 **/
2834 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2835 u16 itr_setting,
2836 int packets,
2837 int bytes)
2838 {
2839 unsigned int retval = itr_setting;
2840 struct e1000_hw *hw = &adapter->hw;
2841
2842 if (unlikely(hw->mac_type < e1000_82540))
2843 goto update_itr_done;
2844
2845 if (packets == 0)
2846 goto update_itr_done;
2847
2848 switch (itr_setting) {
2849 case lowest_latency:
2850 /* jumbo frames get bulk treatment*/
2851 if (bytes/packets > 8000)
2852 retval = bulk_latency;
2853 else if ((packets < 5) && (bytes > 512))
2854 retval = low_latency;
2855 break;
2856 case low_latency: /* 50 usec aka 20000 ints/s */
2857 if (bytes > 10000) {
2858 /* jumbo frames need bulk latency setting */
2859 if (bytes/packets > 8000)
2860 retval = bulk_latency;
2861 else if ((packets < 10) || ((bytes/packets) > 1200))
2862 retval = bulk_latency;
2863 else if ((packets > 35))
2864 retval = lowest_latency;
2865 } else if (bytes/packets > 2000)
2866 retval = bulk_latency;
2867 else if (packets <= 2 && bytes < 512)
2868 retval = lowest_latency;
2869 break;
2870 case bulk_latency: /* 250 usec aka 4000 ints/s */
2871 if (bytes > 25000) {
2872 if (packets > 35)
2873 retval = low_latency;
2874 } else if (bytes < 6000) {
2875 retval = low_latency;
2876 }
2877 break;
2878 }
2879
2880 update_itr_done:
2881 return retval;
2882 }
2883
2884 static void e1000_set_itr(struct e1000_adapter *adapter)
2885 {
2886 struct e1000_hw *hw = &adapter->hw;
2887 u16 current_itr;
2888 u32 new_itr = adapter->itr;
2889
2890 if (unlikely(hw->mac_type < e1000_82540))
2891 return;
2892
2893 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2894 if (unlikely(adapter->link_speed != SPEED_1000)) {
2895 current_itr = 0;
2896 new_itr = 4000;
2897 goto set_itr_now;
2898 }
2899
2900 adapter->tx_itr = e1000_update_itr(adapter,
2901 adapter->tx_itr,
2902 adapter->total_tx_packets,
2903 adapter->total_tx_bytes);
2904 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2905 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2906 adapter->tx_itr = low_latency;
2907
2908 adapter->rx_itr = e1000_update_itr(adapter,
2909 adapter->rx_itr,
2910 adapter->total_rx_packets,
2911 adapter->total_rx_bytes);
2912 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2913 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2914 adapter->rx_itr = low_latency;
2915
2916 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2917
2918 switch (current_itr) {
2919 /* counts and packets in update_itr are dependent on these numbers */
2920 case lowest_latency:
2921 new_itr = 70000;
2922 break;
2923 case low_latency:
2924 new_itr = 20000; /* aka hwitr = ~200 */
2925 break;
2926 case bulk_latency:
2927 new_itr = 4000;
2928 break;
2929 default:
2930 break;
2931 }
2932
2933 set_itr_now:
2934 if (new_itr != adapter->itr) {
2935 /* this attempts to bias the interrupt rate towards Bulk
2936 * by adding intermediate steps when interrupt rate is
2937 * increasing */
2938 new_itr = new_itr > adapter->itr ?
2939 min(adapter->itr + (new_itr >> 2), new_itr) :
2940 new_itr;
2941 adapter->itr = new_itr;
2942 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2943 }
2944
2945 return;
2946 }
2947
2948 #define E1000_TX_FLAGS_CSUM 0x00000001
2949 #define E1000_TX_FLAGS_VLAN 0x00000002
2950 #define E1000_TX_FLAGS_TSO 0x00000004
2951 #define E1000_TX_FLAGS_IPV4 0x00000008
2952 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2953 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2954
2955 static int
2956 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2957 struct sk_buff *skb)
2958 {
2959 struct e1000_context_desc *context_desc;
2960 struct e1000_buffer *buffer_info;
2961 unsigned int i;
2962 u32 cmd_length = 0;
2963 u16 ipcse = 0, tucse, mss;
2964 u8 ipcss, ipcso, tucss, tucso, hdr_len;
2965 int err;
2966
2967 if (skb_is_gso(skb)) {
2968 if (skb_header_cloned(skb)) {
2969 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2970 if (err)
2971 return err;
2972 }
2973
2974 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2975 mss = skb_shinfo(skb)->gso_size;
2976 if (skb->protocol == htons(ETH_P_IP)) {
2977 struct iphdr *iph = ip_hdr(skb);
2978 iph->tot_len = 0;
2979 iph->check = 0;
2980 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2981 iph->daddr, 0,
2982 IPPROTO_TCP,
2983 0);
2984 cmd_length = E1000_TXD_CMD_IP;
2985 ipcse = skb_transport_offset(skb) - 1;
2986 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2987 ipv6_hdr(skb)->payload_len = 0;
2988 tcp_hdr(skb)->check =
2989 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2990 &ipv6_hdr(skb)->daddr,
2991 0, IPPROTO_TCP, 0);
2992 ipcse = 0;
2993 }
2994 ipcss = skb_network_offset(skb);
2995 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2996 tucss = skb_transport_offset(skb);
2997 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2998 tucse = 0;
2999
3000 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3001 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3002
3003 i = tx_ring->next_to_use;
3004 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3005 buffer_info = &tx_ring->buffer_info[i];
3006
3007 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3008 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3009 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3010 context_desc->upper_setup.tcp_fields.tucss = tucss;
3011 context_desc->upper_setup.tcp_fields.tucso = tucso;
3012 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3013 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3014 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3015 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3016
3017 buffer_info->time_stamp = jiffies;
3018 buffer_info->next_to_watch = i;
3019
3020 if (++i == tx_ring->count) i = 0;
3021 tx_ring->next_to_use = i;
3022
3023 return true;
3024 }
3025 return false;
3026 }
3027
3028 static bool
3029 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3030 struct sk_buff *skb)
3031 {
3032 struct e1000_context_desc *context_desc;
3033 struct e1000_buffer *buffer_info;
3034 unsigned int i;
3035 u8 css;
3036
3037 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
3038 css = skb_transport_offset(skb);
3039
3040 i = tx_ring->next_to_use;
3041 buffer_info = &tx_ring->buffer_info[i];
3042 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3043
3044 context_desc->lower_setup.ip_config = 0;
3045 context_desc->upper_setup.tcp_fields.tucss = css;
3046 context_desc->upper_setup.tcp_fields.tucso =
3047 css + skb->csum_offset;
3048 context_desc->upper_setup.tcp_fields.tucse = 0;
3049 context_desc->tcp_seg_setup.data = 0;
3050 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
3051
3052 buffer_info->time_stamp = jiffies;
3053 buffer_info->next_to_watch = i;
3054
3055 if (unlikely(++i == tx_ring->count)) i = 0;
3056 tx_ring->next_to_use = i;
3057
3058 return true;
3059 }
3060
3061 return false;
3062 }
3063
3064 #define E1000_MAX_TXD_PWR 12
3065 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
3066
3067 static int
3068 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3069 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
3070 unsigned int nr_frags, unsigned int mss)
3071 {
3072 struct e1000_buffer *buffer_info;
3073 unsigned int len = skb->len;
3074 unsigned int offset = 0, size, count = 0, i;
3075 unsigned int f;
3076 len -= skb->data_len;
3077
3078 i = tx_ring->next_to_use;
3079
3080 while (len) {
3081 buffer_info = &tx_ring->buffer_info[i];
3082 size = min(len, max_per_txd);
3083 /* Workaround for Controller erratum --
3084 * descriptor for non-tso packet in a linear SKB that follows a
3085 * tso gets written back prematurely before the data is fully
3086 * DMA'd to the controller */
3087 if (!skb->data_len && tx_ring->last_tx_tso &&
3088 !skb_is_gso(skb)) {
3089 tx_ring->last_tx_tso = 0;
3090 size -= 4;
3091 }
3092
3093 /* Workaround for premature desc write-backs
3094 * in TSO mode. Append 4-byte sentinel desc */
3095 if (unlikely(mss && !nr_frags && size == len && size > 8))
3096 size -= 4;
3097 /* work-around for errata 10 and it applies
3098 * to all controllers in PCI-X mode
3099 * The fix is to make sure that the first descriptor of a
3100 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3101 */
3102 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3103 (size > 2015) && count == 0))
3104 size = 2015;
3105
3106 /* Workaround for potential 82544 hang in PCI-X. Avoid
3107 * terminating buffers within evenly-aligned dwords. */
3108 if (unlikely(adapter->pcix_82544 &&
3109 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3110 size > 4))
3111 size -= 4;
3112
3113 buffer_info->length = size;
3114 buffer_info->dma =
3115 pci_map_single(adapter->pdev,
3116 skb->data + offset,
3117 size,
3118 PCI_DMA_TODEVICE);
3119 buffer_info->time_stamp = jiffies;
3120 buffer_info->next_to_watch = i;
3121
3122 len -= size;
3123 offset += size;
3124 count++;
3125 if (unlikely(++i == tx_ring->count)) i = 0;
3126 }
3127
3128 for (f = 0; f < nr_frags; f++) {
3129 struct skb_frag_struct *frag;
3130
3131 frag = &skb_shinfo(skb)->frags[f];
3132 len = frag->size;
3133 offset = frag->page_offset;
3134
3135 while (len) {
3136 buffer_info = &tx_ring->buffer_info[i];
3137 size = min(len, max_per_txd);
3138 /* Workaround for premature desc write-backs
3139 * in TSO mode. Append 4-byte sentinel desc */
3140 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3141 size -= 4;
3142 /* Workaround for potential 82544 hang in PCI-X.
3143 * Avoid terminating buffers within evenly-aligned
3144 * dwords. */
3145 if (unlikely(adapter->pcix_82544 &&
3146 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3147 size > 4))
3148 size -= 4;
3149
3150 buffer_info->length = size;
3151 buffer_info->dma =
3152 pci_map_page(adapter->pdev,
3153 frag->page,
3154 offset,
3155 size,
3156 PCI_DMA_TODEVICE);
3157 buffer_info->time_stamp = jiffies;
3158 buffer_info->next_to_watch = i;
3159
3160 len -= size;
3161 offset += size;
3162 count++;
3163 if (unlikely(++i == tx_ring->count)) i = 0;
3164 }
3165 }
3166
3167 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3168 tx_ring->buffer_info[i].skb = skb;
3169 tx_ring->buffer_info[first].next_to_watch = i;
3170
3171 return count;
3172 }
3173
3174 static void
3175 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3176 int tx_flags, int count)
3177 {
3178 struct e1000_tx_desc *tx_desc = NULL;
3179 struct e1000_buffer *buffer_info;
3180 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3181 unsigned int i;
3182
3183 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3184 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3185 E1000_TXD_CMD_TSE;
3186 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3187
3188 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3189 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3190 }
3191
3192 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3193 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3194 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3195 }
3196
3197 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3198 txd_lower |= E1000_TXD_CMD_VLE;
3199 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3200 }
3201
3202 i = tx_ring->next_to_use;
3203
3204 while (count--) {
3205 buffer_info = &tx_ring->buffer_info[i];
3206 tx_desc = E1000_TX_DESC(*tx_ring, i);
3207 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3208 tx_desc->lower.data =
3209 cpu_to_le32(txd_lower | buffer_info->length);
3210 tx_desc->upper.data = cpu_to_le32(txd_upper);
3211 if (unlikely(++i == tx_ring->count)) i = 0;
3212 }
3213
3214 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3215
3216 /* Force memory writes to complete before letting h/w
3217 * know there are new descriptors to fetch. (Only
3218 * applicable for weak-ordered memory model archs,
3219 * such as IA-64). */
3220 wmb();
3221
3222 tx_ring->next_to_use = i;
3223 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3224 /* we need this if more than one processor can write to our tail
3225 * at a time, it syncronizes IO on IA64/Altix systems */
3226 mmiowb();
3227 }
3228
3229 /**
3230 * 82547 workaround to avoid controller hang in half-duplex environment.
3231 * The workaround is to avoid queuing a large packet that would span
3232 * the internal Tx FIFO ring boundary by notifying the stack to resend
3233 * the packet at a later time. This gives the Tx FIFO an opportunity to
3234 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3235 * to the beginning of the Tx FIFO.
3236 **/
3237
3238 #define E1000_FIFO_HDR 0x10
3239 #define E1000_82547_PAD_LEN 0x3E0
3240
3241 static int
3242 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3243 {
3244 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3245 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
3246
3247 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3248
3249 if (adapter->link_duplex != HALF_DUPLEX)
3250 goto no_fifo_stall_required;
3251
3252 if (atomic_read(&adapter->tx_fifo_stall))
3253 return 1;
3254
3255 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3256 atomic_set(&adapter->tx_fifo_stall, 1);
3257 return 1;
3258 }
3259
3260 no_fifo_stall_required:
3261 adapter->tx_fifo_head += skb_fifo_len;
3262 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3263 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3264 return 0;
3265 }
3266
3267 #define MINIMUM_DHCP_PACKET_SIZE 282
3268 static int
3269 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3270 {
3271 struct e1000_hw *hw = &adapter->hw;
3272 u16 length, offset;
3273 if (vlan_tx_tag_present(skb)) {
3274 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3275 ( adapter->hw.mng_cookie.status &
3276 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3277 return 0;
3278 }
3279 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3280 struct ethhdr *eth = (struct ethhdr *) skb->data;
3281 if ((htons(ETH_P_IP) == eth->h_proto)) {
3282 const struct iphdr *ip =
3283 (struct iphdr *)((u8 *)skb->data+14);
3284 if (IPPROTO_UDP == ip->protocol) {
3285 struct udphdr *udp =
3286 (struct udphdr *)((u8 *)ip +
3287 (ip->ihl << 2));
3288 if (ntohs(udp->dest) == 67) {
3289 offset = (u8 *)udp + 8 - skb->data;
3290 length = skb->len - offset;
3291
3292 return e1000_mng_write_dhcp_info(hw,
3293 (u8 *)udp + 8,
3294 length);
3295 }
3296 }
3297 }
3298 }
3299 return 0;
3300 }
3301
3302 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3303 {
3304 struct e1000_adapter *adapter = netdev_priv(netdev);
3305 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3306
3307 netif_stop_queue(netdev);
3308 /* Herbert's original patch had:
3309 * smp_mb__after_netif_stop_queue();
3310 * but since that doesn't exist yet, just open code it. */
3311 smp_mb();
3312
3313 /* We need to check again in a case another CPU has just
3314 * made room available. */
3315 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3316 return -EBUSY;
3317
3318 /* A reprieve! */
3319 netif_start_queue(netdev);
3320 ++adapter->restart_queue;
3321 return 0;
3322 }
3323
3324 static int e1000_maybe_stop_tx(struct net_device *netdev,
3325 struct e1000_tx_ring *tx_ring, int size)
3326 {
3327 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3328 return 0;
3329 return __e1000_maybe_stop_tx(netdev, size);
3330 }
3331
3332 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3333 static int
3334 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3335 {
3336 struct e1000_adapter *adapter = netdev_priv(netdev);
3337 struct e1000_tx_ring *tx_ring;
3338 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3339 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3340 unsigned int tx_flags = 0;
3341 unsigned int len = skb->len - skb->data_len;
3342 unsigned long flags;
3343 unsigned int nr_frags;
3344 unsigned int mss;
3345 int count = 0;
3346 int tso;
3347 unsigned int f;
3348
3349 /* This goes back to the question of how to logically map a tx queue
3350 * to a flow. Right now, performance is impacted slightly negatively
3351 * if using multiple tx queues. If the stack breaks away from a
3352 * single qdisc implementation, we can look at this again. */
3353 tx_ring = adapter->tx_ring;
3354
3355 if (unlikely(skb->len <= 0)) {
3356 dev_kfree_skb_any(skb);
3357 return NETDEV_TX_OK;
3358 }
3359
3360 /* 82571 and newer doesn't need the workaround that limited descriptor
3361 * length to 4kB */
3362 if (adapter->hw.mac_type >= e1000_82571)
3363 max_per_txd = 8192;
3364
3365 mss = skb_shinfo(skb)->gso_size;
3366 /* The controller does a simple calculation to
3367 * make sure there is enough room in the FIFO before
3368 * initiating the DMA for each buffer. The calc is:
3369 * 4 = ceil(buffer len/mss). To make sure we don't
3370 * overrun the FIFO, adjust the max buffer len if mss
3371 * drops. */
3372 if (mss) {
3373 u8 hdr_len;
3374 max_per_txd = min(mss << 2, max_per_txd);
3375 max_txd_pwr = fls(max_per_txd) - 1;
3376
3377 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3378 * points to just header, pull a few bytes of payload from
3379 * frags into skb->data */
3380 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3381 if (skb->data_len && hdr_len == len) {
3382 switch (adapter->hw.mac_type) {
3383 unsigned int pull_size;
3384 case e1000_82544:
3385 /* Make sure we have room to chop off 4 bytes,
3386 * and that the end alignment will work out to
3387 * this hardware's requirements
3388 * NOTE: this is a TSO only workaround
3389 * if end byte alignment not correct move us
3390 * into the next dword */
3391 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3392 break;
3393 /* fall through */
3394 case e1000_82571:
3395 case e1000_82572:
3396 case e1000_82573:
3397 case e1000_ich8lan:
3398 pull_size = min((unsigned int)4, skb->data_len);
3399 if (!__pskb_pull_tail(skb, pull_size)) {
3400 DPRINTK(DRV, ERR,
3401 "__pskb_pull_tail failed.\n");
3402 dev_kfree_skb_any(skb);
3403 return NETDEV_TX_OK;
3404 }
3405 len = skb->len - skb->data_len;
3406 break;
3407 default:
3408 /* do nothing */
3409 break;
3410 }
3411 }
3412 }
3413
3414 /* reserve a descriptor for the offload context */
3415 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3416 count++;
3417 count++;
3418
3419 /* Controller Erratum workaround */
3420 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3421 count++;
3422
3423 count += TXD_USE_COUNT(len, max_txd_pwr);
3424
3425 if (adapter->pcix_82544)
3426 count++;
3427
3428 /* work-around for errata 10 and it applies to all controllers
3429 * in PCI-X mode, so add one more descriptor to the count
3430 */
3431 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3432 (len > 2015)))
3433 count++;
3434
3435 nr_frags = skb_shinfo(skb)->nr_frags;
3436 for (f = 0; f < nr_frags; f++)
3437 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3438 max_txd_pwr);
3439 if (adapter->pcix_82544)
3440 count += nr_frags;
3441
3442
3443 if (adapter->hw.tx_pkt_filtering &&
3444 (adapter->hw.mac_type == e1000_82573))
3445 e1000_transfer_dhcp_info(adapter, skb);
3446
3447 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
3448 /* Collision - tell upper layer to requeue */
3449 return NETDEV_TX_LOCKED;
3450
3451 /* need: count + 2 desc gap to keep tail from touching
3452 * head, otherwise try next time */
3453 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3454 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3455 return NETDEV_TX_BUSY;
3456 }
3457
3458 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3459 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3460 netif_stop_queue(netdev);
3461 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3462 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3463 return NETDEV_TX_BUSY;
3464 }
3465 }
3466
3467 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3468 tx_flags |= E1000_TX_FLAGS_VLAN;
3469 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3470 }
3471
3472 first = tx_ring->next_to_use;
3473
3474 tso = e1000_tso(adapter, tx_ring, skb);
3475 if (tso < 0) {
3476 dev_kfree_skb_any(skb);
3477 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3478 return NETDEV_TX_OK;
3479 }
3480
3481 if (likely(tso)) {
3482 tx_ring->last_tx_tso = 1;
3483 tx_flags |= E1000_TX_FLAGS_TSO;
3484 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3485 tx_flags |= E1000_TX_FLAGS_CSUM;
3486
3487 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3488 * 82571 hardware supports TSO capabilities for IPv6 as well...
3489 * no longer assume, we must. */
3490 if (likely(skb->protocol == htons(ETH_P_IP)))
3491 tx_flags |= E1000_TX_FLAGS_IPV4;
3492
3493 e1000_tx_queue(adapter, tx_ring, tx_flags,
3494 e1000_tx_map(adapter, tx_ring, skb, first,
3495 max_per_txd, nr_frags, mss));
3496
3497 netdev->trans_start = jiffies;
3498
3499 /* Make sure there is space in the ring for the next send. */
3500 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3501
3502 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3503 return NETDEV_TX_OK;
3504 }
3505
3506 /**
3507 * e1000_tx_timeout - Respond to a Tx Hang
3508 * @netdev: network interface device structure
3509 **/
3510
3511 static void
3512 e1000_tx_timeout(struct net_device *netdev)
3513 {
3514 struct e1000_adapter *adapter = netdev_priv(netdev);
3515
3516 /* Do the reset outside of interrupt context */
3517 adapter->tx_timeout_count++;
3518 schedule_work(&adapter->reset_task);
3519 }
3520
3521 static void
3522 e1000_reset_task(struct work_struct *work)
3523 {
3524 struct e1000_adapter *adapter =
3525 container_of(work, struct e1000_adapter, reset_task);
3526
3527 e1000_reinit_locked(adapter);
3528 }
3529
3530 /**
3531 * e1000_get_stats - Get System Network Statistics
3532 * @netdev: network interface device structure
3533 *
3534 * Returns the address of the device statistics structure.
3535 * The statistics are actually updated from the timer callback.
3536 **/
3537
3538 static struct net_device_stats *
3539 e1000_get_stats(struct net_device *netdev)
3540 {
3541 struct e1000_adapter *adapter = netdev_priv(netdev);
3542
3543 /* only return the current stats */
3544 return &adapter->net_stats;
3545 }
3546
3547 /**
3548 * e1000_change_mtu - Change the Maximum Transfer Unit
3549 * @netdev: network interface device structure
3550 * @new_mtu: new value for maximum frame size
3551 *
3552 * Returns 0 on success, negative on failure
3553 **/
3554
3555 static int
3556 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3557 {
3558 struct e1000_adapter *adapter = netdev_priv(netdev);
3559 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3560 u16 eeprom_data = 0;
3561
3562 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3563 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3564 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3565 return -EINVAL;
3566 }
3567
3568 /* Adapter-specific max frame size limits. */
3569 switch (adapter->hw.mac_type) {
3570 case e1000_undefined ... e1000_82542_rev2_1:
3571 case e1000_ich8lan:
3572 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3573 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3574 return -EINVAL;
3575 }
3576 break;
3577 case e1000_82573:
3578 /* Jumbo Frames not supported if:
3579 * - this is not an 82573L device
3580 * - ASPM is enabled in any way (0x1A bits 3:2) */
3581 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3582 &eeprom_data);
3583 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3584 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3585 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3586 DPRINTK(PROBE, ERR,
3587 "Jumbo Frames not supported.\n");
3588 return -EINVAL;
3589 }
3590 break;
3591 }
3592 /* ERT will be enabled later to enable wire speed receives */
3593
3594 /* fall through to get support */
3595 case e1000_82571:
3596 case e1000_82572:
3597 case e1000_80003es2lan:
3598 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3599 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3600 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3601 return -EINVAL;
3602 }
3603 break;
3604 default:
3605 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3606 break;
3607 }
3608
3609 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3610 * means we reserve 2 more, this pushes us to allocate from the next
3611 * larger slab size
3612 * i.e. RXBUFFER_2048 --> size-4096 slab */
3613
3614 if (max_frame <= E1000_RXBUFFER_256)
3615 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3616 else if (max_frame <= E1000_RXBUFFER_512)
3617 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3618 else if (max_frame <= E1000_RXBUFFER_1024)
3619 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3620 else if (max_frame <= E1000_RXBUFFER_2048)
3621 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3622 else if (max_frame <= E1000_RXBUFFER_4096)
3623 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3624 else if (max_frame <= E1000_RXBUFFER_8192)
3625 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3626 else if (max_frame <= E1000_RXBUFFER_16384)
3627 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3628
3629 /* adjust allocation if LPE protects us, and we aren't using SBP */
3630 if (!adapter->hw.tbi_compatibility_on &&
3631 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3632 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3633 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3634
3635 netdev->mtu = new_mtu;
3636 adapter->hw.max_frame_size = max_frame;
3637
3638 if (netif_running(netdev))
3639 e1000_reinit_locked(adapter);
3640
3641 return 0;
3642 }
3643
3644 /**
3645 * e1000_update_stats - Update the board statistics counters
3646 * @adapter: board private structure
3647 **/
3648
3649 void
3650 e1000_update_stats(struct e1000_adapter *adapter)
3651 {
3652 struct e1000_hw *hw = &adapter->hw;
3653 struct pci_dev *pdev = adapter->pdev;
3654 unsigned long flags;
3655 u16 phy_tmp;
3656
3657 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3658
3659 /*
3660 * Prevent stats update while adapter is being reset, or if the pci
3661 * connection is down.
3662 */
3663 if (adapter->link_speed == 0)
3664 return;
3665 if (pci_channel_offline(pdev))
3666 return;
3667
3668 spin_lock_irqsave(&adapter->stats_lock, flags);
3669
3670 /* these counters are modified from e1000_tbi_adjust_stats,
3671 * called from the interrupt context, so they must only
3672 * be written while holding adapter->stats_lock
3673 */
3674
3675 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3676 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3677 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3678 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3679 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3680 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3681 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3682
3683 if (adapter->hw.mac_type != e1000_ich8lan) {
3684 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3685 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3686 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3687 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3688 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3689 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3690 }
3691
3692 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3693 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3694 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3695 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3696 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3697 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3698 adapter->stats.dc += E1000_READ_REG(hw, DC);
3699 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3700 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3701 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3702 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3703 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3704 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3705 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3706 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3707 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3708 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3709 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3710 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3711 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3712 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3713 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3714 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3715 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3716 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3717 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3718
3719 if (adapter->hw.mac_type != e1000_ich8lan) {
3720 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3721 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3722 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3723 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3724 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3725 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3726 }
3727
3728 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3729 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3730
3731 /* used for adaptive IFS */
3732
3733 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3734 adapter->stats.tpt += hw->tx_packet_delta;
3735 hw->collision_delta = E1000_READ_REG(hw, COLC);
3736 adapter->stats.colc += hw->collision_delta;
3737
3738 if (hw->mac_type >= e1000_82543) {
3739 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3740 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3741 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3742 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3743 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3744 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3745 }
3746 if (hw->mac_type > e1000_82547_rev_2) {
3747 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3748 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3749
3750 if (adapter->hw.mac_type != e1000_ich8lan) {
3751 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3752 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3753 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3754 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3755 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3756 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3757 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3758 }
3759 }
3760
3761 /* Fill out the OS statistics structure */
3762 adapter->net_stats.multicast = adapter->stats.mprc;
3763 adapter->net_stats.collisions = adapter->stats.colc;
3764
3765 /* Rx Errors */
3766
3767 /* RLEC on some newer hardware can be incorrect so build
3768 * our own version based on RUC and ROC */
3769 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3770 adapter->stats.crcerrs + adapter->stats.algnerrc +
3771 adapter->stats.ruc + adapter->stats.roc +
3772 adapter->stats.cexterr;
3773 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3774 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3775 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3776 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3777 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3778
3779 /* Tx Errors */
3780 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3781 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3782 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3783 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3784 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3785 if (adapter->hw.bad_tx_carr_stats_fd &&
3786 adapter->link_duplex == FULL_DUPLEX) {
3787 adapter->net_stats.tx_carrier_errors = 0;
3788 adapter->stats.tncrs = 0;
3789 }
3790
3791 /* Tx Dropped needs to be maintained elsewhere */
3792
3793 /* Phy Stats */
3794 if (hw->media_type == e1000_media_type_copper) {
3795 if ((adapter->link_speed == SPEED_1000) &&
3796 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3797 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3798 adapter->phy_stats.idle_errors += phy_tmp;
3799 }
3800
3801 if ((hw->mac_type <= e1000_82546) &&
3802 (hw->phy_type == e1000_phy_m88) &&
3803 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3804 adapter->phy_stats.receive_errors += phy_tmp;
3805 }
3806
3807 /* Management Stats */
3808 if (adapter->hw.has_smbus) {
3809 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3810 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3811 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3812 }
3813
3814 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3815 }
3816
3817 /**
3818 * e1000_intr_msi - Interrupt Handler
3819 * @irq: interrupt number
3820 * @data: pointer to a network interface device structure
3821 **/
3822
3823 static irqreturn_t
3824 e1000_intr_msi(int irq, void *data)
3825 {
3826 struct net_device *netdev = data;
3827 struct e1000_adapter *adapter = netdev_priv(netdev);
3828 struct e1000_hw *hw = &adapter->hw;
3829 #ifndef CONFIG_E1000_NAPI
3830 int i;
3831 #endif
3832 u32 icr = E1000_READ_REG(hw, ICR);
3833
3834 /* in NAPI mode read ICR disables interrupts using IAM */
3835
3836 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3837 hw->get_link_status = 1;
3838 /* 80003ES2LAN workaround-- For packet buffer work-around on
3839 * link down event; disable receives here in the ISR and reset
3840 * adapter in watchdog */
3841 if (netif_carrier_ok(netdev) &&
3842 (adapter->hw.mac_type == e1000_80003es2lan)) {
3843 /* disable receives */
3844 u32 rctl = E1000_READ_REG(hw, RCTL);
3845 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3846 }
3847 /* guard against interrupt when we're going down */
3848 if (!test_bit(__E1000_DOWN, &adapter->flags))
3849 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3850 }
3851
3852 #ifdef CONFIG_E1000_NAPI
3853 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
3854 adapter->total_tx_bytes = 0;
3855 adapter->total_tx_packets = 0;
3856 adapter->total_rx_bytes = 0;
3857 adapter->total_rx_packets = 0;
3858 __netif_rx_schedule(netdev, &adapter->napi);
3859 } else
3860 e1000_irq_enable(adapter);
3861 #else
3862 adapter->total_tx_bytes = 0;
3863 adapter->total_rx_bytes = 0;
3864 adapter->total_tx_packets = 0;
3865 adapter->total_rx_packets = 0;
3866
3867 for (i = 0; i < E1000_MAX_INTR; i++)
3868 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3869 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3870 break;
3871
3872 if (likely(adapter->itr_setting & 3))
3873 e1000_set_itr(adapter);
3874 #endif
3875
3876 return IRQ_HANDLED;
3877 }
3878
3879 /**
3880 * e1000_intr - Interrupt Handler
3881 * @irq: interrupt number
3882 * @data: pointer to a network interface device structure
3883 **/
3884
3885 static irqreturn_t
3886 e1000_intr(int irq, void *data)
3887 {
3888 struct net_device *netdev = data;
3889 struct e1000_adapter *adapter = netdev_priv(netdev);
3890 struct e1000_hw *hw = &adapter->hw;
3891 u32 rctl, icr = E1000_READ_REG(hw, ICR);
3892 #ifndef CONFIG_E1000_NAPI
3893 int i;
3894 #endif
3895 if (unlikely(!icr))
3896 return IRQ_NONE; /* Not our interrupt */
3897
3898 #ifdef CONFIG_E1000_NAPI
3899 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3900 * not set, then the adapter didn't send an interrupt */
3901 if (unlikely(hw->mac_type >= e1000_82571 &&
3902 !(icr & E1000_ICR_INT_ASSERTED)))
3903 return IRQ_NONE;
3904
3905 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3906 * need for the IMC write */
3907 #endif
3908
3909 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3910 hw->get_link_status = 1;
3911 /* 80003ES2LAN workaround--
3912 * For packet buffer work-around on link down event;
3913 * disable receives here in the ISR and
3914 * reset adapter in watchdog
3915 */
3916 if (netif_carrier_ok(netdev) &&
3917 (adapter->hw.mac_type == e1000_80003es2lan)) {
3918 /* disable receives */
3919 rctl = E1000_READ_REG(hw, RCTL);
3920 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3921 }
3922 /* guard against interrupt when we're going down */
3923 if (!test_bit(__E1000_DOWN, &adapter->flags))
3924 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3925 }
3926
3927 #ifdef CONFIG_E1000_NAPI
3928 if (unlikely(hw->mac_type < e1000_82571)) {
3929 /* disable interrupts, without the synchronize_irq bit */
3930 E1000_WRITE_REG(hw, IMC, ~0);
3931 E1000_WRITE_FLUSH(hw);
3932 }
3933 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
3934 adapter->total_tx_bytes = 0;
3935 adapter->total_tx_packets = 0;
3936 adapter->total_rx_bytes = 0;
3937 adapter->total_rx_packets = 0;
3938 __netif_rx_schedule(netdev, &adapter->napi);
3939 } else
3940 /* this really should not happen! if it does it is basically a
3941 * bug, but not a hard error, so enable ints and continue */
3942 e1000_irq_enable(adapter);
3943 #else
3944 /* Writing IMC and IMS is needed for 82547.
3945 * Due to Hub Link bus being occupied, an interrupt
3946 * de-assertion message is not able to be sent.
3947 * When an interrupt assertion message is generated later,
3948 * two messages are re-ordered and sent out.
3949 * That causes APIC to think 82547 is in de-assertion
3950 * state, while 82547 is in assertion state, resulting
3951 * in dead lock. Writing IMC forces 82547 into
3952 * de-assertion state.
3953 */
3954 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3955 E1000_WRITE_REG(hw, IMC, ~0);
3956
3957 adapter->total_tx_bytes = 0;
3958 adapter->total_rx_bytes = 0;
3959 adapter->total_tx_packets = 0;
3960 adapter->total_rx_packets = 0;
3961
3962 for (i = 0; i < E1000_MAX_INTR; i++)
3963 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3964 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3965 break;
3966
3967 if (likely(adapter->itr_setting & 3))
3968 e1000_set_itr(adapter);
3969
3970 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3971 e1000_irq_enable(adapter);
3972
3973 #endif
3974 return IRQ_HANDLED;
3975 }
3976
3977 #ifdef CONFIG_E1000_NAPI
3978 /**
3979 * e1000_clean - NAPI Rx polling callback
3980 * @adapter: board private structure
3981 **/
3982
3983 static int
3984 e1000_clean(struct napi_struct *napi, int budget)
3985 {
3986 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3987 struct net_device *poll_dev = adapter->netdev;
3988 int tx_cleaned = 0, work_done = 0;
3989
3990 /* Must NOT use netdev_priv macro here. */
3991 adapter = poll_dev->priv;
3992
3993 /* e1000_clean is called per-cpu. This lock protects
3994 * tx_ring[0] from being cleaned by multiple cpus
3995 * simultaneously. A failure obtaining the lock means
3996 * tx_ring[0] is currently being cleaned anyway. */
3997 if (spin_trylock(&adapter->tx_queue_lock)) {
3998 tx_cleaned = e1000_clean_tx_irq(adapter,
3999 &adapter->tx_ring[0]);
4000 spin_unlock(&adapter->tx_queue_lock);
4001 }
4002
4003 adapter->clean_rx(adapter, &adapter->rx_ring[0],
4004 &work_done, budget);
4005
4006 if (tx_cleaned)
4007 work_done = budget;
4008
4009 /* If budget not fully consumed, exit the polling mode */
4010 if (work_done < budget) {
4011 if (likely(adapter->itr_setting & 3))
4012 e1000_set_itr(adapter);
4013 netif_rx_complete(poll_dev, napi);
4014 e1000_irq_enable(adapter);
4015 }
4016
4017 return work_done;
4018 }
4019
4020 #endif
4021 /**
4022 * e1000_clean_tx_irq - Reclaim resources after transmit completes
4023 * @adapter: board private structure
4024 **/
4025
4026 static bool
4027 e1000_clean_tx_irq(struct e1000_adapter *adapter,
4028 struct e1000_tx_ring *tx_ring)
4029 {
4030 struct net_device *netdev = adapter->netdev;
4031 struct e1000_tx_desc *tx_desc, *eop_desc;
4032 struct e1000_buffer *buffer_info;
4033 unsigned int i, eop;
4034 #ifdef CONFIG_E1000_NAPI
4035 unsigned int count = 0;
4036 #endif
4037 bool cleaned = false;
4038 unsigned int total_tx_bytes=0, total_tx_packets=0;
4039
4040 i = tx_ring->next_to_clean;
4041 eop = tx_ring->buffer_info[i].next_to_watch;
4042 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4043
4044 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
4045 for (cleaned = false; !cleaned; ) {
4046 tx_desc = E1000_TX_DESC(*tx_ring, i);
4047 buffer_info = &tx_ring->buffer_info[i];
4048 cleaned = (i == eop);
4049
4050 if (cleaned) {
4051 struct sk_buff *skb = buffer_info->skb;
4052 unsigned int segs, bytecount;
4053 segs = skb_shinfo(skb)->gso_segs ?: 1;
4054 /* multiply data chunks by size of headers */
4055 bytecount = ((segs - 1) * skb_headlen(skb)) +
4056 skb->len;
4057 total_tx_packets += segs;
4058 total_tx_bytes += bytecount;
4059 }
4060 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
4061 tx_desc->upper.data = 0;
4062
4063 if (unlikely(++i == tx_ring->count)) i = 0;
4064 }
4065
4066 eop = tx_ring->buffer_info[i].next_to_watch;
4067 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4068 #ifdef CONFIG_E1000_NAPI
4069 #define E1000_TX_WEIGHT 64
4070 /* weight of a sort for tx, to avoid endless transmit cleanup */
4071 if (count++ == E1000_TX_WEIGHT) break;
4072 #endif
4073 }
4074
4075 tx_ring->next_to_clean = i;
4076
4077 #define TX_WAKE_THRESHOLD 32
4078 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4079 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4080 /* Make sure that anybody stopping the queue after this
4081 * sees the new next_to_clean.
4082 */
4083 smp_mb();
4084 if (netif_queue_stopped(netdev)) {
4085 netif_wake_queue(netdev);
4086 ++adapter->restart_queue;
4087 }
4088 }
4089
4090 if (adapter->detect_tx_hung) {
4091 /* Detect a transmit hang in hardware, this serializes the
4092 * check with the clearing of time_stamp and movement of i */
4093 adapter->detect_tx_hung = false;
4094 if (tx_ring->buffer_info[eop].dma &&
4095 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4096 (adapter->tx_timeout_factor * HZ))
4097 && !(E1000_READ_REG(&adapter->hw, STATUS) &
4098 E1000_STATUS_TXOFF)) {
4099
4100 /* detected Tx unit hang */
4101 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4102 " Tx Queue <%lu>\n"
4103 " TDH <%x>\n"
4104 " TDT <%x>\n"
4105 " next_to_use <%x>\n"
4106 " next_to_clean <%x>\n"
4107 "buffer_info[next_to_clean]\n"
4108 " time_stamp <%lx>\n"
4109 " next_to_watch <%x>\n"
4110 " jiffies <%lx>\n"
4111 " next_to_watch.status <%x>\n",
4112 (unsigned long)((tx_ring - adapter->tx_ring) /
4113 sizeof(struct e1000_tx_ring)),
4114 readl(adapter->hw.hw_addr + tx_ring->tdh),
4115 readl(adapter->hw.hw_addr + tx_ring->tdt),
4116 tx_ring->next_to_use,
4117 tx_ring->next_to_clean,
4118 tx_ring->buffer_info[eop].time_stamp,
4119 eop,
4120 jiffies,
4121 eop_desc->upper.fields.status);
4122 netif_stop_queue(netdev);
4123 }
4124 }
4125 adapter->total_tx_bytes += total_tx_bytes;
4126 adapter->total_tx_packets += total_tx_packets;
4127 adapter->net_stats.tx_bytes += total_tx_bytes;
4128 adapter->net_stats.tx_packets += total_tx_packets;
4129 return cleaned;
4130 }
4131
4132 /**
4133 * e1000_rx_checksum - Receive Checksum Offload for 82543
4134 * @adapter: board private structure
4135 * @status_err: receive descriptor status and error fields
4136 * @csum: receive descriptor csum field
4137 * @sk_buff: socket buffer with received data
4138 **/
4139
4140 static void
4141 e1000_rx_checksum(struct e1000_adapter *adapter,
4142 u32 status_err, u32 csum,
4143 struct sk_buff *skb)
4144 {
4145 u16 status = (u16)status_err;
4146 u8 errors = (u8)(status_err >> 24);
4147 skb->ip_summed = CHECKSUM_NONE;
4148
4149 /* 82543 or newer only */
4150 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4151 /* Ignore Checksum bit is set */
4152 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4153 /* TCP/UDP checksum error bit is set */
4154 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4155 /* let the stack verify checksum errors */
4156 adapter->hw_csum_err++;
4157 return;
4158 }
4159 /* TCP/UDP Checksum has not been calculated */
4160 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4161 if (!(status & E1000_RXD_STAT_TCPCS))
4162 return;
4163 } else {
4164 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4165 return;
4166 }
4167 /* It must be a TCP or UDP packet with a valid checksum */
4168 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4169 /* TCP checksum is good */
4170 skb->ip_summed = CHECKSUM_UNNECESSARY;
4171 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4172 /* IP fragment with UDP payload */
4173 /* Hardware complements the payload checksum, so we undo it
4174 * and then put the value in host order for further stack use.
4175 */
4176 __sum16 sum = (__force __sum16)htons(csum);
4177 skb->csum = csum_unfold(~sum);
4178 skb->ip_summed = CHECKSUM_COMPLETE;
4179 }
4180 adapter->hw_csum_good++;
4181 }
4182
4183 /**
4184 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4185 * @adapter: board private structure
4186 **/
4187
4188 static bool
4189 #ifdef CONFIG_E1000_NAPI
4190 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4191 struct e1000_rx_ring *rx_ring,
4192 int *work_done, int work_to_do)
4193 #else
4194 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4195 struct e1000_rx_ring *rx_ring)
4196 #endif
4197 {
4198 struct net_device *netdev = adapter->netdev;
4199 struct pci_dev *pdev = adapter->pdev;
4200 struct e1000_rx_desc *rx_desc, *next_rxd;
4201 struct e1000_buffer *buffer_info, *next_buffer;
4202 unsigned long flags;
4203 u32 length;
4204 u8 last_byte;
4205 unsigned int i;
4206 int cleaned_count = 0;
4207 bool cleaned = false;
4208 unsigned int total_rx_bytes=0, total_rx_packets=0;
4209
4210 i = rx_ring->next_to_clean;
4211 rx_desc = E1000_RX_DESC(*rx_ring, i);
4212 buffer_info = &rx_ring->buffer_info[i];
4213
4214 while (rx_desc->status & E1000_RXD_STAT_DD) {
4215 struct sk_buff *skb;
4216 u8 status;
4217
4218 #ifdef CONFIG_E1000_NAPI
4219 if (*work_done >= work_to_do)
4220 break;
4221 (*work_done)++;
4222 #endif
4223 status = rx_desc->status;
4224 skb = buffer_info->skb;
4225 buffer_info->skb = NULL;
4226
4227 prefetch(skb->data - NET_IP_ALIGN);
4228
4229 if (++i == rx_ring->count) i = 0;
4230 next_rxd = E1000_RX_DESC(*rx_ring, i);
4231 prefetch(next_rxd);
4232
4233 next_buffer = &rx_ring->buffer_info[i];
4234
4235 cleaned = true;
4236 cleaned_count++;
4237 pci_unmap_single(pdev,
4238 buffer_info->dma,
4239 buffer_info->length,
4240 PCI_DMA_FROMDEVICE);
4241
4242 length = le16_to_cpu(rx_desc->length);
4243
4244 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4245 /* All receives must fit into a single buffer */
4246 E1000_DBG("%s: Receive packet consumed multiple"
4247 " buffers\n", netdev->name);
4248 /* recycle */
4249 buffer_info->skb = skb;
4250 goto next_desc;
4251 }
4252
4253 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4254 last_byte = *(skb->data + length - 1);
4255 if (TBI_ACCEPT(&adapter->hw, status,
4256 rx_desc->errors, length, last_byte)) {
4257 spin_lock_irqsave(&adapter->stats_lock, flags);
4258 e1000_tbi_adjust_stats(&adapter->hw,
4259 &adapter->stats,
4260 length, skb->data);
4261 spin_unlock_irqrestore(&adapter->stats_lock,
4262 flags);
4263 length--;
4264 } else {
4265 /* recycle */
4266 buffer_info->skb = skb;
4267 goto next_desc;
4268 }
4269 }
4270
4271 /* adjust length to remove Ethernet CRC, this must be
4272 * done after the TBI_ACCEPT workaround above */
4273 length -= 4;
4274
4275 /* probably a little skewed due to removing CRC */
4276 total_rx_bytes += length;
4277 total_rx_packets++;
4278
4279 /* code added for copybreak, this should improve
4280 * performance for small packets with large amounts
4281 * of reassembly being done in the stack */
4282 if (length < copybreak) {
4283 struct sk_buff *new_skb =
4284 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4285 if (new_skb) {
4286 skb_reserve(new_skb, NET_IP_ALIGN);
4287 skb_copy_to_linear_data_offset(new_skb,
4288 -NET_IP_ALIGN,
4289 (skb->data -
4290 NET_IP_ALIGN),
4291 (length +
4292 NET_IP_ALIGN));
4293 /* save the skb in buffer_info as good */
4294 buffer_info->skb = skb;
4295 skb = new_skb;
4296 }
4297 /* else just continue with the old one */
4298 }
4299 /* end copybreak code */
4300 skb_put(skb, length);
4301
4302 /* Receive Checksum Offload */
4303 e1000_rx_checksum(adapter,
4304 (u32)(status) |
4305 ((u32)(rx_desc->errors) << 24),
4306 le16_to_cpu(rx_desc->csum), skb);
4307
4308 skb->protocol = eth_type_trans(skb, netdev);
4309 #ifdef CONFIG_E1000_NAPI
4310 if (unlikely(adapter->vlgrp &&
4311 (status & E1000_RXD_STAT_VP))) {
4312 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4313 le16_to_cpu(rx_desc->special) &
4314 E1000_RXD_SPC_VLAN_MASK);
4315 } else {
4316 netif_receive_skb(skb);
4317 }
4318 #else /* CONFIG_E1000_NAPI */
4319 if (unlikely(adapter->vlgrp &&
4320 (status & E1000_RXD_STAT_VP))) {
4321 vlan_hwaccel_rx(skb, adapter->vlgrp,
4322 le16_to_cpu(rx_desc->special) &
4323 E1000_RXD_SPC_VLAN_MASK);
4324 } else {
4325 netif_rx(skb);
4326 }
4327 #endif /* CONFIG_E1000_NAPI */
4328 netdev->last_rx = jiffies;
4329
4330 next_desc:
4331 rx_desc->status = 0;
4332
4333 /* return some buffers to hardware, one at a time is too slow */
4334 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4335 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4336 cleaned_count = 0;
4337 }
4338
4339 /* use prefetched values */
4340 rx_desc = next_rxd;
4341 buffer_info = next_buffer;
4342 }
4343 rx_ring->next_to_clean = i;
4344
4345 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4346 if (cleaned_count)
4347 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4348
4349 adapter->total_rx_packets += total_rx_packets;
4350 adapter->total_rx_bytes += total_rx_bytes;
4351 adapter->net_stats.rx_bytes += total_rx_bytes;
4352 adapter->net_stats.rx_packets += total_rx_packets;
4353 return cleaned;
4354 }
4355
4356 /**
4357 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4358 * @adapter: board private structure
4359 **/
4360
4361 static bool
4362 #ifdef CONFIG_E1000_NAPI
4363 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4364 struct e1000_rx_ring *rx_ring,
4365 int *work_done, int work_to_do)
4366 #else
4367 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4368 struct e1000_rx_ring *rx_ring)
4369 #endif
4370 {
4371 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4372 struct net_device *netdev = adapter->netdev;
4373 struct pci_dev *pdev = adapter->pdev;
4374 struct e1000_buffer *buffer_info, *next_buffer;
4375 struct e1000_ps_page *ps_page;
4376 struct e1000_ps_page_dma *ps_page_dma;
4377 struct sk_buff *skb;
4378 unsigned int i, j;
4379 u32 length, staterr;
4380 int cleaned_count = 0;
4381 bool cleaned = false;
4382 unsigned int total_rx_bytes=0, total_rx_packets=0;
4383
4384 i = rx_ring->next_to_clean;
4385 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4386 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4387 buffer_info = &rx_ring->buffer_info[i];
4388
4389 while (staterr & E1000_RXD_STAT_DD) {
4390 ps_page = &rx_ring->ps_page[i];
4391 ps_page_dma = &rx_ring->ps_page_dma[i];
4392 #ifdef CONFIG_E1000_NAPI
4393 if (unlikely(*work_done >= work_to_do))
4394 break;
4395 (*work_done)++;
4396 #endif
4397 skb = buffer_info->skb;
4398
4399 /* in the packet split case this is header only */
4400 prefetch(skb->data - NET_IP_ALIGN);
4401
4402 if (++i == rx_ring->count) i = 0;
4403 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4404 prefetch(next_rxd);
4405
4406 next_buffer = &rx_ring->buffer_info[i];
4407
4408 cleaned = true;
4409 cleaned_count++;
4410 pci_unmap_single(pdev, buffer_info->dma,
4411 buffer_info->length,
4412 PCI_DMA_FROMDEVICE);
4413
4414 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4415 E1000_DBG("%s: Packet Split buffers didn't pick up"
4416 " the full packet\n", netdev->name);
4417 dev_kfree_skb_irq(skb);
4418 goto next_desc;
4419 }
4420
4421 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4422 dev_kfree_skb_irq(skb);
4423 goto next_desc;
4424 }
4425
4426 length = le16_to_cpu(rx_desc->wb.middle.length0);
4427
4428 if (unlikely(!length)) {
4429 E1000_DBG("%s: Last part of the packet spanning"
4430 " multiple descriptors\n", netdev->name);
4431 dev_kfree_skb_irq(skb);
4432 goto next_desc;
4433 }
4434
4435 /* Good Receive */
4436 skb_put(skb, length);
4437
4438 {
4439 /* this looks ugly, but it seems compiler issues make it
4440 more efficient than reusing j */
4441 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4442
4443 /* page alloc/put takes too long and effects small packet
4444 * throughput, so unsplit small packets and save the alloc/put*/
4445 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4446 u8 *vaddr;
4447 /* there is no documentation about how to call
4448 * kmap_atomic, so we can't hold the mapping
4449 * very long */
4450 pci_dma_sync_single_for_cpu(pdev,
4451 ps_page_dma->ps_page_dma[0],
4452 PAGE_SIZE,
4453 PCI_DMA_FROMDEVICE);
4454 vaddr = kmap_atomic(ps_page->ps_page[0],
4455 KM_SKB_DATA_SOFTIRQ);
4456 memcpy(skb_tail_pointer(skb), vaddr, l1);
4457 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4458 pci_dma_sync_single_for_device(pdev,
4459 ps_page_dma->ps_page_dma[0],
4460 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4461 /* remove the CRC */
4462 l1 -= 4;
4463 skb_put(skb, l1);
4464 goto copydone;
4465 } /* if */
4466 }
4467
4468 for (j = 0; j < adapter->rx_ps_pages; j++) {
4469 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4470 break;
4471 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4472 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4473 ps_page_dma->ps_page_dma[j] = 0;
4474 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4475 length);
4476 ps_page->ps_page[j] = NULL;
4477 skb->len += length;
4478 skb->data_len += length;
4479 skb->truesize += length;
4480 }
4481
4482 /* strip the ethernet crc, problem is we're using pages now so
4483 * this whole operation can get a little cpu intensive */
4484 pskb_trim(skb, skb->len - 4);
4485
4486 copydone:
4487 total_rx_bytes += skb->len;
4488 total_rx_packets++;
4489
4490 e1000_rx_checksum(adapter, staterr,
4491 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4492 skb->protocol = eth_type_trans(skb, netdev);
4493
4494 if (likely(rx_desc->wb.upper.header_status &
4495 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4496 adapter->rx_hdr_split++;
4497 #ifdef CONFIG_E1000_NAPI
4498 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4499 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4500 le16_to_cpu(rx_desc->wb.middle.vlan) &
4501 E1000_RXD_SPC_VLAN_MASK);
4502 } else {
4503 netif_receive_skb(skb);
4504 }
4505 #else /* CONFIG_E1000_NAPI */
4506 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4507 vlan_hwaccel_rx(skb, adapter->vlgrp,
4508 le16_to_cpu(rx_desc->wb.middle.vlan) &
4509 E1000_RXD_SPC_VLAN_MASK);
4510 } else {
4511 netif_rx(skb);
4512 }
4513 #endif /* CONFIG_E1000_NAPI */
4514 netdev->last_rx = jiffies;
4515
4516 next_desc:
4517 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4518 buffer_info->skb = NULL;
4519
4520 /* return some buffers to hardware, one at a time is too slow */
4521 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4522 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4523 cleaned_count = 0;
4524 }
4525
4526 /* use prefetched values */
4527 rx_desc = next_rxd;
4528 buffer_info = next_buffer;
4529
4530 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4531 }
4532 rx_ring->next_to_clean = i;
4533
4534 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4535 if (cleaned_count)
4536 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4537
4538 adapter->total_rx_packets += total_rx_packets;
4539 adapter->total_rx_bytes += total_rx_bytes;
4540 adapter->net_stats.rx_bytes += total_rx_bytes;
4541 adapter->net_stats.rx_packets += total_rx_packets;
4542 return cleaned;
4543 }
4544
4545 /**
4546 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4547 * @adapter: address of board private structure
4548 **/
4549
4550 static void
4551 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4552 struct e1000_rx_ring *rx_ring,
4553 int cleaned_count)
4554 {
4555 struct net_device *netdev = adapter->netdev;
4556 struct pci_dev *pdev = adapter->pdev;
4557 struct e1000_rx_desc *rx_desc;
4558 struct e1000_buffer *buffer_info;
4559 struct sk_buff *skb;
4560 unsigned int i;
4561 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4562
4563 i = rx_ring->next_to_use;
4564 buffer_info = &rx_ring->buffer_info[i];
4565
4566 while (cleaned_count--) {
4567 skb = buffer_info->skb;
4568 if (skb) {
4569 skb_trim(skb, 0);
4570 goto map_skb;
4571 }
4572
4573 skb = netdev_alloc_skb(netdev, bufsz);
4574 if (unlikely(!skb)) {
4575 /* Better luck next round */
4576 adapter->alloc_rx_buff_failed++;
4577 break;
4578 }
4579
4580 /* Fix for errata 23, can't cross 64kB boundary */
4581 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4582 struct sk_buff *oldskb = skb;
4583 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4584 "at %p\n", bufsz, skb->data);
4585 /* Try again, without freeing the previous */
4586 skb = netdev_alloc_skb(netdev, bufsz);
4587 /* Failed allocation, critical failure */
4588 if (!skb) {
4589 dev_kfree_skb(oldskb);
4590 break;
4591 }
4592
4593 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4594 /* give up */
4595 dev_kfree_skb(skb);
4596 dev_kfree_skb(oldskb);
4597 break; /* while !buffer_info->skb */
4598 }
4599
4600 /* Use new allocation */
4601 dev_kfree_skb(oldskb);
4602 }
4603 /* Make buffer alignment 2 beyond a 16 byte boundary
4604 * this will result in a 16 byte aligned IP header after
4605 * the 14 byte MAC header is removed
4606 */
4607 skb_reserve(skb, NET_IP_ALIGN);
4608
4609 buffer_info->skb = skb;
4610 buffer_info->length = adapter->rx_buffer_len;
4611 map_skb:
4612 buffer_info->dma = pci_map_single(pdev,
4613 skb->data,
4614 adapter->rx_buffer_len,
4615 PCI_DMA_FROMDEVICE);
4616
4617 /* Fix for errata 23, can't cross 64kB boundary */
4618 if (!e1000_check_64k_bound(adapter,
4619 (void *)(unsigned long)buffer_info->dma,
4620 adapter->rx_buffer_len)) {
4621 DPRINTK(RX_ERR, ERR,
4622 "dma align check failed: %u bytes at %p\n",
4623 adapter->rx_buffer_len,
4624 (void *)(unsigned long)buffer_info->dma);
4625 dev_kfree_skb(skb);
4626 buffer_info->skb = NULL;
4627
4628 pci_unmap_single(pdev, buffer_info->dma,
4629 adapter->rx_buffer_len,
4630 PCI_DMA_FROMDEVICE);
4631
4632 break; /* while !buffer_info->skb */
4633 }
4634 rx_desc = E1000_RX_DESC(*rx_ring, i);
4635 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4636
4637 if (unlikely(++i == rx_ring->count))
4638 i = 0;
4639 buffer_info = &rx_ring->buffer_info[i];
4640 }
4641
4642 if (likely(rx_ring->next_to_use != i)) {
4643 rx_ring->next_to_use = i;
4644 if (unlikely(i-- == 0))
4645 i = (rx_ring->count - 1);
4646
4647 /* Force memory writes to complete before letting h/w
4648 * know there are new descriptors to fetch. (Only
4649 * applicable for weak-ordered memory model archs,
4650 * such as IA-64). */
4651 wmb();
4652 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4653 }
4654 }
4655
4656 /**
4657 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4658 * @adapter: address of board private structure
4659 **/
4660
4661 static void
4662 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4663 struct e1000_rx_ring *rx_ring,
4664 int cleaned_count)
4665 {
4666 struct net_device *netdev = adapter->netdev;
4667 struct pci_dev *pdev = adapter->pdev;
4668 union e1000_rx_desc_packet_split *rx_desc;
4669 struct e1000_buffer *buffer_info;
4670 struct e1000_ps_page *ps_page;
4671 struct e1000_ps_page_dma *ps_page_dma;
4672 struct sk_buff *skb;
4673 unsigned int i, j;
4674
4675 i = rx_ring->next_to_use;
4676 buffer_info = &rx_ring->buffer_info[i];
4677 ps_page = &rx_ring->ps_page[i];
4678 ps_page_dma = &rx_ring->ps_page_dma[i];
4679
4680 while (cleaned_count--) {
4681 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4682
4683 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4684 if (j < adapter->rx_ps_pages) {
4685 if (likely(!ps_page->ps_page[j])) {
4686 ps_page->ps_page[j] =
4687 alloc_page(GFP_ATOMIC);
4688 if (unlikely(!ps_page->ps_page[j])) {
4689 adapter->alloc_rx_buff_failed++;
4690 goto no_buffers;
4691 }
4692 ps_page_dma->ps_page_dma[j] =
4693 pci_map_page(pdev,
4694 ps_page->ps_page[j],
4695 0, PAGE_SIZE,
4696 PCI_DMA_FROMDEVICE);
4697 }
4698 /* Refresh the desc even if buffer_addrs didn't
4699 * change because each write-back erases
4700 * this info.
4701 */
4702 rx_desc->read.buffer_addr[j+1] =
4703 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4704 } else
4705 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
4706 }
4707
4708 skb = netdev_alloc_skb(netdev,
4709 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4710
4711 if (unlikely(!skb)) {
4712 adapter->alloc_rx_buff_failed++;
4713 break;
4714 }
4715
4716 /* Make buffer alignment 2 beyond a 16 byte boundary
4717 * this will result in a 16 byte aligned IP header after
4718 * the 14 byte MAC header is removed
4719 */
4720 skb_reserve(skb, NET_IP_ALIGN);
4721
4722 buffer_info->skb = skb;
4723 buffer_info->length = adapter->rx_ps_bsize0;
4724 buffer_info->dma = pci_map_single(pdev, skb->data,
4725 adapter->rx_ps_bsize0,
4726 PCI_DMA_FROMDEVICE);
4727
4728 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4729
4730 if (unlikely(++i == rx_ring->count)) i = 0;
4731 buffer_info = &rx_ring->buffer_info[i];
4732 ps_page = &rx_ring->ps_page[i];
4733 ps_page_dma = &rx_ring->ps_page_dma[i];
4734 }
4735
4736 no_buffers:
4737 if (likely(rx_ring->next_to_use != i)) {
4738 rx_ring->next_to_use = i;
4739 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4740
4741 /* Force memory writes to complete before letting h/w
4742 * know there are new descriptors to fetch. (Only
4743 * applicable for weak-ordered memory model archs,
4744 * such as IA-64). */
4745 wmb();
4746 /* Hardware increments by 16 bytes, but packet split
4747 * descriptors are 32 bytes...so we increment tail
4748 * twice as much.
4749 */
4750 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4751 }
4752 }
4753
4754 /**
4755 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4756 * @adapter:
4757 **/
4758
4759 static void
4760 e1000_smartspeed(struct e1000_adapter *adapter)
4761 {
4762 u16 phy_status;
4763 u16 phy_ctrl;
4764
4765 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4766 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4767 return;
4768
4769 if (adapter->smartspeed == 0) {
4770 /* If Master/Slave config fault is asserted twice,
4771 * we assume back-to-back */
4772 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4773 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4774 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4775 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4776 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4777 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4778 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4779 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4780 phy_ctrl);
4781 adapter->smartspeed++;
4782 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4783 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4784 &phy_ctrl)) {
4785 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4786 MII_CR_RESTART_AUTO_NEG);
4787 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4788 phy_ctrl);
4789 }
4790 }
4791 return;
4792 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4793 /* If still no link, perhaps using 2/3 pair cable */
4794 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4795 phy_ctrl |= CR_1000T_MS_ENABLE;
4796 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4797 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4798 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4799 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4800 MII_CR_RESTART_AUTO_NEG);
4801 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4802 }
4803 }
4804 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4805 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4806 adapter->smartspeed = 0;
4807 }
4808
4809 /**
4810 * e1000_ioctl -
4811 * @netdev:
4812 * @ifreq:
4813 * @cmd:
4814 **/
4815
4816 static int
4817 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4818 {
4819 switch (cmd) {
4820 case SIOCGMIIPHY:
4821 case SIOCGMIIREG:
4822 case SIOCSMIIREG:
4823 return e1000_mii_ioctl(netdev, ifr, cmd);
4824 default:
4825 return -EOPNOTSUPP;
4826 }
4827 }
4828
4829 /**
4830 * e1000_mii_ioctl -
4831 * @netdev:
4832 * @ifreq:
4833 * @cmd:
4834 **/
4835
4836 static int
4837 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4838 {
4839 struct e1000_adapter *adapter = netdev_priv(netdev);
4840 struct mii_ioctl_data *data = if_mii(ifr);
4841 int retval;
4842 u16 mii_reg;
4843 u16 spddplx;
4844 unsigned long flags;
4845
4846 if (adapter->hw.media_type != e1000_media_type_copper)
4847 return -EOPNOTSUPP;
4848
4849 switch (cmd) {
4850 case SIOCGMIIPHY:
4851 data->phy_id = adapter->hw.phy_addr;
4852 break;
4853 case SIOCGMIIREG:
4854 if (!capable(CAP_NET_ADMIN))
4855 return -EPERM;
4856 spin_lock_irqsave(&adapter->stats_lock, flags);
4857 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4858 &data->val_out)) {
4859 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4860 return -EIO;
4861 }
4862 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4863 break;
4864 case SIOCSMIIREG:
4865 if (!capable(CAP_NET_ADMIN))
4866 return -EPERM;
4867 if (data->reg_num & ~(0x1F))
4868 return -EFAULT;
4869 mii_reg = data->val_in;
4870 spin_lock_irqsave(&adapter->stats_lock, flags);
4871 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4872 mii_reg)) {
4873 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4874 return -EIO;
4875 }
4876 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4877 if (adapter->hw.media_type == e1000_media_type_copper) {
4878 switch (data->reg_num) {
4879 case PHY_CTRL:
4880 if (mii_reg & MII_CR_POWER_DOWN)
4881 break;
4882 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4883 adapter->hw.autoneg = 1;
4884 adapter->hw.autoneg_advertised = 0x2F;
4885 } else {
4886 if (mii_reg & 0x40)
4887 spddplx = SPEED_1000;
4888 else if (mii_reg & 0x2000)
4889 spddplx = SPEED_100;
4890 else
4891 spddplx = SPEED_10;
4892 spddplx += (mii_reg & 0x100)
4893 ? DUPLEX_FULL :
4894 DUPLEX_HALF;
4895 retval = e1000_set_spd_dplx(adapter,
4896 spddplx);
4897 if (retval)
4898 return retval;
4899 }
4900 if (netif_running(adapter->netdev))
4901 e1000_reinit_locked(adapter);
4902 else
4903 e1000_reset(adapter);
4904 break;
4905 case M88E1000_PHY_SPEC_CTRL:
4906 case M88E1000_EXT_PHY_SPEC_CTRL:
4907 if (e1000_phy_reset(&adapter->hw))
4908 return -EIO;
4909 break;
4910 }
4911 } else {
4912 switch (data->reg_num) {
4913 case PHY_CTRL:
4914 if (mii_reg & MII_CR_POWER_DOWN)
4915 break;
4916 if (netif_running(adapter->netdev))
4917 e1000_reinit_locked(adapter);
4918 else
4919 e1000_reset(adapter);
4920 break;
4921 }
4922 }
4923 break;
4924 default:
4925 return -EOPNOTSUPP;
4926 }
4927 return E1000_SUCCESS;
4928 }
4929
4930 void
4931 e1000_pci_set_mwi(struct e1000_hw *hw)
4932 {
4933 struct e1000_adapter *adapter = hw->back;
4934 int ret_val = pci_set_mwi(adapter->pdev);
4935
4936 if (ret_val)
4937 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4938 }
4939
4940 void
4941 e1000_pci_clear_mwi(struct e1000_hw *hw)
4942 {
4943 struct e1000_adapter *adapter = hw->back;
4944
4945 pci_clear_mwi(adapter->pdev);
4946 }
4947
4948 int
4949 e1000_pcix_get_mmrbc(struct e1000_hw *hw)
4950 {
4951 struct e1000_adapter *adapter = hw->back;
4952 return pcix_get_mmrbc(adapter->pdev);
4953 }
4954
4955 void
4956 e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
4957 {
4958 struct e1000_adapter *adapter = hw->back;
4959 pcix_set_mmrbc(adapter->pdev, mmrbc);
4960 }
4961
4962 s32
4963 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
4964 {
4965 struct e1000_adapter *adapter = hw->back;
4966 u16 cap_offset;
4967
4968 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4969 if (!cap_offset)
4970 return -E1000_ERR_CONFIG;
4971
4972 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4973
4974 return E1000_SUCCESS;
4975 }
4976
4977 void
4978 e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
4979 {
4980 outl(value, port);
4981 }
4982
4983 static void
4984 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4985 {
4986 struct e1000_adapter *adapter = netdev_priv(netdev);
4987 u32 ctrl, rctl;
4988
4989 if (!test_bit(__E1000_DOWN, &adapter->flags))
4990 e1000_irq_disable(adapter);
4991 adapter->vlgrp = grp;
4992
4993 if (grp) {
4994 /* enable VLAN tag insert/strip */
4995 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4996 ctrl |= E1000_CTRL_VME;
4997 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4998
4999 if (adapter->hw.mac_type != e1000_ich8lan) {
5000 /* enable VLAN receive filtering */
5001 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5002 rctl |= E1000_RCTL_VFE;
5003 rctl &= ~E1000_RCTL_CFIEN;
5004 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5005 e1000_update_mng_vlan(adapter);
5006 }
5007 } else {
5008 /* disable VLAN tag insert/strip */
5009 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5010 ctrl &= ~E1000_CTRL_VME;
5011 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5012
5013 if (adapter->hw.mac_type != e1000_ich8lan) {
5014 /* disable VLAN filtering */
5015 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5016 rctl &= ~E1000_RCTL_VFE;
5017 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5018 if (adapter->mng_vlan_id !=
5019 (u16)E1000_MNG_VLAN_NONE) {
5020 e1000_vlan_rx_kill_vid(netdev,
5021 adapter->mng_vlan_id);
5022 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
5023 }
5024 }
5025 }
5026
5027 if (!test_bit(__E1000_DOWN, &adapter->flags))
5028 e1000_irq_enable(adapter);
5029 }
5030
5031 static void
5032 e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
5033 {
5034 struct e1000_adapter *adapter = netdev_priv(netdev);
5035 u32 vfta, index;
5036
5037 if ((adapter->hw.mng_cookie.status &
5038 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5039 (vid == adapter->mng_vlan_id))
5040 return;
5041 /* add VID to filter table */
5042 index = (vid >> 5) & 0x7F;
5043 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5044 vfta |= (1 << (vid & 0x1F));
5045 e1000_write_vfta(&adapter->hw, index, vfta);
5046 }
5047
5048 static void
5049 e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
5050 {
5051 struct e1000_adapter *adapter = netdev_priv(netdev);
5052 u32 vfta, index;
5053
5054 if (!test_bit(__E1000_DOWN, &adapter->flags))
5055 e1000_irq_disable(adapter);
5056 vlan_group_set_device(adapter->vlgrp, vid, NULL);
5057 if (!test_bit(__E1000_DOWN, &adapter->flags))
5058 e1000_irq_enable(adapter);
5059
5060 if ((adapter->hw.mng_cookie.status &
5061 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5062 (vid == adapter->mng_vlan_id)) {
5063 /* release control to f/w */
5064 e1000_release_hw_control(adapter);
5065 return;
5066 }
5067
5068 /* remove VID from filter table */
5069 index = (vid >> 5) & 0x7F;
5070 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5071 vfta &= ~(1 << (vid & 0x1F));
5072 e1000_write_vfta(&adapter->hw, index, vfta);
5073 }
5074
5075 static void
5076 e1000_restore_vlan(struct e1000_adapter *adapter)
5077 {
5078 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5079
5080 if (adapter->vlgrp) {
5081 u16 vid;
5082 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5083 if (!vlan_group_get_device(adapter->vlgrp, vid))
5084 continue;
5085 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5086 }
5087 }
5088 }
5089
5090 int
5091 e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
5092 {
5093 adapter->hw.autoneg = 0;
5094
5095 /* Fiber NICs only allow 1000 gbps Full duplex */
5096 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5097 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5098 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5099 return -EINVAL;
5100 }
5101
5102 switch (spddplx) {
5103 case SPEED_10 + DUPLEX_HALF:
5104 adapter->hw.forced_speed_duplex = e1000_10_half;
5105 break;
5106 case SPEED_10 + DUPLEX_FULL:
5107 adapter->hw.forced_speed_duplex = e1000_10_full;
5108 break;
5109 case SPEED_100 + DUPLEX_HALF:
5110 adapter->hw.forced_speed_duplex = e1000_100_half;
5111 break;
5112 case SPEED_100 + DUPLEX_FULL:
5113 adapter->hw.forced_speed_duplex = e1000_100_full;
5114 break;
5115 case SPEED_1000 + DUPLEX_FULL:
5116 adapter->hw.autoneg = 1;
5117 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5118 break;
5119 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5120 default:
5121 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5122 return -EINVAL;
5123 }
5124 return 0;
5125 }
5126
5127 static int
5128 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5129 {
5130 struct net_device *netdev = pci_get_drvdata(pdev);
5131 struct e1000_adapter *adapter = netdev_priv(netdev);
5132 u32 ctrl, ctrl_ext, rctl, status;
5133 u32 wufc = adapter->wol;
5134 #ifdef CONFIG_PM
5135 int retval = 0;
5136 #endif
5137
5138 netif_device_detach(netdev);
5139
5140 if (netif_running(netdev)) {
5141 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5142 e1000_down(adapter);
5143 }
5144
5145 #ifdef CONFIG_PM
5146 retval = pci_save_state(pdev);
5147 if (retval)
5148 return retval;
5149 #endif
5150
5151 status = E1000_READ_REG(&adapter->hw, STATUS);
5152 if (status & E1000_STATUS_LU)
5153 wufc &= ~E1000_WUFC_LNKC;
5154
5155 if (wufc) {
5156 e1000_setup_rctl(adapter);
5157 e1000_set_rx_mode(netdev);
5158
5159 /* turn on all-multi mode if wake on multicast is enabled */
5160 if (wufc & E1000_WUFC_MC) {
5161 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5162 rctl |= E1000_RCTL_MPE;
5163 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5164 }
5165
5166 if (adapter->hw.mac_type >= e1000_82540) {
5167 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5168 /* advertise wake from D3Cold */
5169 #define E1000_CTRL_ADVD3WUC 0x00100000
5170 /* phy power management enable */
5171 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5172 ctrl |= E1000_CTRL_ADVD3WUC |
5173 E1000_CTRL_EN_PHY_PWR_MGMT;
5174 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5175 }
5176
5177 if (adapter->hw.media_type == e1000_media_type_fiber ||
5178 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5179 /* keep the laser running in D3 */
5180 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5181 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5182 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5183 }
5184
5185 /* Allow time for pending master requests to run */
5186 e1000_disable_pciex_master(&adapter->hw);
5187
5188 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5189 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5190 pci_enable_wake(pdev, PCI_D3hot, 1);
5191 pci_enable_wake(pdev, PCI_D3cold, 1);
5192 } else {
5193 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5194 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5195 pci_enable_wake(pdev, PCI_D3hot, 0);
5196 pci_enable_wake(pdev, PCI_D3cold, 0);
5197 }
5198
5199 e1000_release_manageability(adapter);
5200
5201 /* make sure adapter isn't asleep if manageability is enabled */
5202 if (adapter->en_mng_pt) {
5203 pci_enable_wake(pdev, PCI_D3hot, 1);
5204 pci_enable_wake(pdev, PCI_D3cold, 1);
5205 }
5206
5207 if (adapter->hw.phy_type == e1000_phy_igp_3)
5208 e1000_phy_powerdown_workaround(&adapter->hw);
5209
5210 if (netif_running(netdev))
5211 e1000_free_irq(adapter);
5212
5213 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5214 * would have already happened in close and is redundant. */
5215 e1000_release_hw_control(adapter);
5216
5217 pci_disable_device(pdev);
5218
5219 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5220
5221 return 0;
5222 }
5223
5224 #ifdef CONFIG_PM
5225 static int
5226 e1000_resume(struct pci_dev *pdev)
5227 {
5228 struct net_device *netdev = pci_get_drvdata(pdev);
5229 struct e1000_adapter *adapter = netdev_priv(netdev);
5230 u32 err;
5231
5232 pci_set_power_state(pdev, PCI_D0);
5233 pci_restore_state(pdev);
5234 if ((err = pci_enable_device(pdev))) {
5235 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5236 return err;
5237 }
5238 pci_set_master(pdev);
5239
5240 pci_enable_wake(pdev, PCI_D3hot, 0);
5241 pci_enable_wake(pdev, PCI_D3cold, 0);
5242
5243 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5244 return err;
5245
5246 e1000_power_up_phy(adapter);
5247 e1000_reset(adapter);
5248 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5249
5250 e1000_init_manageability(adapter);
5251
5252 if (netif_running(netdev))
5253 e1000_up(adapter);
5254
5255 netif_device_attach(netdev);
5256
5257 /* If the controller is 82573 and f/w is AMT, do not set
5258 * DRV_LOAD until the interface is up. For all other cases,
5259 * let the f/w know that the h/w is now under the control
5260 * of the driver. */
5261 if (adapter->hw.mac_type != e1000_82573 ||
5262 !e1000_check_mng_mode(&adapter->hw))
5263 e1000_get_hw_control(adapter);
5264
5265 return 0;
5266 }
5267 #endif
5268
5269 static void e1000_shutdown(struct pci_dev *pdev)
5270 {
5271 e1000_suspend(pdev, PMSG_SUSPEND);
5272 }
5273
5274 #ifdef CONFIG_NET_POLL_CONTROLLER
5275 /*
5276 * Polling 'interrupt' - used by things like netconsole to send skbs
5277 * without having to re-enable interrupts. It's not called while
5278 * the interrupt routine is executing.
5279 */
5280 static void
5281 e1000_netpoll(struct net_device *netdev)
5282 {
5283 struct e1000_adapter *adapter = netdev_priv(netdev);
5284
5285 disable_irq(adapter->pdev->irq);
5286 e1000_intr(adapter->pdev->irq, netdev);
5287 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5288 #ifndef CONFIG_E1000_NAPI
5289 adapter->clean_rx(adapter, adapter->rx_ring);
5290 #endif
5291 enable_irq(adapter->pdev->irq);
5292 }
5293 #endif
5294
5295 /**
5296 * e1000_io_error_detected - called when PCI error is detected
5297 * @pdev: Pointer to PCI device
5298 * @state: The current pci conneection state
5299 *
5300 * This function is called after a PCI bus error affecting
5301 * this device has been detected.
5302 */
5303 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5304 {
5305 struct net_device *netdev = pci_get_drvdata(pdev);
5306 struct e1000_adapter *adapter = netdev->priv;
5307
5308 netif_device_detach(netdev);
5309
5310 if (netif_running(netdev))
5311 e1000_down(adapter);
5312 pci_disable_device(pdev);
5313
5314 /* Request a slot slot reset. */
5315 return PCI_ERS_RESULT_NEED_RESET;
5316 }
5317
5318 /**
5319 * e1000_io_slot_reset - called after the pci bus has been reset.
5320 * @pdev: Pointer to PCI device
5321 *
5322 * Restart the card from scratch, as if from a cold-boot. Implementation
5323 * resembles the first-half of the e1000_resume routine.
5324 */
5325 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5326 {
5327 struct net_device *netdev = pci_get_drvdata(pdev);
5328 struct e1000_adapter *adapter = netdev->priv;
5329
5330 if (pci_enable_device(pdev)) {
5331 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5332 return PCI_ERS_RESULT_DISCONNECT;
5333 }
5334 pci_set_master(pdev);
5335
5336 pci_enable_wake(pdev, PCI_D3hot, 0);
5337 pci_enable_wake(pdev, PCI_D3cold, 0);
5338
5339 e1000_reset(adapter);
5340 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5341
5342 return PCI_ERS_RESULT_RECOVERED;
5343 }
5344
5345 /**
5346 * e1000_io_resume - called when traffic can start flowing again.
5347 * @pdev: Pointer to PCI device
5348 *
5349 * This callback is called when the error recovery driver tells us that
5350 * its OK to resume normal operation. Implementation resembles the
5351 * second-half of the e1000_resume routine.
5352 */
5353 static void e1000_io_resume(struct pci_dev *pdev)
5354 {
5355 struct net_device *netdev = pci_get_drvdata(pdev);
5356 struct e1000_adapter *adapter = netdev->priv;
5357
5358 e1000_init_manageability(adapter);
5359
5360 if (netif_running(netdev)) {
5361 if (e1000_up(adapter)) {
5362 printk("e1000: can't bring device back up after reset\n");
5363 return;
5364 }
5365 }
5366
5367 netif_device_attach(netdev);
5368
5369 /* If the controller is 82573 and f/w is AMT, do not set
5370 * DRV_LOAD until the interface is up. For all other cases,
5371 * let the f/w know that the h/w is now under the control
5372 * of the driver. */
5373 if (adapter->hw.mac_type != e1000_82573 ||
5374 !e1000_check_mng_mode(&adapter->hw))
5375 e1000_get_hw_control(adapter);
5376
5377 }
5378
5379 /* e1000_main.c */
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