1 /********************************************************************
4 Description: Driver for the VIA VT8231/VT8233 IrDA chipsets
5 Author: VIA Technologies,inc
8 Copyright (c) 1998-2003 VIA Technologies, Inc.
10 This program is free software; you can redistribute it and/or modify it under
11 the terms of the GNU General Public License as published by the Free Software
12 Foundation; either version 2, or (at your option) any later version.
14 This program is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTIES OR REPRESENTATIONS; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
17 See the GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License along with
20 this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 F01 Oct/02/02: Modify code for V0.11(move out back to back transfer)
24 F02 Oct/28/02: Add SB device ID for 3147 and 3177.
26 jul/09/2002 : only implement two kind of dongle currently.
27 Oct/02/2002 : work on VT8231 and VT8233 .
28 Aug/06/2003 : change driver format to pci driver .
30 2004-02-16: <sda@bdit.de>
31 - Removed unneeded 'legacy' pci stuff.
32 - Make sure SIR mode is set (hw_init()) before calling mode-dependant stuff.
33 - On speed change from core, don't send SIR frame with new speed.
34 Use current speed and change speeds later.
35 - Make module-param dongle_id actually work.
36 - New dongle_id 17 (0x11): TDFS4500. Single-ended SIR only.
37 Tested with home-grown PCB on EPIA boards.
40 ********************************************************************/
41 #include <linux/module.h>
42 #include <linux/kernel.h>
43 #include <linux/types.h>
44 #include <linux/skbuff.h>
45 #include <linux/netdevice.h>
46 #include <linux/ioport.h>
47 #include <linux/delay.h>
48 #include <linux/slab.h>
49 #include <linux/init.h>
50 #include <linux/rtnetlink.h>
51 #include <linux/pci.h>
52 #include <linux/dma-mapping.h>
56 #include <asm/byteorder.h>
60 #include <net/irda/wrapper.h>
61 #include <net/irda/irda.h>
62 #include <net/irda/irda_device.h>
66 #define VIA_MODULE_NAME "via-ircc"
67 #define CHIP_IO_EXTENT 0x40
69 static char *driver_name
= VIA_MODULE_NAME
;
71 /* Module parameters */
72 static int qos_mtt_bits
= 0x07; /* 1 ms or more */
73 static int dongle_id
= 0; /* default: probe */
75 /* We can't guess the type of connected dongle, user *must* supply it. */
76 module_param(dongle_id
, int, 0);
78 /* FIXME : we should not need this, because instances should be automatically
79 * managed by the PCI layer. Especially that we seem to only be using the
80 * first entry. Jean II */
81 /* Max 4 instances for now */
82 static struct via_ircc_cb
*dev_self
[] = { NULL
, NULL
, NULL
, NULL
};
85 static int via_ircc_open(int i
, chipio_t
* info
, unsigned int id
);
86 static int via_ircc_close(struct via_ircc_cb
*self
);
87 static int via_ircc_dma_receive(struct via_ircc_cb
*self
);
88 static int via_ircc_dma_receive_complete(struct via_ircc_cb
*self
,
90 static int via_ircc_hard_xmit_sir(struct sk_buff
*skb
,
91 struct net_device
*dev
);
92 static int via_ircc_hard_xmit_fir(struct sk_buff
*skb
,
93 struct net_device
*dev
);
94 static void via_hw_init(struct via_ircc_cb
*self
);
95 static void via_ircc_change_speed(struct via_ircc_cb
*self
, __u32 baud
);
96 static irqreturn_t
via_ircc_interrupt(int irq
, void *dev_id
);
97 static int via_ircc_is_receiving(struct via_ircc_cb
*self
);
98 static int via_ircc_read_dongle_id(int iobase
);
100 static int via_ircc_net_open(struct net_device
*dev
);
101 static int via_ircc_net_close(struct net_device
*dev
);
102 static int via_ircc_net_ioctl(struct net_device
*dev
, struct ifreq
*rq
,
104 static struct net_device_stats
*via_ircc_net_get_stats(struct net_device
106 static void via_ircc_change_dongle_speed(int iobase
, int speed
,
108 static int RxTimerHandler(struct via_ircc_cb
*self
, int iobase
);
109 static void hwreset(struct via_ircc_cb
*self
);
110 static int via_ircc_dma_xmit(struct via_ircc_cb
*self
, u16 iobase
);
111 static int upload_rxdata(struct via_ircc_cb
*self
, int iobase
);
112 static int __devinit
via_init_one (struct pci_dev
*pcidev
, const struct pci_device_id
*id
);
113 static void __devexit
via_remove_one (struct pci_dev
*pdev
);
115 /* FIXME : Should use udelay() instead, even if we are x86 only - Jean II */
116 static void iodelay(int udelay
)
121 for (i
= 0; i
< udelay
; i
++) {
126 static struct pci_device_id via_pci_tbl
[] = {
127 { PCI_VENDOR_ID_VIA
, 0x8231, PCI_ANY_ID
, PCI_ANY_ID
,0,0,0 },
128 { PCI_VENDOR_ID_VIA
, 0x3109, PCI_ANY_ID
, PCI_ANY_ID
,0,0,1 },
129 { PCI_VENDOR_ID_VIA
, 0x3074, PCI_ANY_ID
, PCI_ANY_ID
,0,0,2 },
130 { PCI_VENDOR_ID_VIA
, 0x3147, PCI_ANY_ID
, PCI_ANY_ID
,0,0,3 },
131 { PCI_VENDOR_ID_VIA
, 0x3177, PCI_ANY_ID
, PCI_ANY_ID
,0,0,4 },
135 MODULE_DEVICE_TABLE(pci
,via_pci_tbl
);
138 static struct pci_driver via_driver
= {
139 .name
= VIA_MODULE_NAME
,
140 .id_table
= via_pci_tbl
,
141 .probe
= via_init_one
,
142 .remove
= __devexit_p(via_remove_one
),
147 * Function via_ircc_init ()
149 * Initialize chip. Just find out chip type and resource.
151 static int __init
via_ircc_init(void)
155 IRDA_DEBUG(3, "%s()\n", __FUNCTION__
);
157 rc
= pci_register_driver(&via_driver
);
159 IRDA_DEBUG(0, "%s(): error rc = %d, returning -ENODEV...\n",
166 static int __devinit
via_init_one (struct pci_dev
*pcidev
, const struct pci_device_id
*id
)
169 u8 temp
,oldPCI_40
,oldPCI_44
,bTmp
,bTmp1
;
170 u16 Chipset
,FirDRQ1
,FirDRQ0
,FirIRQ
,FirIOBase
;
173 IRDA_DEBUG(2, "%s(): Device ID=(0X%X)\n", __FUNCTION__
, id
->device
);
175 rc
= pci_enable_device (pcidev
);
177 IRDA_DEBUG(0, "%s(): error rc = %d\n", __FUNCTION__
, rc
);
181 // South Bridge exist
182 if ( ReadLPCReg(0x20) != 0x3C )
187 if (Chipset
==0x3076) {
188 IRDA_DEBUG(2, "%s(): Chipset = 3076\n", __FUNCTION__
);
190 WriteLPCReg(7,0x0c );
191 temp
=ReadLPCReg(0x30);//check if BIOS Enable Fir
192 if((temp
&0x01)==1) { // BIOS close or no FIR
193 WriteLPCReg(0x1d, 0x82 );
194 WriteLPCReg(0x23,0x18);
195 temp
=ReadLPCReg(0xF0);
197 temp
=(ReadLPCReg(0x74)&0x03); //DMA
199 temp
=(ReadLPCReg(0x74)&0x0C) >> 2;
202 temp
=(ReadLPCReg(0x74)&0x0C) >> 2; //DMA
206 FirIRQ
=(ReadLPCReg(0x70)&0x0f); //IRQ
207 FirIOBase
=ReadLPCReg(0x60 ) << 8; //IO Space :high byte
208 FirIOBase
=FirIOBase
| ReadLPCReg(0x61) ; //low byte
209 FirIOBase
=FirIOBase
;
210 info
.fir_base
=FirIOBase
;
214 pci_read_config_byte(pcidev
,0x40,&bTmp
);
215 pci_write_config_byte(pcidev
,0x40,((bTmp
| 0x08) & 0xfe));
216 pci_read_config_byte(pcidev
,0x42,&bTmp
);
217 pci_write_config_byte(pcidev
,0x42,(bTmp
| 0xf0));
218 pci_write_config_byte(pcidev
,0x5a,0xc0);
219 WriteLPCReg(0x28, 0x70 );
220 if (via_ircc_open(0, &info
,0x3076) == 0)
223 rc
= -ENODEV
; //IR not turn on
224 } else { //Not VT1211
225 IRDA_DEBUG(2, "%s(): Chipset = 3096\n", __FUNCTION__
);
227 pci_read_config_byte(pcidev
,0x67,&bTmp
);//check if BIOS Enable Fir
228 if((bTmp
&0x01)==1) { // BIOS enable FIR
229 //Enable Double DMA clock
230 pci_read_config_byte(pcidev
,0x42,&oldPCI_40
);
231 pci_write_config_byte(pcidev
,0x42,oldPCI_40
| 0x80);
232 pci_read_config_byte(pcidev
,0x40,&oldPCI_40
);
233 pci_write_config_byte(pcidev
,0x40,oldPCI_40
& 0xf7);
234 pci_read_config_byte(pcidev
,0x44,&oldPCI_44
);
235 pci_write_config_byte(pcidev
,0x44,0x4e);
236 //---------- read configuration from Function0 of south bridge
238 pci_read_config_byte(pcidev
,0x44,&bTmp1
); //DMA
239 FirDRQ0
= (bTmp1
& 0x30) >> 4;
240 pci_read_config_byte(pcidev
,0x44,&bTmp1
);
241 FirDRQ1
= (bTmp1
& 0xc0) >> 6;
243 pci_read_config_byte(pcidev
,0x44,&bTmp1
); //DMA
244 FirDRQ0
= (bTmp1
& 0x30) >> 4 ;
247 pci_read_config_byte(pcidev
,0x47,&bTmp1
); //IRQ
248 FirIRQ
= bTmp1
& 0x0f;
250 pci_read_config_byte(pcidev
,0x69,&bTmp
);
251 FirIOBase
= bTmp
<< 8;//hight byte
252 pci_read_config_byte(pcidev
,0x68,&bTmp
);
253 FirIOBase
= (FirIOBase
| bTmp
) & 0xfff0;
254 //-------------------------
255 info
.fir_base
=FirIOBase
;
259 if (via_ircc_open(0, &info
,0x3096) == 0)
262 rc
= -ENODEV
; //IR not turn on !!!!!
265 IRDA_DEBUG(2, "%s(): End - rc = %d\n", __FUNCTION__
, rc
);
270 * Function via_ircc_clean ()
272 * Close all configured chips
275 static void via_ircc_clean(void)
279 IRDA_DEBUG(3, "%s()\n", __FUNCTION__
);
281 for (i
=0; i
< ARRAY_SIZE(dev_self
); i
++) {
283 via_ircc_close(dev_self
[i
]);
287 static void __devexit
via_remove_one (struct pci_dev
*pdev
)
289 IRDA_DEBUG(3, "%s()\n", __FUNCTION__
);
291 /* FIXME : This is ugly. We should use pci_get_drvdata(pdev);
292 * to get our driver instance and call directly via_ircc_close().
293 * See vlsi_ir for details...
297 /* FIXME : This should be in via_ircc_close(), because here we may
298 * theoritically disable still configured devices :-( - Jean II */
299 pci_disable_device(pdev
);
302 static void __exit
via_ircc_cleanup(void)
304 IRDA_DEBUG(3, "%s()\n", __FUNCTION__
);
306 /* FIXME : This should be redundant, as pci_unregister_driver()
307 * should call via_remove_one() on each device.
311 /* Cleanup all instances of the driver */
312 pci_unregister_driver (&via_driver
);
316 * Function via_ircc_open (iobase, irq)
318 * Open driver instance
321 static __devinit
int via_ircc_open(int i
, chipio_t
* info
, unsigned int id
)
323 struct net_device
*dev
;
324 struct via_ircc_cb
*self
;
327 IRDA_DEBUG(3, "%s()\n", __FUNCTION__
);
329 if (i
>= ARRAY_SIZE(dev_self
))
332 /* Allocate new instance of the driver */
333 dev
= alloc_irdadev(sizeof(struct via_ircc_cb
));
339 spin_lock_init(&self
->lock
);
341 /* FIXME : We should store our driver instance in the PCI layer,
342 * using pci_set_drvdata(), not in this array.
343 * See vlsi_ir for details... - Jean II */
344 /* FIXME : 'i' is always 0 (see via_init_one()) :-( - Jean II */
345 /* Need to store self somewhere */
348 /* Initialize Resource */
349 self
->io
.cfg_base
= info
->cfg_base
;
350 self
->io
.fir_base
= info
->fir_base
;
351 self
->io
.irq
= info
->irq
;
352 self
->io
.fir_ext
= CHIP_IO_EXTENT
;
353 self
->io
.dma
= info
->dma
;
354 self
->io
.dma2
= info
->dma2
;
355 self
->io
.fifo_size
= 32;
357 self
->st_fifo
.len
= 0;
358 self
->RxDataReady
= 0;
360 /* Reserve the ioports that we need */
361 if (!request_region(self
->io
.fir_base
, self
->io
.fir_ext
, driver_name
)) {
362 IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n",
363 __FUNCTION__
, self
->io
.fir_base
);
368 /* Initialize QoS for this device */
369 irda_init_max_qos_capabilies(&self
->qos
);
371 /* Check if user has supplied the dongle id or not */
373 dongle_id
= via_ircc_read_dongle_id(self
->io
.fir_base
);
374 self
->io
.dongle_id
= dongle_id
;
376 /* The only value we must override it the baudrate */
377 /* Maximum speeds and capabilities are dongle-dependant. */
378 switch( self
->io
.dongle_id
){
380 self
->qos
.baud_rate
.bits
=
381 IR_9600
| IR_19200
| IR_38400
| IR_57600
| IR_115200
|
382 IR_576000
| IR_1152000
| (IR_4000000
<< 8);
385 self
->qos
.baud_rate
.bits
=
386 IR_9600
| IR_19200
| IR_38400
| IR_57600
| IR_115200
;
390 /* Following was used for testing:
392 * self->qos.baud_rate.bits = IR_9600;
394 * Is is no good, as it prohibits (error-prone) speed-changes.
397 self
->qos
.min_turn_time
.bits
= qos_mtt_bits
;
398 irda_qos_bits_to_value(&self
->qos
);
400 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
401 self
->rx_buff
.truesize
= 14384 + 2048;
402 self
->tx_buff
.truesize
= 14384 + 2048;
404 /* Allocate memory if needed */
406 dma_alloc_coherent(NULL
, self
->rx_buff
.truesize
,
407 &self
->rx_buff_dma
, GFP_KERNEL
);
408 if (self
->rx_buff
.head
== NULL
) {
412 memset(self
->rx_buff
.head
, 0, self
->rx_buff
.truesize
);
415 dma_alloc_coherent(NULL
, self
->tx_buff
.truesize
,
416 &self
->tx_buff_dma
, GFP_KERNEL
);
417 if (self
->tx_buff
.head
== NULL
) {
421 memset(self
->tx_buff
.head
, 0, self
->tx_buff
.truesize
);
423 self
->rx_buff
.in_frame
= FALSE
;
424 self
->rx_buff
.state
= OUTSIDE_FRAME
;
425 self
->tx_buff
.data
= self
->tx_buff
.head
;
426 self
->rx_buff
.data
= self
->rx_buff
.head
;
428 /* Reset Tx queue info */
429 self
->tx_fifo
.len
= self
->tx_fifo
.ptr
= self
->tx_fifo
.free
= 0;
430 self
->tx_fifo
.tail
= self
->tx_buff
.head
;
432 /* Override the network functions we need to use */
433 dev
->hard_start_xmit
= via_ircc_hard_xmit_sir
;
434 dev
->open
= via_ircc_net_open
;
435 dev
->stop
= via_ircc_net_close
;
436 dev
->do_ioctl
= via_ircc_net_ioctl
;
437 dev
->get_stats
= via_ircc_net_get_stats
;
439 err
= register_netdev(dev
);
443 IRDA_MESSAGE("IrDA: Registered device %s (via-ircc)\n", dev
->name
);
445 /* Initialise the hardware..
447 self
->io
.speed
= 9600;
451 dma_free_coherent(NULL
, self
->tx_buff
.truesize
,
452 self
->tx_buff
.head
, self
->tx_buff_dma
);
454 dma_free_coherent(NULL
, self
->rx_buff
.truesize
,
455 self
->rx_buff
.head
, self
->rx_buff_dma
);
457 release_region(self
->io
.fir_base
, self
->io
.fir_ext
);
465 * Function via_ircc_close (self)
467 * Close driver instance
470 static int via_ircc_close(struct via_ircc_cb
*self
)
474 IRDA_DEBUG(3, "%s()\n", __FUNCTION__
);
476 IRDA_ASSERT(self
!= NULL
, return -1;);
478 iobase
= self
->io
.fir_base
;
480 ResetChip(iobase
, 5); //hardware reset.
481 /* Remove netdevice */
482 unregister_netdev(self
->netdev
);
484 /* Release the PORT that this driver is using */
485 IRDA_DEBUG(2, "%s(), Releasing Region %03x\n",
486 __FUNCTION__
, self
->io
.fir_base
);
487 release_region(self
->io
.fir_base
, self
->io
.fir_ext
);
488 if (self
->tx_buff
.head
)
489 dma_free_coherent(NULL
, self
->tx_buff
.truesize
,
490 self
->tx_buff
.head
, self
->tx_buff_dma
);
491 if (self
->rx_buff
.head
)
492 dma_free_coherent(NULL
, self
->rx_buff
.truesize
,
493 self
->rx_buff
.head
, self
->rx_buff_dma
);
494 dev_self
[self
->index
] = NULL
;
496 free_netdev(self
->netdev
);
502 * Function via_hw_init(self)
504 * Returns non-negative on success.
506 * Formerly via_ircc_setup
508 static void via_hw_init(struct via_ircc_cb
*self
)
510 int iobase
= self
->io
.fir_base
;
512 IRDA_DEBUG(3, "%s()\n", __FUNCTION__
);
514 SetMaxRxPacketSize(iobase
, 0x0fff); //set to max:4095
516 EnRXFIFOReadyInt(iobase
, OFF
);
517 EnRXFIFOHalfLevelInt(iobase
, OFF
);
518 EnTXFIFOHalfLevelInt(iobase
, OFF
);
519 EnTXFIFOUnderrunEOMInt(iobase
, ON
);
520 EnTXFIFOReadyInt(iobase
, OFF
);
521 InvertTX(iobase
, OFF
);
522 InvertRX(iobase
, OFF
);
524 if (ReadLPCReg(0x20) == 0x3c)
525 WriteLPCReg(0xF0, 0); // for VT1211
527 EnRXSpecInt(iobase
, ON
);
529 /* The following is basically hwreset */
530 /* If this is the case, why not just call hwreset() ? Jean II */
531 ResetChip(iobase
, 5);
532 EnableDMA(iobase
, OFF
);
533 EnableTX(iobase
, OFF
);
534 EnableRX(iobase
, OFF
);
535 EnRXDMA(iobase
, OFF
);
536 EnTXDMA(iobase
, OFF
);
537 RXStart(iobase
, OFF
);
538 TXStart(iobase
, OFF
);
541 SIRFilter(iobase
, ON
);
545 WriteReg(iobase
, I_ST_CT_0
, 0x00);
546 SetBaudRate(iobase
, 9600);
547 SetPulseWidth(iobase
, 12);
548 SetSendPreambleCount(iobase
, 0);
550 self
->io
.speed
= 9600;
551 self
->st_fifo
.len
= 0;
553 via_ircc_change_dongle_speed(iobase
, self
->io
.speed
,
556 WriteReg(iobase
, I_ST_CT_0
, 0x80);
560 * Function via_ircc_read_dongle_id (void)
563 static int via_ircc_read_dongle_id(int iobase
)
565 int dongle_id
= 9; /* Default to IBM */
567 IRDA_ERROR("via-ircc: dongle probing not supported, please specify dongle_id module parameter.\n");
572 * Function via_ircc_change_dongle_speed (iobase, speed, dongle_id)
573 * Change speed of the attach dongle
574 * only implement two type of dongle currently.
576 static void via_ircc_change_dongle_speed(int iobase
, int speed
,
581 /* speed is unused, as we use IsSIROn()/IsMIROn() */
584 IRDA_DEBUG(1, "%s(): change_dongle_speed to %d for 0x%x, %d\n",
585 __FUNCTION__
, speed
, iobase
, dongle_id
);
589 /* Note: The dongle_id's listed here are derived from
592 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
593 UseOneRX(iobase
, ON
); // use one RX pin RX1,RX2
594 InvertTX(iobase
, OFF
);
595 InvertRX(iobase
, OFF
);
597 EnRX2(iobase
, ON
); //sir to rx2
598 EnGPIOtoRX2(iobase
, OFF
);
600 if (IsSIROn(iobase
)) { //sir
602 SlowIRRXLowActive(iobase
, ON
);
604 SlowIRRXLowActive(iobase
, OFF
);
606 if (IsMIROn(iobase
)) { //mir
608 SlowIRRXLowActive(iobase
, OFF
);
611 if (IsFIROn(iobase
)) { //fir
613 SlowIRRXLowActive(iobase
, OFF
);
620 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
621 UseOneRX(iobase
, ON
); //use ONE RX....RX1
622 InvertTX(iobase
, OFF
);
623 InvertRX(iobase
, OFF
); // invert RX pin
626 EnGPIOtoRX2(iobase
, OFF
);
627 if (IsSIROn(iobase
)) { //sir
629 SlowIRRXLowActive(iobase
, ON
);
632 SlowIRRXLowActive(iobase
, OFF
);
634 if (IsMIROn(iobase
)) { //mir
636 SlowIRRXLowActive(iobase
, OFF
);
639 SlowIRRXLowActive(iobase
, ON
);
641 if (IsFIROn(iobase
)) { //fir
643 SlowIRRXLowActive(iobase
, OFF
);
648 SlowIRRXLowActive(iobase
, ON
);
651 WriteTX(iobase
, OFF
);
657 UseOneRX(iobase
, OFF
); // use two RX pin RX1,RX2
658 InvertTX(iobase
, OFF
);
659 InvertRX(iobase
, OFF
);
660 SlowIRRXLowActive(iobase
, OFF
);
661 if (IsSIROn(iobase
)) { //sir
662 EnGPIOtoRX2(iobase
, OFF
);
663 WriteGIO(iobase
, OFF
);
664 EnRX2(iobase
, OFF
); //sir to rx2
666 EnGPIOtoRX2(iobase
, OFF
);
667 WriteGIO(iobase
, OFF
);
668 EnRX2(iobase
, OFF
); //fir to rx
672 case 0x11: /* Temic TFDS4500 */
674 IRDA_DEBUG(2, "%s: Temic TFDS4500: One RX pin, TX normal, RX inverted.\n", __FUNCTION__
);
676 UseOneRX(iobase
, ON
); //use ONE RX....RX1
677 InvertTX(iobase
, OFF
);
678 InvertRX(iobase
, ON
); // invert RX pin
680 EnRX2(iobase
, ON
); //sir to rx2
681 EnGPIOtoRX2(iobase
, OFF
);
683 if( IsSIROn(iobase
) ){ //sir
686 SlowIRRXLowActive(iobase
, ON
);
689 SlowIRRXLowActive(iobase
, OFF
);
692 IRDA_DEBUG(0, "%s: Warning: TFDS4500 not running in SIR mode !\n", __FUNCTION__
);
696 case 0x0ff: /* Vishay */
699 else if (IsMIROn(iobase
))
701 else if (IsFIROn(iobase
))
703 else if (IsVFIROn(iobase
))
705 SI_SetMode(iobase
, mode
);
709 IRDA_ERROR("%s: Error: dongle_id %d unsupported !\n",
710 __FUNCTION__
, dongle_id
);
715 * Function via_ircc_change_speed (self, baud)
717 * Change the speed of the device
720 static void via_ircc_change_speed(struct via_ircc_cb
*self
, __u32 speed
)
722 struct net_device
*dev
= self
->netdev
;
726 iobase
= self
->io
.fir_base
;
727 /* Update accounting for new speed */
728 self
->io
.speed
= speed
;
729 IRDA_DEBUG(1, "%s: change_speed to %d bps.\n", __FUNCTION__
, speed
);
731 WriteReg(iobase
, I_ST_CT_0
, 0x0);
733 /* Controller mode sellection */
741 value
= (115200/speed
)-1;
746 /* FIXME: this can't be right, as it's the same as 115200,
747 * and 576000 is MIR, not SIR. */
760 SetPulseWidth(iobase
, 0);
761 SetSendPreambleCount(iobase
, 14);
775 /* Set baudrate to 0x19[2..7] */
776 bTmp
= (ReadReg(iobase
, I_CF_H_1
) & 0x03);
778 WriteReg(iobase
, I_CF_H_1
, bTmp
);
780 /* Some dongles may need to be informed about speed changes. */
781 via_ircc_change_dongle_speed(iobase
, speed
, self
->io
.dongle_id
);
783 /* Set FIFO size to 64 */
787 WriteReg(iobase
, I_ST_CT_0
, 0x80);
789 // EnTXFIFOHalfLevelInt(iobase,ON);
791 /* Enable some interrupts so we can receive frames */
792 //EnAllInt(iobase,ON);
794 if (IsSIROn(iobase
)) {
795 SIRFilter(iobase
, ON
);
796 SIRRecvAny(iobase
, ON
);
798 SIRFilter(iobase
, OFF
);
799 SIRRecvAny(iobase
, OFF
);
802 if (speed
> 115200) {
803 /* Install FIR xmit handler */
804 dev
->hard_start_xmit
= via_ircc_hard_xmit_fir
;
805 via_ircc_dma_receive(self
);
807 /* Install SIR xmit handler */
808 dev
->hard_start_xmit
= via_ircc_hard_xmit_sir
;
810 netif_wake_queue(dev
);
814 * Function via_ircc_hard_xmit (skb, dev)
816 * Transmit the frame!
819 static int via_ircc_hard_xmit_sir(struct sk_buff
*skb
,
820 struct net_device
*dev
)
822 struct via_ircc_cb
*self
;
827 self
= (struct via_ircc_cb
*) dev
->priv
;
828 IRDA_ASSERT(self
!= NULL
, return 0;);
829 iobase
= self
->io
.fir_base
;
831 netif_stop_queue(dev
);
832 /* Check if we need to change the speed */
833 speed
= irda_get_next_speed(skb
);
834 if ((speed
!= self
->io
.speed
) && (speed
!= -1)) {
835 /* Check for empty frame */
837 via_ircc_change_speed(self
, speed
);
838 dev
->trans_start
= jiffies
;
842 self
->new_speed
= speed
;
846 SIRFilter(iobase
, ON
);
850 WriteReg(iobase
, I_ST_CT_0
, 0x00);
852 spin_lock_irqsave(&self
->lock
, flags
);
853 self
->tx_buff
.data
= self
->tx_buff
.head
;
855 async_wrap_skb(skb
, self
->tx_buff
.data
,
856 self
->tx_buff
.truesize
);
858 self
->stats
.tx_bytes
+= self
->tx_buff
.len
;
859 /* Send this frame with old speed */
860 SetBaudRate(iobase
, self
->io
.speed
);
861 SetPulseWidth(iobase
, 12);
862 SetSendPreambleCount(iobase
, 0);
863 WriteReg(iobase
, I_ST_CT_0
, 0x80);
865 EnableTX(iobase
, ON
);
866 EnableRX(iobase
, OFF
);
868 ResetChip(iobase
, 0);
869 ResetChip(iobase
, 1);
870 ResetChip(iobase
, 2);
871 ResetChip(iobase
, 3);
872 ResetChip(iobase
, 4);
874 EnAllInt(iobase
, ON
);
876 EnRXDMA(iobase
, OFF
);
878 irda_setup_dma(self
->io
.dma
, self
->tx_buff_dma
, self
->tx_buff
.len
,
881 SetSendByte(iobase
, self
->tx_buff
.len
);
882 RXStart(iobase
, OFF
);
885 dev
->trans_start
= jiffies
;
886 spin_unlock_irqrestore(&self
->lock
, flags
);
891 static int via_ircc_hard_xmit_fir(struct sk_buff
*skb
,
892 struct net_device
*dev
)
894 struct via_ircc_cb
*self
;
899 self
= (struct via_ircc_cb
*) dev
->priv
;
900 iobase
= self
->io
.fir_base
;
902 if (self
->st_fifo
.len
)
904 if (self
->chip_id
== 0x3076)
908 netif_stop_queue(dev
);
909 speed
= irda_get_next_speed(skb
);
910 if ((speed
!= self
->io
.speed
) && (speed
!= -1)) {
912 via_ircc_change_speed(self
, speed
);
913 dev
->trans_start
= jiffies
;
917 self
->new_speed
= speed
;
919 spin_lock_irqsave(&self
->lock
, flags
);
920 self
->tx_fifo
.queue
[self
->tx_fifo
.free
].start
= self
->tx_fifo
.tail
;
921 self
->tx_fifo
.queue
[self
->tx_fifo
.free
].len
= skb
->len
;
923 self
->tx_fifo
.tail
+= skb
->len
;
924 self
->stats
.tx_bytes
+= skb
->len
;
925 skb_copy_from_linear_data(skb
,
926 self
->tx_fifo
.queue
[self
->tx_fifo
.free
].start
, skb
->len
);
928 self
->tx_fifo
.free
++;
929 //F01 if (self->tx_fifo.len == 1) {
930 via_ircc_dma_xmit(self
, iobase
);
932 //F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) netif_wake_queue(self->netdev);
933 dev
->trans_start
= jiffies
;
935 spin_unlock_irqrestore(&self
->lock
, flags
);
940 static int via_ircc_dma_xmit(struct via_ircc_cb
*self
, u16 iobase
)
942 EnTXDMA(iobase
, OFF
);
943 self
->io
.direction
= IO_XMIT
;
945 EnableTX(iobase
, ON
);
946 EnableRX(iobase
, OFF
);
947 ResetChip(iobase
, 0);
948 ResetChip(iobase
, 1);
949 ResetChip(iobase
, 2);
950 ResetChip(iobase
, 3);
951 ResetChip(iobase
, 4);
952 EnAllInt(iobase
, ON
);
954 EnRXDMA(iobase
, OFF
);
955 irda_setup_dma(self
->io
.dma
,
956 ((u8
*)self
->tx_fifo
.queue
[self
->tx_fifo
.ptr
].start
-
957 self
->tx_buff
.head
) + self
->tx_buff_dma
,
958 self
->tx_fifo
.queue
[self
->tx_fifo
.ptr
].len
, DMA_TX_MODE
);
959 IRDA_DEBUG(1, "%s: tx_fifo.ptr=%x,len=%x,tx_fifo.len=%x..\n",
960 __FUNCTION__
, self
->tx_fifo
.ptr
,
961 self
->tx_fifo
.queue
[self
->tx_fifo
.ptr
].len
,
964 SetSendByte(iobase
, self
->tx_fifo
.queue
[self
->tx_fifo
.ptr
].len
);
965 RXStart(iobase
, OFF
);
972 * Function via_ircc_dma_xmit_complete (self)
974 * The transfer of a frame in finished. This function will only be called
975 * by the interrupt handler
978 static int via_ircc_dma_xmit_complete(struct via_ircc_cb
*self
)
984 IRDA_DEBUG(3, "%s()\n", __FUNCTION__
);
986 iobase
= self
->io
.fir_base
;
988 // DisableDmaChannel(self->io.dma);
989 /* Check for underrrun! */
990 /* Clear bit, by writing 1 into it */
991 Tx_status
= GetTXStatus(iobase
);
992 if (Tx_status
& 0x08) {
993 self
->stats
.tx_errors
++;
994 self
->stats
.tx_fifo_errors
++;
996 // how to clear underrrun ?
998 self
->stats
.tx_packets
++;
999 ResetChip(iobase
, 3);
1000 ResetChip(iobase
, 4);
1002 /* Check if we need to change the speed */
1003 if (self
->new_speed
) {
1004 via_ircc_change_speed(self
, self
->new_speed
);
1005 self
->new_speed
= 0;
1008 /* Finished with this frame, so prepare for next */
1009 if (IsFIROn(iobase
)) {
1010 if (self
->tx_fifo
.len
) {
1011 self
->tx_fifo
.len
--;
1012 self
->tx_fifo
.ptr
++;
1016 "%s: tx_fifo.len=%x ,tx_fifo.ptr=%x,tx_fifo.free=%x...\n",
1018 self
->tx_fifo
.len
, self
->tx_fifo
.ptr
, self
->tx_fifo
.free
);
1020 // Any frames to be sent back-to-back?
1021 if (self->tx_fifo.len) {
1022 // Not finished yet!
1023 via_ircc_dma_xmit(self, iobase);
1027 // Reset Tx FIFO info
1028 self
->tx_fifo
.len
= self
->tx_fifo
.ptr
= self
->tx_fifo
.free
= 0;
1029 self
->tx_fifo
.tail
= self
->tx_buff
.head
;
1032 // Make sure we have room for more frames
1033 //F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) {
1034 // Not busy transmitting anymore
1035 // Tell the network layer, that we can accept more frames
1036 netif_wake_queue(self
->netdev
);
1042 * Function via_ircc_dma_receive (self)
1044 * Set configuration for receive a frame.
1047 static int via_ircc_dma_receive(struct via_ircc_cb
*self
)
1051 iobase
= self
->io
.fir_base
;
1053 IRDA_DEBUG(3, "%s()\n", __FUNCTION__
);
1055 self
->tx_fifo
.len
= self
->tx_fifo
.ptr
= self
->tx_fifo
.free
= 0;
1056 self
->tx_fifo
.tail
= self
->tx_buff
.head
;
1057 self
->RxDataReady
= 0;
1058 self
->io
.direction
= IO_RECV
;
1059 self
->rx_buff
.data
= self
->rx_buff
.head
;
1060 self
->st_fifo
.len
= self
->st_fifo
.pending_bytes
= 0;
1061 self
->st_fifo
.tail
= self
->st_fifo
.head
= 0;
1064 EnableTX(iobase
, OFF
);
1065 EnableRX(iobase
, ON
);
1067 ResetChip(iobase
, 0);
1068 ResetChip(iobase
, 1);
1069 ResetChip(iobase
, 2);
1070 ResetChip(iobase
, 3);
1071 ResetChip(iobase
, 4);
1073 EnAllInt(iobase
, ON
);
1074 EnTXDMA(iobase
, OFF
);
1075 EnRXDMA(iobase
, ON
);
1076 irda_setup_dma(self
->io
.dma2
, self
->rx_buff_dma
,
1077 self
->rx_buff
.truesize
, DMA_RX_MODE
);
1078 TXStart(iobase
, OFF
);
1079 RXStart(iobase
, ON
);
1085 * Function via_ircc_dma_receive_complete (self)
1087 * Controller Finished with receiving frames,
1088 * and this routine is call by ISR
1091 static int via_ircc_dma_receive_complete(struct via_ircc_cb
*self
,
1094 struct st_fifo
*st_fifo
;
1095 struct sk_buff
*skb
;
1099 iobase
= self
->io
.fir_base
;
1100 st_fifo
= &self
->st_fifo
;
1102 if (self
->io
.speed
< 4000000) { //Speed below FIR
1103 len
= GetRecvByte(iobase
, self
);
1104 skb
= dev_alloc_skb(len
+ 1);
1107 // Make sure IP header gets aligned
1108 skb_reserve(skb
, 1);
1109 skb_put(skb
, len
- 2);
1110 if (self
->chip_id
== 0x3076) {
1111 for (i
= 0; i
< len
- 2; i
++)
1112 skb
->data
[i
] = self
->rx_buff
.data
[i
* 2];
1114 if (self
->chip_id
== 0x3096) {
1115 for (i
= 0; i
< len
- 2; i
++)
1117 self
->rx_buff
.data
[i
];
1120 // Move to next frame
1121 self
->rx_buff
.data
+= len
;
1122 self
->stats
.rx_bytes
+= len
;
1123 self
->stats
.rx_packets
++;
1124 skb
->dev
= self
->netdev
;
1125 skb_reset_mac_header(skb
);
1126 skb
->protocol
= htons(ETH_P_IRDA
);
1132 len
= GetRecvByte(iobase
, self
);
1134 return TRUE
; //interrupt only, data maybe move by RxT
1135 if (((len
- 4) < 2) || ((len
- 4) > 2048)) {
1136 IRDA_DEBUG(1, "%s(): Trouble:len=%x,CurCount=%x,LastCount=%x..\n",
1137 __FUNCTION__
, len
, RxCurCount(iobase
, self
),
1142 IRDA_DEBUG(2, "%s(): fifo.len=%x,len=%x,CurCount=%x..\n",
1144 st_fifo
->len
, len
- 4, RxCurCount(iobase
, self
));
1146 st_fifo
->entries
[st_fifo
->tail
].status
= status
;
1147 st_fifo
->entries
[st_fifo
->tail
].len
= len
;
1148 st_fifo
->pending_bytes
+= len
;
1151 if (st_fifo
->tail
> MAX_RX_WINDOW
)
1153 self
->RxDataReady
= 0;
1155 // It maybe have MAX_RX_WINDOW package receive by
1156 // receive_complete before Timer IRQ
1158 if (st_fifo->len < (MAX_RX_WINDOW+2 )) {
1164 EnableRX(iobase
, OFF
);
1165 EnRXDMA(iobase
, OFF
);
1166 RXStart(iobase
, OFF
);
1168 // Put this entry back in fifo
1169 if (st_fifo
->head
> MAX_RX_WINDOW
)
1171 status
= st_fifo
->entries
[st_fifo
->head
].status
;
1172 len
= st_fifo
->entries
[st_fifo
->head
].len
;
1176 skb
= dev_alloc_skb(len
+ 1 - 4);
1178 * if frame size,data ptr,or skb ptr are wrong ,the get next
1181 if ((skb
== NULL
) || (skb
->data
== NULL
)
1182 || (self
->rx_buff
.data
== NULL
) || (len
< 6)) {
1183 self
->stats
.rx_dropped
++;
1186 skb_reserve(skb
, 1);
1187 skb_put(skb
, len
- 4);
1189 skb_copy_to_linear_data(skb
, self
->rx_buff
.data
, len
- 4);
1190 IRDA_DEBUG(2, "%s(): len=%x.rx_buff=%p\n", __FUNCTION__
,
1191 len
- 4, self
->rx_buff
.data
);
1193 // Move to next frame
1194 self
->rx_buff
.data
+= len
;
1195 self
->stats
.rx_bytes
+= len
;
1196 self
->stats
.rx_packets
++;
1197 skb
->dev
= self
->netdev
;
1198 skb_reset_mac_header(skb
);
1199 skb
->protocol
= htons(ETH_P_IRDA
);
1209 * if frame is received , but no INT ,then use this routine to upload frame.
1211 static int upload_rxdata(struct via_ircc_cb
*self
, int iobase
)
1213 struct sk_buff
*skb
;
1215 struct st_fifo
*st_fifo
;
1216 st_fifo
= &self
->st_fifo
;
1218 len
= GetRecvByte(iobase
, self
);
1220 IRDA_DEBUG(2, "%s(): len=%x\n", __FUNCTION__
, len
);
1222 if ((len
- 4) < 2) {
1223 self
->stats
.rx_dropped
++;
1227 skb
= dev_alloc_skb(len
+ 1);
1229 self
->stats
.rx_dropped
++;
1232 skb_reserve(skb
, 1);
1233 skb_put(skb
, len
- 4 + 1);
1234 skb_copy_to_linear_data(skb
, self
->rx_buff
.data
, len
- 4 + 1);
1237 if (st_fifo
->tail
> MAX_RX_WINDOW
)
1239 // Move to next frame
1240 self
->rx_buff
.data
+= len
;
1241 self
->stats
.rx_bytes
+= len
;
1242 self
->stats
.rx_packets
++;
1243 skb
->dev
= self
->netdev
;
1244 skb_reset_mac_header(skb
);
1245 skb
->protocol
= htons(ETH_P_IRDA
);
1247 if (st_fifo
->len
< (MAX_RX_WINDOW
+ 2)) {
1248 RXStart(iobase
, ON
);
1250 EnableRX(iobase
, OFF
);
1251 EnRXDMA(iobase
, OFF
);
1252 RXStart(iobase
, OFF
);
1258 * Implement back to back receive , use this routine to upload data.
1261 static int RxTimerHandler(struct via_ircc_cb
*self
, int iobase
)
1263 struct st_fifo
*st_fifo
;
1264 struct sk_buff
*skb
;
1268 st_fifo
= &self
->st_fifo
;
1270 if (CkRxRecv(iobase
, self
)) {
1271 // if still receiving ,then return ,don't upload frame
1272 self
->RetryCount
= 0;
1273 SetTimer(iobase
, 20);
1274 self
->RxDataReady
++;
1279 if ((self
->RetryCount
>= 1) ||
1280 ((st_fifo
->pending_bytes
+ 2048) > self
->rx_buff
.truesize
)
1281 || (st_fifo
->len
>= (MAX_RX_WINDOW
))) {
1282 while (st_fifo
->len
> 0) { //upload frame
1283 // Put this entry back in fifo
1284 if (st_fifo
->head
> MAX_RX_WINDOW
)
1286 status
= st_fifo
->entries
[st_fifo
->head
].status
;
1287 len
= st_fifo
->entries
[st_fifo
->head
].len
;
1291 skb
= dev_alloc_skb(len
+ 1 - 4);
1293 * if frame size, data ptr, or skb ptr are wrong,
1294 * then get next entry.
1296 if ((skb
== NULL
) || (skb
->data
== NULL
)
1297 || (self
->rx_buff
.data
== NULL
) || (len
< 6)) {
1298 self
->stats
.rx_dropped
++;
1301 skb_reserve(skb
, 1);
1302 skb_put(skb
, len
- 4);
1303 skb_copy_to_linear_data(skb
, self
->rx_buff
.data
, len
- 4);
1305 IRDA_DEBUG(2, "%s(): len=%x.head=%x\n", __FUNCTION__
,
1306 len
- 4, st_fifo
->head
);
1308 // Move to next frame
1309 self
->rx_buff
.data
+= len
;
1310 self
->stats
.rx_bytes
+= len
;
1311 self
->stats
.rx_packets
++;
1312 skb
->dev
= self
->netdev
;
1313 skb_reset_mac_header(skb
);
1314 skb
->protocol
= htons(ETH_P_IRDA
);
1317 self
->RetryCount
= 0;
1320 "%s(): End of upload HostStatus=%x,RxStatus=%x\n",
1322 GetHostStatus(iobase
), GetRXStatus(iobase
));
1325 * if frame is receive complete at this routine ,then upload
1328 if ((GetRXStatus(iobase
) & 0x10)
1329 && (RxCurCount(iobase
, self
) != self
->RxLastCount
)) {
1330 upload_rxdata(self
, iobase
);
1331 if (irda_device_txqueue_empty(self
->netdev
))
1332 via_ircc_dma_receive(self
);
1334 } // timer detect complete
1336 SetTimer(iobase
, 4);
1344 * Function via_ircc_interrupt (irq, dev_id)
1346 * An interrupt from the chip has arrived. Time to do some work
1349 static irqreturn_t
via_ircc_interrupt(int dummy
, void *dev_id
)
1351 struct net_device
*dev
= dev_id
;
1352 struct via_ircc_cb
*self
= dev
->priv
;
1354 u8 iHostIntType
, iRxIntType
, iTxIntType
;
1356 iobase
= self
->io
.fir_base
;
1357 spin_lock(&self
->lock
);
1358 iHostIntType
= GetHostStatus(iobase
);
1360 IRDA_DEBUG(4, "%s(): iHostIntType %02x: %s %s %s %02x\n",
1361 __FUNCTION__
, iHostIntType
,
1362 (iHostIntType
& 0x40) ? "Timer" : "",
1363 (iHostIntType
& 0x20) ? "Tx" : "",
1364 (iHostIntType
& 0x10) ? "Rx" : "",
1365 (iHostIntType
& 0x0e) >> 1);
1367 if ((iHostIntType
& 0x40) != 0) { //Timer Event
1368 self
->EventFlag
.TimeOut
++;
1369 ClearTimerInt(iobase
, 1);
1370 if (self
->io
.direction
== IO_XMIT
) {
1371 via_ircc_dma_xmit(self
, iobase
);
1373 if (self
->io
.direction
== IO_RECV
) {
1375 * frame ready hold too long, must reset.
1377 if (self
->RxDataReady
> 30) {
1379 if (irda_device_txqueue_empty(self
->netdev
)) {
1380 via_ircc_dma_receive(self
);
1382 } else { // call this to upload frame.
1383 RxTimerHandler(self
, iobase
);
1387 if ((iHostIntType
& 0x20) != 0) { //Tx Event
1388 iTxIntType
= GetTXStatus(iobase
);
1390 IRDA_DEBUG(4, "%s(): iTxIntType %02x: %s %s %s %s\n",
1391 __FUNCTION__
, iTxIntType
,
1392 (iTxIntType
& 0x08) ? "FIFO underr." : "",
1393 (iTxIntType
& 0x04) ? "EOM" : "",
1394 (iTxIntType
& 0x02) ? "FIFO ready" : "",
1395 (iTxIntType
& 0x01) ? "Early EOM" : "");
1397 if (iTxIntType
& 0x4) {
1398 self
->EventFlag
.EOMessage
++; // read and will auto clean
1399 if (via_ircc_dma_xmit_complete(self
)) {
1400 if (irda_device_txqueue_empty
1402 via_ircc_dma_receive(self
);
1405 self
->EventFlag
.Unknown
++;
1409 //----------------------------------------
1410 if ((iHostIntType
& 0x10) != 0) { //Rx Event
1411 /* Check if DMA has finished */
1412 iRxIntType
= GetRXStatus(iobase
);
1414 IRDA_DEBUG(4, "%s(): iRxIntType %02x: %s %s %s %s %s %s %s\n",
1415 __FUNCTION__
, iRxIntType
,
1416 (iRxIntType
& 0x80) ? "PHY err." : "",
1417 (iRxIntType
& 0x40) ? "CRC err" : "",
1418 (iRxIntType
& 0x20) ? "FIFO overr." : "",
1419 (iRxIntType
& 0x10) ? "EOF" : "",
1420 (iRxIntType
& 0x08) ? "RxData" : "",
1421 (iRxIntType
& 0x02) ? "RxMaxLen" : "",
1422 (iRxIntType
& 0x01) ? "SIR bad" : "");
1424 IRDA_DEBUG(3, "%s(): RxIRQ =0\n", __FUNCTION__
);
1426 if (iRxIntType
& 0x10) {
1427 if (via_ircc_dma_receive_complete(self
, iobase
)) {
1428 //F01 if(!(IsFIROn(iobase))) via_ircc_dma_receive(self);
1429 via_ircc_dma_receive(self
);
1433 IRDA_DEBUG(4, "%s(): RxIRQ ERR:iRxIntType=%x,HostIntType=%x,CurCount=%x,RxLastCount=%x_____\n",
1434 __FUNCTION__
, iRxIntType
, iHostIntType
,
1435 RxCurCount(iobase
, self
),
1438 if (iRxIntType
& 0x20) { //FIFO OverRun ERR
1439 ResetChip(iobase
, 0);
1440 ResetChip(iobase
, 1);
1441 } else { //PHY,CRC ERR
1443 if (iRxIntType
!= 0x08)
1444 hwreset(self
); //F01
1446 via_ircc_dma_receive(self
);
1450 spin_unlock(&self
->lock
);
1451 return IRQ_RETVAL(iHostIntType
);
1454 static void hwreset(struct via_ircc_cb
*self
)
1457 iobase
= self
->io
.fir_base
;
1459 IRDA_DEBUG(3, "%s()\n", __FUNCTION__
);
1461 ResetChip(iobase
, 5);
1462 EnableDMA(iobase
, OFF
);
1463 EnableTX(iobase
, OFF
);
1464 EnableRX(iobase
, OFF
);
1465 EnRXDMA(iobase
, OFF
);
1466 EnTXDMA(iobase
, OFF
);
1467 RXStart(iobase
, OFF
);
1468 TXStart(iobase
, OFF
);
1471 SIRFilter(iobase
, ON
);
1475 WriteReg(iobase
, I_ST_CT_0
, 0x00);
1476 SetBaudRate(iobase
, 9600);
1477 SetPulseWidth(iobase
, 12);
1478 SetSendPreambleCount(iobase
, 0);
1479 WriteReg(iobase
, I_ST_CT_0
, 0x80);
1481 /* Restore speed. */
1482 via_ircc_change_speed(self
, self
->io
.speed
);
1484 self
->st_fifo
.len
= 0;
1488 * Function via_ircc_is_receiving (self)
1490 * Return TRUE is we are currently receiving a frame
1493 static int via_ircc_is_receiving(struct via_ircc_cb
*self
)
1498 IRDA_ASSERT(self
!= NULL
, return FALSE
;);
1500 iobase
= self
->io
.fir_base
;
1501 if (CkRxRecv(iobase
, self
))
1504 IRDA_DEBUG(2, "%s(): status=%x....\n", __FUNCTION__
, status
);
1511 * Function via_ircc_net_open (dev)
1516 static int via_ircc_net_open(struct net_device
*dev
)
1518 struct via_ircc_cb
*self
;
1522 IRDA_DEBUG(3, "%s()\n", __FUNCTION__
);
1524 IRDA_ASSERT(dev
!= NULL
, return -1;);
1525 self
= (struct via_ircc_cb
*) dev
->priv
;
1526 self
->stats
.rx_packets
= 0;
1527 IRDA_ASSERT(self
!= NULL
, return 0;);
1528 iobase
= self
->io
.fir_base
;
1529 if (request_irq(self
->io
.irq
, via_ircc_interrupt
, 0, dev
->name
, dev
)) {
1530 IRDA_WARNING("%s, unable to allocate irq=%d\n", driver_name
,
1535 * Always allocate the DMA channel after the IRQ, and clean up on
1538 if (request_dma(self
->io
.dma
, dev
->name
)) {
1539 IRDA_WARNING("%s, unable to allocate dma=%d\n", driver_name
,
1541 free_irq(self
->io
.irq
, self
);
1544 if (self
->io
.dma2
!= self
->io
.dma
) {
1545 if (request_dma(self
->io
.dma2
, dev
->name
)) {
1546 IRDA_WARNING("%s, unable to allocate dma2=%d\n",
1547 driver_name
, self
->io
.dma2
);
1548 free_irq(self
->io
.irq
, self
);
1554 /* turn on interrupts */
1555 EnAllInt(iobase
, ON
);
1556 EnInternalLoop(iobase
, OFF
);
1557 EnExternalLoop(iobase
, OFF
);
1560 via_ircc_dma_receive(self
);
1562 /* Ready to play! */
1563 netif_start_queue(dev
);
1566 * Open new IrLAP layer instance, now that everything should be
1567 * initialized properly
1569 sprintf(hwname
, "VIA @ 0x%x", iobase
);
1570 self
->irlap
= irlap_open(dev
, &self
->qos
, hwname
);
1572 self
->RxLastCount
= 0;
1578 * Function via_ircc_net_close (dev)
1583 static int via_ircc_net_close(struct net_device
*dev
)
1585 struct via_ircc_cb
*self
;
1588 IRDA_DEBUG(3, "%s()\n", __FUNCTION__
);
1590 IRDA_ASSERT(dev
!= NULL
, return -1;);
1591 self
= (struct via_ircc_cb
*) dev
->priv
;
1592 IRDA_ASSERT(self
!= NULL
, return 0;);
1595 netif_stop_queue(dev
);
1596 /* Stop and remove instance of IrLAP */
1598 irlap_close(self
->irlap
);
1600 iobase
= self
->io
.fir_base
;
1601 EnTXDMA(iobase
, OFF
);
1602 EnRXDMA(iobase
, OFF
);
1603 DisableDmaChannel(self
->io
.dma
);
1605 /* Disable interrupts */
1606 EnAllInt(iobase
, OFF
);
1607 free_irq(self
->io
.irq
, dev
);
1608 free_dma(self
->io
.dma
);
1614 * Function via_ircc_net_ioctl (dev, rq, cmd)
1616 * Process IOCTL commands for this device
1619 static int via_ircc_net_ioctl(struct net_device
*dev
, struct ifreq
*rq
,
1622 struct if_irda_req
*irq
= (struct if_irda_req
*) rq
;
1623 struct via_ircc_cb
*self
;
1624 unsigned long flags
;
1627 IRDA_ASSERT(dev
!= NULL
, return -1;);
1629 IRDA_ASSERT(self
!= NULL
, return -1;);
1630 IRDA_DEBUG(1, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__
, dev
->name
,
1632 /* Disable interrupts & save flags */
1633 spin_lock_irqsave(&self
->lock
, flags
);
1635 case SIOCSBANDWIDTH
: /* Set bandwidth */
1636 if (!capable(CAP_NET_ADMIN
)) {
1640 via_ircc_change_speed(self
, irq
->ifr_baudrate
);
1642 case SIOCSMEDIABUSY
: /* Set media busy */
1643 if (!capable(CAP_NET_ADMIN
)) {
1647 irda_device_set_media_busy(self
->netdev
, TRUE
);
1649 case SIOCGRECEIVING
: /* Check if we are receiving right now */
1650 irq
->ifr_receiving
= via_ircc_is_receiving(self
);
1656 spin_unlock_irqrestore(&self
->lock
, flags
);
1660 static struct net_device_stats
*via_ircc_net_get_stats(struct net_device
1663 struct via_ircc_cb
*self
= (struct via_ircc_cb
*) dev
->priv
;
1665 return &self
->stats
;
1668 MODULE_AUTHOR("VIA Technologies,inc");
1669 MODULE_DESCRIPTION("VIA IrDA Device Driver");
1670 MODULE_LICENSE("GPL");
1672 module_init(via_ircc_init
);
1673 module_exit(via_ircc_cleanup
);