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ia64/kvm: compilation fix. export account_system_vtime.
[pv_ops_mirror.git] / drivers / net / wireless / iwlwifi / iwl-3945.c
blob62a3d8f8563ed07cbd7d6a743831dfdc66bf78cb
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/version.h>
30 #include <linux/init.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/delay.h>
34 #include <linux/skbuff.h>
35 #include <linux/netdevice.h>
36 #include <linux/wireless.h>
37 #include <linux/firmware.h>
38 #include <linux/etherdevice.h>
39 #include <asm/unaligned.h>
40 #include <net/mac80211.h>
41
42 #include "iwl-3945-core.h"
43 #include "iwl-3945.h"
44 #include "iwl-helpers.h"
45 #include "iwl-3945-rs.h"
46
47 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np) \
48 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
49 IWL_RATE_##r##M_IEEE, \
50 IWL_RATE_##ip##M_INDEX, \
51 IWL_RATE_##in##M_INDEX, \
52 IWL_RATE_##rp##M_INDEX, \
53 IWL_RATE_##rn##M_INDEX, \
54 IWL_RATE_##pp##M_INDEX, \
55 IWL_RATE_##np##M_INDEX, \
56 IWL_RATE_##r##M_INDEX_TABLE, \
57 IWL_RATE_##ip##M_INDEX_TABLE }
58
59 /*
60 * Parameter order:
61 * rate, prev rate, next rate, prev tgg rate, next tgg rate
62 *
63 * If there isn't a valid next or previous rate then INV is used which
64 * maps to IWL_RATE_INVALID
65 *
66 */
67 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
68 IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2), /* 1mbps */
69 IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5), /* 2mbps */
70 IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11), /*5.5mbps */
71 IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18), /* 11mbps */
72 IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11), /* 6mbps */
73 IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11), /* 9mbps */
74 IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18), /* 12mbps */
75 IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24), /* 18mbps */
76 IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36), /* 24mbps */
77 IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48), /* 36mbps */
78 IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54), /* 48mbps */
79 IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
80 };
81
82 /* 1 = enable the iwl3945_disable_events() function */
83 #define IWL_EVT_DISABLE (0)
84 #define IWL_EVT_DISABLE_SIZE (1532/32)
85
86 /**
87 * iwl3945_disable_events - Disable selected events in uCode event log
88 *
89 * Disable an event by writing "1"s into "disable"
90 * bitmap in SRAM. Bit position corresponds to Event # (id/type).
91 * Default values of 0 enable uCode events to be logged.
92 * Use for only special debugging. This function is just a placeholder as-is,
93 * you'll need to provide the special bits! ...
94 * ... and set IWL_EVT_DISABLE to 1. */
95 void iwl3945_disable_events(struct iwl3945_priv *priv)
96 {
97 int ret;
98 int i;
99 u32 base; /* SRAM address of event log header */
100 u32 disable_ptr; /* SRAM address of event-disable bitmap array */
101 u32 array_size; /* # of u32 entries in array */
102 u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
103 0x00000000, /* 31 - 0 Event id numbers */
104 0x00000000, /* 63 - 32 */
105 0x00000000, /* 95 - 64 */
106 0x00000000, /* 127 - 96 */
107 0x00000000, /* 159 - 128 */
108 0x00000000, /* 191 - 160 */
109 0x00000000, /* 223 - 192 */
110 0x00000000, /* 255 - 224 */
111 0x00000000, /* 287 - 256 */
112 0x00000000, /* 319 - 288 */
113 0x00000000, /* 351 - 320 */
114 0x00000000, /* 383 - 352 */
115 0x00000000, /* 415 - 384 */
116 0x00000000, /* 447 - 416 */
117 0x00000000, /* 479 - 448 */
118 0x00000000, /* 511 - 480 */
119 0x00000000, /* 543 - 512 */
120 0x00000000, /* 575 - 544 */
121 0x00000000, /* 607 - 576 */
122 0x00000000, /* 639 - 608 */
123 0x00000000, /* 671 - 640 */
124 0x00000000, /* 703 - 672 */
125 0x00000000, /* 735 - 704 */
126 0x00000000, /* 767 - 736 */
127 0x00000000, /* 799 - 768 */
128 0x00000000, /* 831 - 800 */
129 0x00000000, /* 863 - 832 */
130 0x00000000, /* 895 - 864 */
131 0x00000000, /* 927 - 896 */
132 0x00000000, /* 959 - 928 */
133 0x00000000, /* 991 - 960 */
134 0x00000000, /* 1023 - 992 */
135 0x00000000, /* 1055 - 1024 */
136 0x00000000, /* 1087 - 1056 */
137 0x00000000, /* 1119 - 1088 */
138 0x00000000, /* 1151 - 1120 */
139 0x00000000, /* 1183 - 1152 */
140 0x00000000, /* 1215 - 1184 */
141 0x00000000, /* 1247 - 1216 */
142 0x00000000, /* 1279 - 1248 */
143 0x00000000, /* 1311 - 1280 */
144 0x00000000, /* 1343 - 1312 */
145 0x00000000, /* 1375 - 1344 */
146 0x00000000, /* 1407 - 1376 */
147 0x00000000, /* 1439 - 1408 */
148 0x00000000, /* 1471 - 1440 */
149 0x00000000, /* 1503 - 1472 */
150 };
151
152 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
153 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
154 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
155 return;
156 }
157
158 ret = iwl3945_grab_nic_access(priv);
159 if (ret) {
160 IWL_WARNING("Can not read from adapter at this time.\n");
161 return;
162 }
163
164 disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
165 array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
166 iwl3945_release_nic_access(priv);
167
168 if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
169 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
170 disable_ptr);
171 ret = iwl3945_grab_nic_access(priv);
172 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
173 iwl3945_write_targ_mem(priv,
174 disable_ptr + (i * sizeof(u32)),
175 evt_disable[i]);
176
177 iwl3945_release_nic_access(priv);
178 } else {
179 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
180 IWL_DEBUG_INFO(" by writing \"1\"s into disable bitmap\n");
181 IWL_DEBUG_INFO(" in SRAM at 0x%x, size %d u32s\n",
182 disable_ptr, array_size);
183 }
184
185 }
186
187 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
188 {
189 int idx;
190
191 for (idx = 0; idx < IWL_RATE_COUNT; idx++)
192 if (iwl3945_rates[idx].plcp == plcp)
193 return idx;
194 return -1;
195 }
196
197 /**
198 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
199 * @priv: eeprom and antenna fields are used to determine antenna flags
200 *
201 * priv->eeprom is used to determine if antenna AUX/MAIN are reversed
202 * priv->antenna specifies the antenna diversity mode:
203 *
204 * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
205 * IWL_ANTENNA_MAIN - Force MAIN antenna
206 * IWL_ANTENNA_AUX - Force AUX antenna
207 */
208 __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
209 {
210 switch (priv->antenna) {
211 case IWL_ANTENNA_DIVERSITY:
212 return 0;
213
214 case IWL_ANTENNA_MAIN:
215 if (priv->eeprom.antenna_switch_type)
216 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
217 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
218
219 case IWL_ANTENNA_AUX:
220 if (priv->eeprom.antenna_switch_type)
221 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
222 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
223 }
224
225 /* bad antenna selector value */
226 IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
227 return 0; /* "diversity" is default if error */
228 }
229
230 #ifdef CONFIG_IWL3945_DEBUG
231 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
232
233 static const char *iwl3945_get_tx_fail_reason(u32 status)
234 {
235 switch (status & TX_STATUS_MSK) {
236 case TX_STATUS_SUCCESS:
237 return "SUCCESS";
238 TX_STATUS_ENTRY(SHORT_LIMIT);
239 TX_STATUS_ENTRY(LONG_LIMIT);
240 TX_STATUS_ENTRY(FIFO_UNDERRUN);
241 TX_STATUS_ENTRY(MGMNT_ABORT);
242 TX_STATUS_ENTRY(NEXT_FRAG);
243 TX_STATUS_ENTRY(LIFE_EXPIRE);
244 TX_STATUS_ENTRY(DEST_PS);
245 TX_STATUS_ENTRY(ABORTED);
246 TX_STATUS_ENTRY(BT_RETRY);
247 TX_STATUS_ENTRY(STA_INVALID);
248 TX_STATUS_ENTRY(FRAG_DROPPED);
249 TX_STATUS_ENTRY(TID_DISABLE);
250 TX_STATUS_ENTRY(FRAME_FLUSHED);
251 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
252 TX_STATUS_ENTRY(TX_LOCKED);
253 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
254 }
255
256 return "UNKNOWN";
257 }
258 #else
259 static inline const char *iwl3945_get_tx_fail_reason(u32 status)
260 {
261 return "";
262 }
263 #endif
264
265
266 /**
267 * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
268 *
269 * When FW advances 'R' index, all entries between old and new 'R' index
270 * need to be reclaimed. As result, some free space forms. If there is
271 * enough free space (> low mark), wake the stack that feeds us.
272 */
273 static void iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv,
274 int txq_id, int index)
275 {
276 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
277 struct iwl3945_queue *q = &txq->q;
278 struct iwl3945_tx_info *tx_info;
279
280 BUG_ON(txq_id == IWL_CMD_QUEUE_NUM);
281
282 for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
283 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
284
285 tx_info = &txq->txb[txq->q.read_ptr];
286 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0],
287 &tx_info->status);
288 tx_info->skb[0] = NULL;
289 iwl3945_hw_txq_free_tfd(priv, txq);
290 }
291
292 if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
293 (txq_id != IWL_CMD_QUEUE_NUM) &&
294 priv->mac80211_registered)
295 ieee80211_wake_queue(priv->hw, txq_id);
296 }
297
298 /**
299 * iwl3945_rx_reply_tx - Handle Tx response
300 */
301 static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
302 struct iwl3945_rx_mem_buffer *rxb)
303 {
304 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
305 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
306 int txq_id = SEQ_TO_QUEUE(sequence);
307 int index = SEQ_TO_INDEX(sequence);
308 struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
309 struct ieee80211_tx_status *tx_status;
310 struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
311 u32 status = le32_to_cpu(tx_resp->status);
312 int rate_idx;
313
314 if ((index >= txq->q.n_bd) || (iwl3945_x2_queue_used(&txq->q, index) == 0)) {
315 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
316 "is out of range [0-%d] %d %d\n", txq_id,
317 index, txq->q.n_bd, txq->q.write_ptr,
318 txq->q.read_ptr);
319 return;
320 }
321
322 tx_status = &(txq->txb[txq->q.read_ptr].status);
323
324 tx_status->retry_count = tx_resp->failure_frame;
325 /* tx_status->rts_retry_count = tx_resp->failure_rts; */
326 tx_status->flags = ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
327 IEEE80211_TX_STATUS_ACK : 0;
328
329 IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
330 txq_id, iwl3945_get_tx_fail_reason(status), status,
331 tx_resp->rate, tx_resp->failure_frame);
332
333 rate_idx = iwl3945_hwrate_to_plcp_idx(tx_resp->rate);
334 tx_status->control.tx_rate = &priv->ieee_rates[rate_idx];
335 IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
336 iwl3945_tx_queue_reclaim(priv, txq_id, index);
337
338 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
339 IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
340 }
341
342
343
344 /*****************************************************************************
345 *
346 * Intel PRO/Wireless 3945ABG/BG Network Connection
347 *
348 * RX handler implementations
349 *
350 *****************************************************************************/
351
352 void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
353 {
354 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
355 IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
356 (int)sizeof(struct iwl3945_notif_statistics),
357 le32_to_cpu(pkt->len));
358
359 memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
360
361 iwl3945_led_background(priv);
362
363 priv->last_statistics_time = jiffies;
364 }
365
366 /******************************************************************************
367 *
368 * Misc. internal state and helper functions
369 *
370 ******************************************************************************/
371 #ifdef CONFIG_IWL3945_DEBUG
372
373 /**
374 * iwl3945_report_frame - dump frame to syslog during debug sessions
375 *
376 * You may hack this function to show different aspects of received frames,
377 * including selective frame dumps.
378 * group100 parameter selects whether to show 1 out of 100 good frames.
379 */
380 static void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
381 struct iwl3945_rx_packet *pkt,
382 struct ieee80211_hdr *header, int group100)
383 {
384 u32 to_us;
385 u32 print_summary = 0;
386 u32 print_dump = 0; /* set to 1 to dump all frames' contents */
387 u32 hundred = 0;
388 u32 dataframe = 0;
389 u16 fc;
390 u16 seq_ctl;
391 u16 channel;
392 u16 phy_flags;
393 u16 length;
394 u16 status;
395 u16 bcn_tmr;
396 u32 tsf_low;
397 u64 tsf;
398 u8 rssi;
399 u8 agc;
400 u16 sig_avg;
401 u16 noise_diff;
402 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
403 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
404 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
405 u8 *data = IWL_RX_DATA(pkt);
406
407 /* MAC header */
408 fc = le16_to_cpu(header->frame_control);
409 seq_ctl = le16_to_cpu(header->seq_ctrl);
410
411 /* metadata */
412 channel = le16_to_cpu(rx_hdr->channel);
413 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
414 length = le16_to_cpu(rx_hdr->len);
415
416 /* end-of-frame status and timestamp */
417 status = le32_to_cpu(rx_end->status);
418 bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
419 tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
420 tsf = le64_to_cpu(rx_end->timestamp);
421
422 /* signal statistics */
423 rssi = rx_stats->rssi;
424 agc = rx_stats->agc;
425 sig_avg = le16_to_cpu(rx_stats->sig_avg);
426 noise_diff = le16_to_cpu(rx_stats->noise_diff);
427
428 to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
429
430 /* if data frame is to us and all is good,
431 * (optionally) print summary for only 1 out of every 100 */
432 if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
433 (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
434 dataframe = 1;
435 if (!group100)
436 print_summary = 1; /* print each frame */
437 else if (priv->framecnt_to_us < 100) {
438 priv->framecnt_to_us++;
439 print_summary = 0;
440 } else {
441 priv->framecnt_to_us = 0;
442 print_summary = 1;
443 hundred = 1;
444 }
445 } else {
446 /* print summary for all other frames */
447 print_summary = 1;
448 }
449
450 if (print_summary) {
451 char *title;
452 u32 rate;
453
454 if (hundred)
455 title = "100Frames";
456 else if (fc & IEEE80211_FCTL_RETRY)
457 title = "Retry";
458 else if (ieee80211_is_assoc_response(fc))
459 title = "AscRsp";
460 else if (ieee80211_is_reassoc_response(fc))
461 title = "RasRsp";
462 else if (ieee80211_is_probe_response(fc)) {
463 title = "PrbRsp";
464 print_dump = 1; /* dump frame contents */
465 } else if (ieee80211_is_beacon(fc)) {
466 title = "Beacon";
467 print_dump = 1; /* dump frame contents */
468 } else if (ieee80211_is_atim(fc))
469 title = "ATIM";
470 else if (ieee80211_is_auth(fc))
471 title = "Auth";
472 else if (ieee80211_is_deauth(fc))
473 title = "DeAuth";
474 else if (ieee80211_is_disassoc(fc))
475 title = "DisAssoc";
476 else
477 title = "Frame";
478
479 rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
480 if (rate == -1)
481 rate = 0;
482 else
483 rate = iwl3945_rates[rate].ieee / 2;
484
485 /* print frame summary.
486 * MAC addresses show just the last byte (for brevity),
487 * but you can hack it to show more, if you'd like to. */
488 if (dataframe)
489 IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
490 "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
491 title, fc, header->addr1[5],
492 length, rssi, channel, rate);
493 else {
494 /* src/dst addresses assume managed mode */
495 IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
496 "src=0x%02x, rssi=%u, tim=%lu usec, "
497 "phy=0x%02x, chnl=%d\n",
498 title, fc, header->addr1[5],
499 header->addr3[5], rssi,
500 tsf_low - priv->scan_start_tsf,
501 phy_flags, channel);
502 }
503 }
504 if (print_dump)
505 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
506 }
507 #else
508 static inline void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
509 struct iwl3945_rx_packet *pkt,
510 struct ieee80211_hdr *header, int group100)
511 {
512 }
513 #endif
514
515
516 static void iwl3945_add_radiotap(struct iwl3945_priv *priv,
517 struct sk_buff *skb,
518 struct iwl3945_rx_frame_hdr *rx_hdr,
519 struct ieee80211_rx_status *stats)
520 {
521 /* First cache any information we need before we overwrite
522 * the information provided in the skb from the hardware */
523 s8 signal = stats->ssi;
524 s8 noise = 0;
525 int rate = stats->rate_idx;
526 u64 tsf = stats->mactime;
527 __le16 phy_flags_hw = rx_hdr->phy_flags, antenna;
528
529 struct iwl3945_rt_rx_hdr {
530 struct ieee80211_radiotap_header rt_hdr;
531 __le64 rt_tsf; /* TSF */
532 u8 rt_flags; /* radiotap packet flags */
533 u8 rt_rate; /* rate in 500kb/s */
534 __le16 rt_channelMHz; /* channel in MHz */
535 __le16 rt_chbitmask; /* channel bitfield */
536 s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
537 s8 rt_dbmnoise;
538 u8 rt_antenna; /* antenna number */
539 } __attribute__ ((packed)) *iwl3945_rt;
540
541 if (skb_headroom(skb) < sizeof(*iwl3945_rt)) {
542 if (net_ratelimit())
543 printk(KERN_ERR "not enough headroom [%d] for "
544 "radiotap head [%zd]\n",
545 skb_headroom(skb), sizeof(*iwl3945_rt));
546 return;
547 }
548
549 /* put radiotap header in front of 802.11 header and data */
550 iwl3945_rt = (void *)skb_push(skb, sizeof(*iwl3945_rt));
551
552 /* initialise radiotap header */
553 iwl3945_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
554 iwl3945_rt->rt_hdr.it_pad = 0;
555
556 /* total header + data */
557 put_unaligned_le16(sizeof(*iwl3945_rt), &iwl3945_rt->rt_hdr.it_len);
558
559 /* Indicate all the fields we add to the radiotap header */
560 put_unaligned_le32((1 << IEEE80211_RADIOTAP_TSFT) |
561 (1 << IEEE80211_RADIOTAP_FLAGS) |
562 (1 << IEEE80211_RADIOTAP_RATE) |
563 (1 << IEEE80211_RADIOTAP_CHANNEL) |
564 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
565 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
566 (1 << IEEE80211_RADIOTAP_ANTENNA),
567 &iwl3945_rt->rt_hdr.it_present);
568
569 /* Zero the flags, we'll add to them as we go */
570 iwl3945_rt->rt_flags = 0;
571
572 put_unaligned_le64(tsf, &iwl3945_rt->rt_tsf);
573
574 iwl3945_rt->rt_dbmsignal = signal;
575 iwl3945_rt->rt_dbmnoise = noise;
576
577 /* Convert the channel frequency and set the flags */
578 put_unaligned_le16(stats->freq, &iwl3945_rt->rt_channelMHz);
579 if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
580 put_unaligned_le16(IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ,
581 &iwl3945_rt->rt_chbitmask);
582 else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
583 put_unaligned_le16(IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ,
584 &iwl3945_rt->rt_chbitmask);
585 else /* 802.11g */
586 put_unaligned_le16(IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ,
587 &iwl3945_rt->rt_chbitmask);
588
589 if (rate == -1)
590 iwl3945_rt->rt_rate = 0;
591 else
592 iwl3945_rt->rt_rate = iwl3945_rates[rate].ieee;
593
594 /* antenna number */
595 antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
596 iwl3945_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
597
598 /* set the preamble flag if we have it */
599 if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
600 iwl3945_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
601
602 stats->flag |= RX_FLAG_RADIOTAP;
603 }
604
605 static void iwl3945_handle_data_packet(struct iwl3945_priv *priv, int is_data,
606 struct iwl3945_rx_mem_buffer *rxb,
607 struct ieee80211_rx_status *stats)
608 {
609 struct ieee80211_hdr *hdr;
610 struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
611 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
612 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
613 short len = le16_to_cpu(rx_hdr->len);
614
615 /* We received data from the HW, so stop the watchdog */
616 if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
617 IWL_DEBUG_DROP("Corruption detected!\n");
618 return;
619 }
620
621 /* We only process data packets if the interface is open */
622 if (unlikely(!priv->is_open)) {
623 IWL_DEBUG_DROP_LIMIT
624 ("Dropping packet while interface is not open.\n");
625 return;
626 }
627
628 skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
629 /* Set the size of the skb to the size of the frame */
630 skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
631
632 hdr = (void *)rxb->skb->data;
633
634 if (iwl3945_param_hwcrypto)
635 iwl3945_set_decrypted_flag(priv, rxb->skb,
636 le32_to_cpu(rx_end->status), stats);
637
638 if (priv->add_radiotap)
639 iwl3945_add_radiotap(priv, rxb->skb, rx_hdr, stats);
640
641 #ifdef CONFIG_IWL3945_LEDS
642 if (is_data)
643 priv->rxtxpackets += len;
644 #endif
645 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
646 rxb->skb = NULL;
647 }
648
649 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
650
651 static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
652 struct iwl3945_rx_mem_buffer *rxb)
653 {
654 struct ieee80211_hdr *header;
655 struct ieee80211_rx_status rx_status;
656 struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
657 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
658 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
659 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
660 int snr;
661 u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
662 u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
663 u8 network_packet;
664
665 rx_status.antenna = 0;
666 rx_status.flag = 0;
667 rx_status.mactime = le64_to_cpu(rx_end->timestamp);
668 rx_status.freq =
669 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel));
670 rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
671 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
672
673 rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
674 if (rx_status.band == IEEE80211_BAND_5GHZ)
675 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
676
677 if ((unlikely(rx_stats->phy_count > 20))) {
678 IWL_DEBUG_DROP
679 ("dsp size out of range [0,20]: "
680 "%d/n", rx_stats->phy_count);
681 return;
682 }
683
684 if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
685 || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
686 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
687 return;
688 }
689
690 if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
691 iwl3945_handle_data_packet(priv, 1, rxb, &rx_status);
692 return;
693 }
694
695 /* Convert 3945's rssi indicator to dBm */
696 rx_status.ssi = rx_stats->rssi - IWL_RSSI_OFFSET;
697
698 /* Set default noise value to -127 */
699 if (priv->last_rx_noise == 0)
700 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
701
702 /* 3945 provides noise info for OFDM frames only.
703 * sig_avg and noise_diff are measured by the 3945's digital signal
704 * processor (DSP), and indicate linear levels of signal level and
705 * distortion/noise within the packet preamble after
706 * automatic gain control (AGC). sig_avg should stay fairly
707 * constant if the radio's AGC is working well.
708 * Since these values are linear (not dB or dBm), linear
709 * signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
710 * Convert linear SNR to dB SNR, then subtract that from rssi dBm
711 * to obtain noise level in dBm.
712 * Calculate rx_status.signal (quality indicator in %) based on SNR. */
713 if (rx_stats_noise_diff) {
714 snr = rx_stats_sig_avg / rx_stats_noise_diff;
715 rx_status.noise = rx_status.ssi -
716 iwl3945_calc_db_from_ratio(snr);
717 rx_status.signal = iwl3945_calc_sig_qual(rx_status.ssi,
718 rx_status.noise);
719
720 /* If noise info not available, calculate signal quality indicator (%)
721 * using just the dBm signal level. */
722 } else {
723 rx_status.noise = priv->last_rx_noise;
724 rx_status.signal = iwl3945_calc_sig_qual(rx_status.ssi, 0);
725 }
726
727
728 IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
729 rx_status.ssi, rx_status.noise, rx_status.signal,
730 rx_stats_sig_avg, rx_stats_noise_diff);
731
732 header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
733
734 network_packet = iwl3945_is_network_packet(priv, header);
735
736 IWL_DEBUG_STATS_LIMIT("[%c] %d RSSI:%d Signal:%u, Noise:%u, Rate:%u\n",
737 network_packet ? '*' : ' ',
738 le16_to_cpu(rx_hdr->channel),
739 rx_status.ssi, rx_status.ssi,
740 rx_status.ssi, rx_status.rate_idx);
741
742 #ifdef CONFIG_IWL3945_DEBUG
743 if (iwl3945_debug_level & (IWL_DL_RX))
744 /* Set "1" to report good data frames in groups of 100 */
745 iwl3945_dbg_report_frame(priv, pkt, header, 1);
746 #endif
747
748 if (network_packet) {
749 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
750 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
751 priv->last_rx_rssi = rx_status.ssi;
752 priv->last_rx_noise = rx_status.noise;
753 }
754
755 switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
756 case IEEE80211_FTYPE_MGMT:
757 switch (le16_to_cpu(header->frame_control) &
758 IEEE80211_FCTL_STYPE) {
759 case IEEE80211_STYPE_PROBE_RESP:
760 case IEEE80211_STYPE_BEACON:{
761 /* If this is a beacon or probe response for
762 * our network then cache the beacon
763 * timestamp */
764 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
765 && !compare_ether_addr(header->addr2,
766 priv->bssid)) ||
767 ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
768 && !compare_ether_addr(header->addr3,
769 priv->bssid)))) {
770 struct ieee80211_mgmt *mgmt =
771 (struct ieee80211_mgmt *)header;
772 __le32 *pos;
773 pos =
774 (__le32 *) & mgmt->u.beacon.
775 timestamp;
776 priv->timestamp0 = le32_to_cpu(pos[0]);
777 priv->timestamp1 = le32_to_cpu(pos[1]);
778 priv->beacon_int = le16_to_cpu(
779 mgmt->u.beacon.beacon_int);
780 if (priv->call_post_assoc_from_beacon &&
781 (priv->iw_mode ==
782 IEEE80211_IF_TYPE_STA))
783 queue_work(priv->workqueue,
784 &priv->post_associate.work);
785
786 priv->call_post_assoc_from_beacon = 0;
787 }
788
789 break;
790 }
791
792 case IEEE80211_STYPE_ACTION:
793 /* TODO: Parse 802.11h frames for CSA... */
794 break;
795
796 /*
797 * TODO: Use the new callback function from
798 * mac80211 instead of sniffing these packets.
799 */
800 case IEEE80211_STYPE_ASSOC_RESP:
801 case IEEE80211_STYPE_REASSOC_RESP:{
802 struct ieee80211_mgmt *mgnt =
803 (struct ieee80211_mgmt *)header;
804
805 /* We have just associated, give some
806 * time for the 4-way handshake if
807 * any. Don't start scan too early. */
808 priv->next_scan_jiffies = jiffies +
809 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
810
811 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
812 le16_to_cpu(mgnt->u.
813 assoc_resp.aid));
814 priv->assoc_capability =
815 le16_to_cpu(mgnt->u.assoc_resp.capab_info);
816 if (priv->beacon_int)
817 queue_work(priv->workqueue,
818 &priv->post_associate.work);
819 else
820 priv->call_post_assoc_from_beacon = 1;
821 break;
822 }
823
824 case IEEE80211_STYPE_PROBE_REQ:{
825 DECLARE_MAC_BUF(mac1);
826 DECLARE_MAC_BUF(mac2);
827 DECLARE_MAC_BUF(mac3);
828 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
829 IWL_DEBUG_DROP
830 ("Dropping (non network): %s"
831 ", %s, %s\n",
832 print_mac(mac1, header->addr1),
833 print_mac(mac2, header->addr2),
834 print_mac(mac3, header->addr3));
835 return;
836 }
837 }
838
839 iwl3945_handle_data_packet(priv, 0, rxb, &rx_status);
840 break;
841
842 case IEEE80211_FTYPE_CTL:
843 break;
844
845 case IEEE80211_FTYPE_DATA: {
846 DECLARE_MAC_BUF(mac1);
847 DECLARE_MAC_BUF(mac2);
848 DECLARE_MAC_BUF(mac3);
849
850 if (unlikely(iwl3945_is_duplicate_packet(priv, header)))
851 IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
852 print_mac(mac1, header->addr1),
853 print_mac(mac2, header->addr2),
854 print_mac(mac3, header->addr3));
855 else
856 iwl3945_handle_data_packet(priv, 1, rxb, &rx_status);
857 break;
858 }
859 }
860 }
861
862 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
863 dma_addr_t addr, u16 len)
864 {
865 int count;
866 u32 pad;
867 struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
868
869 count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
870 pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
871
872 if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
873 IWL_ERROR("Error can not send more than %d chunks\n",
874 NUM_TFD_CHUNKS);
875 return -EINVAL;
876 }
877
878 tfd->pa[count].addr = cpu_to_le32(addr);
879 tfd->pa[count].len = cpu_to_le32(len);
880
881 count++;
882
883 tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
884 TFD_CTL_PAD_SET(pad));
885
886 return 0;
887 }
888
889 /**
890 * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
891 *
892 * Does NOT advance any indexes
893 */
894 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
895 {
896 struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
897 struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
898 struct pci_dev *dev = priv->pci_dev;
899 int i;
900 int counter;
901
902 /* classify bd */
903 if (txq->q.id == IWL_CMD_QUEUE_NUM)
904 /* nothing to cleanup after for host commands */
905 return 0;
906
907 /* sanity check */
908 counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
909 if (counter > NUM_TFD_CHUNKS) {
910 IWL_ERROR("Too many chunks: %i\n", counter);
911 /* @todo issue fatal error, it is quite serious situation */
912 return 0;
913 }
914
915 /* unmap chunks if any */
916
917 for (i = 1; i < counter; i++) {
918 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
919 le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
920 if (txq->txb[txq->q.read_ptr].skb[0]) {
921 struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
922 if (txq->txb[txq->q.read_ptr].skb[0]) {
923 /* Can be called from interrupt context */
924 dev_kfree_skb_any(skb);
925 txq->txb[txq->q.read_ptr].skb[0] = NULL;
926 }
927 }
928 }
929 return 0;
930 }
931
932 u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
933 {
934 int i;
935 int ret = IWL_INVALID_STATION;
936 unsigned long flags;
937 DECLARE_MAC_BUF(mac);
938
939 spin_lock_irqsave(&priv->sta_lock, flags);
940 for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
941 if ((priv->stations[i].used) &&
942 (!compare_ether_addr
943 (priv->stations[i].sta.sta.addr, addr))) {
944 ret = i;
945 goto out;
946 }
947
948 IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
949 print_mac(mac, addr), priv->num_stations);
950 out:
951 spin_unlock_irqrestore(&priv->sta_lock, flags);
952 return ret;
953 }
954
955 /**
956 * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
957 *
958 */
959 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
960 struct iwl3945_cmd *cmd,
961 struct ieee80211_tx_control *ctrl,
962 struct ieee80211_hdr *hdr, int sta_id, int tx_id)
963 {
964 unsigned long flags;
965 u16 rate_index = min(ctrl->tx_rate->hw_value & 0xffff, IWL_RATE_COUNT - 1);
966 u16 rate_mask;
967 int rate;
968 u8 rts_retry_limit;
969 u8 data_retry_limit;
970 __le32 tx_flags;
971 u16 fc = le16_to_cpu(hdr->frame_control);
972
973 rate = iwl3945_rates[rate_index].plcp;
974 tx_flags = cmd->cmd.tx.tx_flags;
975
976 /* We need to figure out how to get the sta->supp_rates while
977 * in this running context; perhaps encoding into ctrl->tx_rate? */
978 rate_mask = IWL_RATES_MASK;
979
980 spin_lock_irqsave(&priv->sta_lock, flags);
981
982 priv->stations[sta_id].current_rate.rate_n_flags = rate;
983
984 if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
985 (sta_id != priv->hw_setting.bcast_sta_id) &&
986 (sta_id != IWL_MULTICAST_ID))
987 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
988
989 spin_unlock_irqrestore(&priv->sta_lock, flags);
990
991 if (tx_id >= IWL_CMD_QUEUE_NUM)
992 rts_retry_limit = 3;
993 else
994 rts_retry_limit = 7;
995
996 if (ieee80211_is_probe_response(fc)) {
997 data_retry_limit = 3;
998 if (data_retry_limit < rts_retry_limit)
999 rts_retry_limit = data_retry_limit;
1000 } else
1001 data_retry_limit = IWL_DEFAULT_TX_RETRY;
1002
1003 if (priv->data_retry_limit != -1)
1004 data_retry_limit = priv->data_retry_limit;
1005
1006 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
1007 switch (fc & IEEE80211_FCTL_STYPE) {
1008 case IEEE80211_STYPE_AUTH:
1009 case IEEE80211_STYPE_DEAUTH:
1010 case IEEE80211_STYPE_ASSOC_REQ:
1011 case IEEE80211_STYPE_REASSOC_REQ:
1012 if (tx_flags & TX_CMD_FLG_RTS_MSK) {
1013 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
1014 tx_flags |= TX_CMD_FLG_CTS_MSK;
1015 }
1016 break;
1017 default:
1018 break;
1019 }
1020 }
1021
1022 cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
1023 cmd->cmd.tx.data_retry_limit = data_retry_limit;
1024 cmd->cmd.tx.rate = rate;
1025 cmd->cmd.tx.tx_flags = tx_flags;
1026
1027 /* OFDM */
1028 cmd->cmd.tx.supp_rates[0] =
1029 ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
1030
1031 /* CCK */
1032 cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
1033
1034 IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
1035 "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
1036 cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
1037 cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
1038 }
1039
1040 u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
1041 {
1042 unsigned long flags_spin;
1043 struct iwl3945_station_entry *station;
1044
1045 if (sta_id == IWL_INVALID_STATION)
1046 return IWL_INVALID_STATION;
1047
1048 spin_lock_irqsave(&priv->sta_lock, flags_spin);
1049 station = &priv->stations[sta_id];
1050
1051 station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
1052 station->sta.rate_n_flags = cpu_to_le16(tx_rate);
1053 station->current_rate.rate_n_flags = tx_rate;
1054 station->sta.mode = STA_CONTROL_MODIFY_MSK;
1055
1056 spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
1057
1058 iwl3945_send_add_station(priv, &station->sta, flags);
1059 IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
1060 sta_id, tx_rate);
1061 return sta_id;
1062 }
1063
1064 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
1065 {
1066 int rc;
1067 unsigned long flags;
1068
1069 spin_lock_irqsave(&priv->lock, flags);
1070 rc = iwl3945_grab_nic_access(priv);
1071 if (rc) {
1072 spin_unlock_irqrestore(&priv->lock, flags);
1073 return rc;
1074 }
1075
1076 if (!pwr_max) {
1077 u32 val;
1078
1079 rc = pci_read_config_dword(priv->pci_dev,
1080 PCI_POWER_SOURCE, &val);
1081 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
1082 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1083 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1084 ~APMG_PS_CTRL_MSK_PWR_SRC);
1085 iwl3945_release_nic_access(priv);
1086
1087 iwl3945_poll_bit(priv, CSR_GPIO_IN,
1088 CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
1089 CSR_GPIO_IN_BIT_AUX_POWER, 5000);
1090 } else
1091 iwl3945_release_nic_access(priv);
1092 } else {
1093 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1094 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1095 ~APMG_PS_CTRL_MSK_PWR_SRC);
1096
1097 iwl3945_release_nic_access(priv);
1098 iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
1099 CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */
1100 }
1101 spin_unlock_irqrestore(&priv->lock, flags);
1102
1103 return rc;
1104 }
1105
1106 static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
1107 {
1108 int rc;
1109 unsigned long flags;
1110
1111 spin_lock_irqsave(&priv->lock, flags);
1112 rc = iwl3945_grab_nic_access(priv);
1113 if (rc) {
1114 spin_unlock_irqrestore(&priv->lock, flags);
1115 return rc;
1116 }
1117
1118 iwl3945_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
1119 iwl3945_write_direct32(priv, FH_RCSR_RPTR_ADDR(0),
1120 priv->hw_setting.shared_phys +
1121 offsetof(struct iwl3945_shared, rx_read_ptr[0]));
1122 iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), 0);
1123 iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0),
1124 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
1125 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
1126 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
1127 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
1128 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
1129 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
1130 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
1131 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
1132
1133 /* fake read to flush all prev I/O */
1134 iwl3945_read_direct32(priv, FH_RSSR_CTRL);
1135
1136 iwl3945_release_nic_access(priv);
1137 spin_unlock_irqrestore(&priv->lock, flags);
1138
1139 return 0;
1140 }
1141
1142 static int iwl3945_tx_reset(struct iwl3945_priv *priv)
1143 {
1144 int rc;
1145 unsigned long flags;
1146
1147 spin_lock_irqsave(&priv->lock, flags);
1148 rc = iwl3945_grab_nic_access(priv);
1149 if (rc) {
1150 spin_unlock_irqrestore(&priv->lock, flags);
1151 return rc;
1152 }
1153
1154 /* bypass mode */
1155 iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
1156
1157 /* RA 0 is active */
1158 iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
1159
1160 /* all 6 fifo are active */
1161 iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
1162
1163 iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
1164 iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
1165 iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
1166 iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
1167
1168 iwl3945_write_direct32(priv, FH_TSSR_CBB_BASE,
1169 priv->hw_setting.shared_phys);
1170
1171 iwl3945_write_direct32(priv, FH_TSSR_MSG_CONFIG,
1172 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
1173 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
1174 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
1175 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
1176 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
1177 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
1178 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
1179
1180 iwl3945_release_nic_access(priv);
1181 spin_unlock_irqrestore(&priv->lock, flags);
1182
1183 return 0;
1184 }
1185
1186 /**
1187 * iwl3945_txq_ctx_reset - Reset TX queue context
1188 *
1189 * Destroys all DMA structures and initialize them again
1190 */
1191 static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
1192 {
1193 int rc;
1194 int txq_id, slots_num;
1195
1196 iwl3945_hw_txq_ctx_free(priv);
1197
1198 /* Tx CMD queue */
1199 rc = iwl3945_tx_reset(priv);
1200 if (rc)
1201 goto error;
1202
1203 /* Tx queue(s) */
1204 for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
1205 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
1206 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1207 rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
1208 txq_id);
1209 if (rc) {
1210 IWL_ERROR("Tx %d queue init failed\n", txq_id);
1211 goto error;
1212 }
1213 }
1214
1215 return rc;
1216
1217 error:
1218 iwl3945_hw_txq_ctx_free(priv);
1219 return rc;
1220 }
1221
1222 int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
1223 {
1224 u8 rev_id;
1225 int rc;
1226 unsigned long flags;
1227 struct iwl3945_rx_queue *rxq = &priv->rxq;
1228
1229 iwl3945_power_init_handle(priv);
1230
1231 spin_lock_irqsave(&priv->lock, flags);
1232 iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, (1 << 24));
1233 iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1234 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1235
1236 iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1237 rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1238 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1239 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1240 if (rc < 0) {
1241 spin_unlock_irqrestore(&priv->lock, flags);
1242 IWL_DEBUG_INFO("Failed to init the card\n");
1243 return rc;
1244 }
1245
1246 rc = iwl3945_grab_nic_access(priv);
1247 if (rc) {
1248 spin_unlock_irqrestore(&priv->lock, flags);
1249 return rc;
1250 }
1251 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1252 APMG_CLK_VAL_DMA_CLK_RQT |
1253 APMG_CLK_VAL_BSM_CLK_RQT);
1254 udelay(20);
1255 iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1256 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1257 iwl3945_release_nic_access(priv);
1258 spin_unlock_irqrestore(&priv->lock, flags);
1259
1260 /* Determine HW type */
1261 rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1262 if (rc)
1263 return rc;
1264 IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
1265
1266 iwl3945_nic_set_pwr_src(priv, 1);
1267 spin_lock_irqsave(&priv->lock, flags);
1268
1269 if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1270 IWL_DEBUG_INFO("RTP type \n");
1271 else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
1272 IWL_DEBUG_INFO("3945 RADIO-MB type\n");
1273 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1274 CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
1275 } else {
1276 IWL_DEBUG_INFO("3945 RADIO-MM type\n");
1277 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1278 CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
1279 }
1280
1281 if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
1282 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
1283 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1284 CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1285 } else
1286 IWL_DEBUG_INFO("SKU OP mode is basic\n");
1287
1288 if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
1289 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1290 priv->eeprom.board_revision);
1291 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1292 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1293 } else {
1294 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1295 priv->eeprom.board_revision);
1296 iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1297 CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1298 }
1299
1300 if (priv->eeprom.almgor_m_version <= 1) {
1301 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1302 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1303 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
1304 priv->eeprom.almgor_m_version);
1305 } else {
1306 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
1307 priv->eeprom.almgor_m_version);
1308 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1309 CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1310 }
1311 spin_unlock_irqrestore(&priv->lock, flags);
1312
1313 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1314 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
1315
1316 if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1317 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
1318
1319 /* Allocate the RX queue, or reset if it is already allocated */
1320 if (!rxq->bd) {
1321 rc = iwl3945_rx_queue_alloc(priv);
1322 if (rc) {
1323 IWL_ERROR("Unable to initialize Rx queue\n");
1324 return -ENOMEM;
1325 }
1326 } else
1327 iwl3945_rx_queue_reset(priv, rxq);
1328
1329 iwl3945_rx_replenish(priv);
1330
1331 iwl3945_rx_init(priv, rxq);
1332
1333 spin_lock_irqsave(&priv->lock, flags);
1334
1335 /* Look at using this instead:
1336 rxq->need_update = 1;
1337 iwl3945_rx_queue_update_write_ptr(priv, rxq);
1338 */
1339
1340 rc = iwl3945_grab_nic_access(priv);
1341 if (rc) {
1342 spin_unlock_irqrestore(&priv->lock, flags);
1343 return rc;
1344 }
1345 iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
1346 iwl3945_release_nic_access(priv);
1347
1348 spin_unlock_irqrestore(&priv->lock, flags);
1349
1350 rc = iwl3945_txq_ctx_reset(priv);
1351 if (rc)
1352 return rc;
1353
1354 set_bit(STATUS_INIT, &priv->status);
1355
1356 return 0;
1357 }
1358
1359 /**
1360 * iwl3945_hw_txq_ctx_free - Free TXQ Context
1361 *
1362 * Destroy all TX DMA queues and structures
1363 */
1364 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1365 {
1366 int txq_id;
1367
1368 /* Tx queues */
1369 for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1370 iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1371 }
1372
1373 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1374 {
1375 int queue;
1376 unsigned long flags;
1377
1378 spin_lock_irqsave(&priv->lock, flags);
1379 if (iwl3945_grab_nic_access(priv)) {
1380 spin_unlock_irqrestore(&priv->lock, flags);
1381 iwl3945_hw_txq_ctx_free(priv);
1382 return;
1383 }
1384
1385 /* stop SCD */
1386 iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1387
1388 /* reset TFD queues */
1389 for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1390 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0);
1391 iwl3945_poll_direct_bit(priv, FH_TSSR_TX_STATUS,
1392 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1393 1000);
1394 }
1395
1396 iwl3945_release_nic_access(priv);
1397 spin_unlock_irqrestore(&priv->lock, flags);
1398
1399 iwl3945_hw_txq_ctx_free(priv);
1400 }
1401
1402 int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1403 {
1404 int rc = 0;
1405 u32 reg_val;
1406 unsigned long flags;
1407
1408 spin_lock_irqsave(&priv->lock, flags);
1409
1410 /* set stop master bit */
1411 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1412
1413 reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1414
1415 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1416 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1417 IWL_DEBUG_INFO("Card in power save, master is already "
1418 "stopped\n");
1419 else {
1420 rc = iwl3945_poll_bit(priv, CSR_RESET,
1421 CSR_RESET_REG_FLAG_MASTER_DISABLED,
1422 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1423 if (rc < 0) {
1424 spin_unlock_irqrestore(&priv->lock, flags);
1425 return rc;
1426 }
1427 }
1428
1429 spin_unlock_irqrestore(&priv->lock, flags);
1430 IWL_DEBUG_INFO("stop master\n");
1431
1432 return rc;
1433 }
1434
1435 int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1436 {
1437 int rc;
1438 unsigned long flags;
1439
1440 iwl3945_hw_nic_stop_master(priv);
1441
1442 spin_lock_irqsave(&priv->lock, flags);
1443
1444 iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1445
1446 rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1447 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1448 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1449
1450 rc = iwl3945_grab_nic_access(priv);
1451 if (!rc) {
1452 iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1453 APMG_CLK_VAL_BSM_CLK_RQT);
1454
1455 udelay(10);
1456
1457 iwl3945_set_bit(priv, CSR_GP_CNTRL,
1458 CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1459
1460 iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1461 iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1462 0xFFFFFFFF);
1463
1464 /* enable DMA */
1465 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1466 APMG_CLK_VAL_DMA_CLK_RQT |
1467 APMG_CLK_VAL_BSM_CLK_RQT);
1468 udelay(10);
1469
1470 iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1471 APMG_PS_CTRL_VAL_RESET_REQ);
1472 udelay(5);
1473 iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1474 APMG_PS_CTRL_VAL_RESET_REQ);
1475 iwl3945_release_nic_access(priv);
1476 }
1477
1478 /* Clear the 'host command active' bit... */
1479 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1480
1481 wake_up_interruptible(&priv->wait_command_queue);
1482 spin_unlock_irqrestore(&priv->lock, flags);
1483
1484 return rc;
1485 }
1486
1487 /**
1488 * iwl3945_hw_reg_adjust_power_by_temp
1489 * return index delta into power gain settings table
1490 */
1491 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1492 {
1493 return (new_reading - old_reading) * (-11) / 100;
1494 }
1495
1496 /**
1497 * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1498 */
1499 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1500 {
1501 return (((temperature < -260) || (temperature > 25)) ? 1 : 0);
1502 }
1503
1504 int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1505 {
1506 return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1507 }
1508
1509 /**
1510 * iwl3945_hw_reg_txpower_get_temperature
1511 * get the current temperature by reading from NIC
1512 */
1513 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1514 {
1515 int temperature;
1516
1517 temperature = iwl3945_hw_get_temperature(priv);
1518
1519 /* driver's okay range is -260 to +25.
1520 * human readable okay range is 0 to +285 */
1521 IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1522
1523 /* handle insane temp reading */
1524 if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1525 IWL_ERROR("Error bad temperature value %d\n", temperature);
1526
1527 /* if really really hot(?),
1528 * substitute the 3rd band/group's temp measured at factory */
1529 if (priv->last_temperature > 100)
1530 temperature = priv->eeprom.groups[2].temperature;
1531 else /* else use most recent "sane" value from driver */
1532 temperature = priv->last_temperature;
1533 }
1534
1535 return temperature; /* raw, not "human readable" */
1536 }
1537
1538 /* Adjust Txpower only if temperature variance is greater than threshold.
1539 *
1540 * Both are lower than older versions' 9 degrees */
1541 #define IWL_TEMPERATURE_LIMIT_TIMER 6
1542
1543 /**
1544 * is_temp_calib_needed - determines if new calibration is needed
1545 *
1546 * records new temperature in tx_mgr->temperature.
1547 * replaces tx_mgr->last_temperature *only* if calib needed
1548 * (assumes caller will actually do the calibration!). */
1549 static int is_temp_calib_needed(struct iwl3945_priv *priv)
1550 {
1551 int temp_diff;
1552
1553 priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1554 temp_diff = priv->temperature - priv->last_temperature;
1555
1556 /* get absolute value */
1557 if (temp_diff < 0) {
1558 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1559 temp_diff = -temp_diff;
1560 } else if (temp_diff == 0)
1561 IWL_DEBUG_POWER("Same temp,\n");
1562 else
1563 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1564
1565 /* if we don't need calibration, *don't* update last_temperature */
1566 if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1567 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1568 return 0;
1569 }
1570
1571 IWL_DEBUG_POWER("Timed thermal calib needed\n");
1572
1573 /* assume that caller will actually do calib ...
1574 * update the "last temperature" value */
1575 priv->last_temperature = priv->temperature;
1576 return 1;
1577 }
1578
1579 #define IWL_MAX_GAIN_ENTRIES 78
1580 #define IWL_CCK_FROM_OFDM_POWER_DIFF -5
1581 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1582
1583 /* radio and DSP power table, each step is 1/2 dB.
1584 * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1585 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1586 {
1587 {251, 127}, /* 2.4 GHz, highest power */
1588 {251, 127},
1589 {251, 127},
1590 {251, 127},
1591 {251, 125},
1592 {251, 110},
1593 {251, 105},
1594 {251, 98},
1595 {187, 125},
1596 {187, 115},
1597 {187, 108},
1598 {187, 99},
1599 {243, 119},
1600 {243, 111},
1601 {243, 105},
1602 {243, 97},
1603 {243, 92},
1604 {211, 106},
1605 {211, 100},
1606 {179, 120},
1607 {179, 113},
1608 {179, 107},
1609 {147, 125},
1610 {147, 119},
1611 {147, 112},
1612 {147, 106},
1613 {147, 101},
1614 {147, 97},
1615 {147, 91},
1616 {115, 107},
1617 {235, 121},
1618 {235, 115},
1619 {235, 109},
1620 {203, 127},
1621 {203, 121},
1622 {203, 115},
1623 {203, 108},
1624 {203, 102},
1625 {203, 96},
1626 {203, 92},
1627 {171, 110},
1628 {171, 104},
1629 {171, 98},
1630 {139, 116},
1631 {227, 125},
1632 {227, 119},
1633 {227, 113},
1634 {227, 107},
1635 {227, 101},
1636 {227, 96},
1637 {195, 113},
1638 {195, 106},
1639 {195, 102},
1640 {195, 95},
1641 {163, 113},
1642 {163, 106},
1643 {163, 102},
1644 {163, 95},
1645 {131, 113},
1646 {131, 106},
1647 {131, 102},
1648 {131, 95},
1649 {99, 113},
1650 {99, 106},
1651 {99, 102},
1652 {99, 95},
1653 {67, 113},
1654 {67, 106},
1655 {67, 102},
1656 {67, 95},
1657 {35, 113},
1658 {35, 106},
1659 {35, 102},
1660 {35, 95},
1661 {3, 113},
1662 {3, 106},
1663 {3, 102},
1664 {3, 95} }, /* 2.4 GHz, lowest power */
1665 {
1666 {251, 127}, /* 5.x GHz, highest power */
1667 {251, 120},
1668 {251, 114},
1669 {219, 119},
1670 {219, 101},
1671 {187, 113},
1672 {187, 102},
1673 {155, 114},
1674 {155, 103},
1675 {123, 117},
1676 {123, 107},
1677 {123, 99},
1678 {123, 92},
1679 {91, 108},
1680 {59, 125},
1681 {59, 118},
1682 {59, 109},
1683 {59, 102},
1684 {59, 96},
1685 {59, 90},
1686 {27, 104},
1687 {27, 98},
1688 {27, 92},
1689 {115, 118},
1690 {115, 111},
1691 {115, 104},
1692 {83, 126},
1693 {83, 121},
1694 {83, 113},
1695 {83, 105},
1696 {83, 99},
1697 {51, 118},
1698 {51, 111},
1699 {51, 104},
1700 {51, 98},
1701 {19, 116},
1702 {19, 109},
1703 {19, 102},
1704 {19, 98},
1705 {19, 93},
1706 {171, 113},
1707 {171, 107},
1708 {171, 99},
1709 {139, 120},
1710 {139, 113},
1711 {139, 107},
1712 {139, 99},
1713 {107, 120},
1714 {107, 113},
1715 {107, 107},
1716 {107, 99},
1717 {75, 120},
1718 {75, 113},
1719 {75, 107},
1720 {75, 99},
1721 {43, 120},
1722 {43, 113},
1723 {43, 107},
1724 {43, 99},
1725 {11, 120},
1726 {11, 113},
1727 {11, 107},
1728 {11, 99},
1729 {131, 107},
1730 {131, 99},
1731 {99, 120},
1732 {99, 113},
1733 {99, 107},
1734 {99, 99},
1735 {67, 120},
1736 {67, 113},
1737 {67, 107},
1738 {67, 99},
1739 {35, 120},
1740 {35, 113},
1741 {35, 107},
1742 {35, 99},
1743 {3, 120} } /* 5.x GHz, lowest power */
1744 };
1745
1746 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1747 {
1748 if (index < 0)
1749 return 0;
1750 if (index >= IWL_MAX_GAIN_ENTRIES)
1751 return IWL_MAX_GAIN_ENTRIES - 1;
1752 return (u8) index;
1753 }
1754
1755 /* Kick off thermal recalibration check every 60 seconds */
1756 #define REG_RECALIB_PERIOD (60)
1757
1758 /**
1759 * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1760 *
1761 * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1762 * or 6 Mbit (OFDM) rates.
1763 */
1764 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1765 s32 rate_index, const s8 *clip_pwrs,
1766 struct iwl3945_channel_info *ch_info,
1767 int band_index)
1768 {
1769 struct iwl3945_scan_power_info *scan_power_info;
1770 s8 power;
1771 u8 power_index;
1772
1773 scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1774
1775 /* use this channel group's 6Mbit clipping/saturation pwr,
1776 * but cap at regulatory scan power restriction (set during init
1777 * based on eeprom channel data) for this channel. */
1778 power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1779
1780 /* further limit to user's max power preference.
1781 * FIXME: Other spectrum management power limitations do not
1782 * seem to apply?? */
1783 power = min(power, priv->user_txpower_limit);
1784 scan_power_info->requested_power = power;
1785
1786 /* find difference between new scan *power* and current "normal"
1787 * Tx *power* for 6Mb. Use this difference (x2) to adjust the
1788 * current "normal" temperature-compensated Tx power *index* for
1789 * this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1790 * *index*. */
1791 power_index = ch_info->power_info[rate_index].power_table_index
1792 - (power - ch_info->power_info
1793 [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1794
1795 /* store reference index that we use when adjusting *all* scan
1796 * powers. So we can accommodate user (all channel) or spectrum
1797 * management (single channel) power changes "between" temperature
1798 * feedback compensation procedures.
1799 * don't force fit this reference index into gain table; it may be a
1800 * negative number. This will help avoid errors when we're at
1801 * the lower bounds (highest gains, for warmest temperatures)
1802 * of the table. */
1803
1804 /* don't exceed table bounds for "real" setting */
1805 power_index = iwl3945_hw_reg_fix_power_index(power_index);
1806
1807 scan_power_info->power_table_index = power_index;
1808 scan_power_info->tpc.tx_gain =
1809 power_gain_table[band_index][power_index].tx_gain;
1810 scan_power_info->tpc.dsp_atten =
1811 power_gain_table[band_index][power_index].dsp_atten;
1812 }
1813
1814 /**
1815 * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1816 *
1817 * Configures power settings for all rates for the current channel,
1818 * using values from channel info struct, and send to NIC
1819 */
1820 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1821 {
1822 int rate_idx, i;
1823 const struct iwl3945_channel_info *ch_info = NULL;
1824 struct iwl3945_txpowertable_cmd txpower = {
1825 .channel = priv->active_rxon.channel,
1826 };
1827
1828 txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1829 ch_info = iwl3945_get_channel_info(priv,
1830 priv->band,
1831 le16_to_cpu(priv->active_rxon.channel));
1832 if (!ch_info) {
1833 IWL_ERROR
1834 ("Failed to get channel info for channel %d [%d]\n",
1835 le16_to_cpu(priv->active_rxon.channel), priv->band);
1836 return -EINVAL;
1837 }
1838
1839 if (!is_channel_valid(ch_info)) {
1840 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1841 "non-Tx channel.\n");
1842 return 0;
1843 }
1844
1845 /* fill cmd with power settings for all rates for current channel */
1846 /* Fill OFDM rate */
1847 for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1848 rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1849
1850 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1851 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1852
1853 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1854 le16_to_cpu(txpower.channel),
1855 txpower.band,
1856 txpower.power[i].tpc.tx_gain,
1857 txpower.power[i].tpc.dsp_atten,
1858 txpower.power[i].rate);
1859 }
1860 /* Fill CCK rates */
1861 for (rate_idx = IWL_FIRST_CCK_RATE;
1862 rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1863 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1864 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1865
1866 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1867 le16_to_cpu(txpower.channel),
1868 txpower.band,
1869 txpower.power[i].tpc.tx_gain,
1870 txpower.power[i].tpc.dsp_atten,
1871 txpower.power[i].rate);
1872 }
1873
1874 return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1875 sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1876
1877 }
1878
1879 /**
1880 * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1881 * @ch_info: Channel to update. Uses power_info.requested_power.
1882 *
1883 * Replace requested_power and base_power_index ch_info fields for
1884 * one channel.
1885 *
1886 * Called if user or spectrum management changes power preferences.
1887 * Takes into account h/w and modulation limitations (clip power).
1888 *
1889 * This does *not* send anything to NIC, just sets up ch_info for one channel.
1890 *
1891 * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1892 * properly fill out the scan powers, and actual h/w gain settings,
1893 * and send changes to NIC
1894 */
1895 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1896 struct iwl3945_channel_info *ch_info)
1897 {
1898 struct iwl3945_channel_power_info *power_info;
1899 int power_changed = 0;
1900 int i;
1901 const s8 *clip_pwrs;
1902 int power;
1903
1904 /* Get this chnlgrp's rate-to-max/clip-powers table */
1905 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1906
1907 /* Get this channel's rate-to-current-power settings table */
1908 power_info = ch_info->power_info;
1909
1910 /* update OFDM Txpower settings */
1911 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1912 i++, ++power_info) {
1913 int delta_idx;
1914
1915 /* limit new power to be no more than h/w capability */
1916 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1917 if (power == power_info->requested_power)
1918 continue;
1919
1920 /* find difference between old and new requested powers,
1921 * update base (non-temp-compensated) power index */
1922 delta_idx = (power - power_info->requested_power) * 2;
1923 power_info->base_power_index -= delta_idx;
1924
1925 /* save new requested power value */
1926 power_info->requested_power = power;
1927
1928 power_changed = 1;
1929 }
1930
1931 /* update CCK Txpower settings, based on OFDM 12M setting ...
1932 * ... all CCK power settings for a given channel are the *same*. */
1933 if (power_changed) {
1934 power =
1935 ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1936 requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1937
1938 /* do all CCK rates' iwl3945_channel_power_info structures */
1939 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1940 power_info->requested_power = power;
1941 power_info->base_power_index =
1942 ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1943 base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1944 ++power_info;
1945 }
1946 }
1947
1948 return 0;
1949 }
1950
1951 /**
1952 * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1953 *
1954 * NOTE: Returned power limit may be less (but not more) than requested,
1955 * based strictly on regulatory (eeprom and spectrum mgt) limitations
1956 * (no consideration for h/w clipping limitations).
1957 */
1958 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1959 {
1960 s8 max_power;
1961
1962 #if 0
1963 /* if we're using TGd limits, use lower of TGd or EEPROM */
1964 if (ch_info->tgd_data.max_power != 0)
1965 max_power = min(ch_info->tgd_data.max_power,
1966 ch_info->eeprom.max_power_avg);
1967
1968 /* else just use EEPROM limits */
1969 else
1970 #endif
1971 max_power = ch_info->eeprom.max_power_avg;
1972
1973 return min(max_power, ch_info->max_power_avg);
1974 }
1975
1976 /**
1977 * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1978 *
1979 * Compensate txpower settings of *all* channels for temperature.
1980 * This only accounts for the difference between current temperature
1981 * and the factory calibration temperatures, and bases the new settings
1982 * on the channel's base_power_index.
1983 *
1984 * If RxOn is "associated", this sends the new Txpower to NIC!
1985 */
1986 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1987 {
1988 struct iwl3945_channel_info *ch_info = NULL;
1989 int delta_index;
1990 const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1991 u8 a_band;
1992 u8 rate_index;
1993 u8 scan_tbl_index;
1994 u8 i;
1995 int ref_temp;
1996 int temperature = priv->temperature;
1997
1998 /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1999 for (i = 0; i < priv->channel_count; i++) {
2000 ch_info = &priv->channel_info[i];
2001 a_band = is_channel_a_band(ch_info);
2002
2003 /* Get this chnlgrp's factory calibration temperature */
2004 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
2005 temperature;
2006
2007 /* get power index adjustment based on curr and factory
2008 * temps */
2009 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2010 ref_temp);
2011
2012 /* set tx power value for all rates, OFDM and CCK */
2013 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
2014 rate_index++) {
2015 int power_idx =
2016 ch_info->power_info[rate_index].base_power_index;
2017
2018 /* temperature compensate */
2019 power_idx += delta_index;
2020
2021 /* stay within table range */
2022 power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2023 ch_info->power_info[rate_index].
2024 power_table_index = (u8) power_idx;
2025 ch_info->power_info[rate_index].tpc =
2026 power_gain_table[a_band][power_idx];
2027 }
2028
2029 /* Get this chnlgrp's rate-to-max/clip-powers table */
2030 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2031
2032 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2033 for (scan_tbl_index = 0;
2034 scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2035 s32 actual_index = (scan_tbl_index == 0) ?
2036 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2037 iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2038 actual_index, clip_pwrs,
2039 ch_info, a_band);
2040 }
2041 }
2042
2043 /* send Txpower command for current channel to ucode */
2044 return iwl3945_hw_reg_send_txpower(priv);
2045 }
2046
2047 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
2048 {
2049 struct iwl3945_channel_info *ch_info;
2050 s8 max_power;
2051 u8 a_band;
2052 u8 i;
2053
2054 if (priv->user_txpower_limit == power) {
2055 IWL_DEBUG_POWER("Requested Tx power same as current "
2056 "limit: %ddBm.\n", power);
2057 return 0;
2058 }
2059
2060 IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
2061 priv->user_txpower_limit = power;
2062
2063 /* set up new Tx powers for each and every channel, 2.4 and 5.x */
2064
2065 for (i = 0; i < priv->channel_count; i++) {
2066 ch_info = &priv->channel_info[i];
2067 a_band = is_channel_a_band(ch_info);
2068
2069 /* find minimum power of all user and regulatory constraints
2070 * (does not consider h/w clipping limitations) */
2071 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
2072 max_power = min(power, max_power);
2073 if (max_power != ch_info->curr_txpow) {
2074 ch_info->curr_txpow = max_power;
2075
2076 /* this considers the h/w clipping limitations */
2077 iwl3945_hw_reg_set_new_power(priv, ch_info);
2078 }
2079 }
2080
2081 /* update txpower settings for all channels,
2082 * send to NIC if associated. */
2083 is_temp_calib_needed(priv);
2084 iwl3945_hw_reg_comp_txpower_temp(priv);
2085
2086 return 0;
2087 }
2088
2089 /* will add 3945 channel switch cmd handling later */
2090 int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
2091 {
2092 return 0;
2093 }
2094
2095 /**
2096 * iwl3945_reg_txpower_periodic - called when time to check our temperature.
2097 *
2098 * -- reset periodic timer
2099 * -- see if temp has changed enough to warrant re-calibration ... if so:
2100 * -- correct coeffs for temp (can reset temp timer)
2101 * -- save this temp as "last",
2102 * -- send new set of gain settings to NIC
2103 * NOTE: This should continue working, even when we're not associated,
2104 * so we can keep our internal table of scan powers current. */
2105 void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
2106 {
2107 /* This will kick in the "brute force"
2108 * iwl3945_hw_reg_comp_txpower_temp() below */
2109 if (!is_temp_calib_needed(priv))
2110 goto reschedule;
2111
2112 /* Set up a new set of temp-adjusted TxPowers, send to NIC.
2113 * This is based *only* on current temperature,
2114 * ignoring any previous power measurements */
2115 iwl3945_hw_reg_comp_txpower_temp(priv);
2116
2117 reschedule:
2118 queue_delayed_work(priv->workqueue,
2119 &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
2120 }
2121
2122 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
2123 {
2124 struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
2125 thermal_periodic.work);
2126
2127 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2128 return;
2129
2130 mutex_lock(&priv->mutex);
2131 iwl3945_reg_txpower_periodic(priv);
2132 mutex_unlock(&priv->mutex);
2133 }
2134
2135 /**
2136 * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
2137 * for the channel.
2138 *
2139 * This function is used when initializing channel-info structs.
2140 *
2141 * NOTE: These channel groups do *NOT* match the bands above!
2142 * These channel groups are based on factory-tested channels;
2143 * on A-band, EEPROM's "group frequency" entries represent the top
2144 * channel in each group 1-4. Group 5 All B/G channels are in group 0.
2145 */
2146 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
2147 const struct iwl3945_channel_info *ch_info)
2148 {
2149 struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
2150 u8 group;
2151 u16 group_index = 0; /* based on factory calib frequencies */
2152 u8 grp_channel;
2153
2154 /* Find the group index for the channel ... don't use index 1(?) */
2155 if (is_channel_a_band(ch_info)) {
2156 for (group = 1; group < 5; group++) {
2157 grp_channel = ch_grp[group].group_channel;
2158 if (ch_info->channel <= grp_channel) {
2159 group_index = group;
2160 break;
2161 }
2162 }
2163 /* group 4 has a few channels *above* its factory cal freq */
2164 if (group == 5)
2165 group_index = 4;
2166 } else
2167 group_index = 0; /* 2.4 GHz, group 0 */
2168
2169 IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
2170 group_index);
2171 return group_index;
2172 }
2173
2174 /**
2175 * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2176 *
2177 * Interpolate to get nominal (i.e. at factory calibration temperature) index
2178 * into radio/DSP gain settings table for requested power.
2179 */
2180 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
2181 s8 requested_power,
2182 s32 setting_index, s32 *new_index)
2183 {
2184 const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
2185 s32 index0, index1;
2186 s32 power = 2 * requested_power;
2187 s32 i;
2188 const struct iwl3945_eeprom_txpower_sample *samples;
2189 s32 gains0, gains1;
2190 s32 res;
2191 s32 denominator;
2192
2193 chnl_grp = &priv->eeprom.groups[setting_index];
2194 samples = chnl_grp->samples;
2195 for (i = 0; i < 5; i++) {
2196 if (power == samples[i].power) {
2197 *new_index = samples[i].gain_index;
2198 return 0;
2199 }
2200 }
2201
2202 if (power > samples[1].power) {
2203 index0 = 0;
2204 index1 = 1;
2205 } else if (power > samples[2].power) {
2206 index0 = 1;
2207 index1 = 2;
2208 } else if (power > samples[3].power) {
2209 index0 = 2;
2210 index1 = 3;
2211 } else {
2212 index0 = 3;
2213 index1 = 4;
2214 }
2215
2216 denominator = (s32) samples[index1].power - (s32) samples[index0].power;
2217 if (denominator == 0)
2218 return -EINVAL;
2219 gains0 = (s32) samples[index0].gain_index * (1 << 19);
2220 gains1 = (s32) samples[index1].gain_index * (1 << 19);
2221 res = gains0 + (gains1 - gains0) *
2222 ((s32) power - (s32) samples[index0].power) / denominator +
2223 (1 << 18);
2224 *new_index = res >> 19;
2225 return 0;
2226 }
2227
2228 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
2229 {
2230 u32 i;
2231 s32 rate_index;
2232 const struct iwl3945_eeprom_txpower_group *group;
2233
2234 IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
2235
2236 for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
2237 s8 *clip_pwrs; /* table of power levels for each rate */
2238 s8 satur_pwr; /* saturation power for each chnl group */
2239 group = &priv->eeprom.groups[i];
2240
2241 /* sanity check on factory saturation power value */
2242 if (group->saturation_power < 40) {
2243 IWL_WARNING("Error: saturation power is %d, "
2244 "less than minimum expected 40\n",
2245 group->saturation_power);
2246 return;
2247 }
2248
2249 /*
2250 * Derive requested power levels for each rate, based on
2251 * hardware capabilities (saturation power for band).
2252 * Basic value is 3dB down from saturation, with further
2253 * power reductions for highest 3 data rates. These
2254 * backoffs provide headroom for high rate modulation
2255 * power peaks, without too much distortion (clipping).
2256 */
2257 /* we'll fill in this array with h/w max power levels */
2258 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
2259
2260 /* divide factory saturation power by 2 to find -3dB level */
2261 satur_pwr = (s8) (group->saturation_power >> 1);
2262
2263 /* fill in channel group's nominal powers for each rate */
2264 for (rate_index = 0;
2265 rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
2266 switch (rate_index) {
2267 case IWL_RATE_36M_INDEX_TABLE:
2268 if (i == 0) /* B/G */
2269 *clip_pwrs = satur_pwr;
2270 else /* A */
2271 *clip_pwrs = satur_pwr - 5;
2272 break;
2273 case IWL_RATE_48M_INDEX_TABLE:
2274 if (i == 0)
2275 *clip_pwrs = satur_pwr - 7;
2276 else
2277 *clip_pwrs = satur_pwr - 10;
2278 break;
2279 case IWL_RATE_54M_INDEX_TABLE:
2280 if (i == 0)
2281 *clip_pwrs = satur_pwr - 9;
2282 else
2283 *clip_pwrs = satur_pwr - 12;
2284 break;
2285 default:
2286 *clip_pwrs = satur_pwr;
2287 break;
2288 }
2289 }
2290 }
2291 }
2292
2293 /**
2294 * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2295 *
2296 * Second pass (during init) to set up priv->channel_info
2297 *
2298 * Set up Tx-power settings in our channel info database for each VALID
2299 * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2300 * and current temperature.
2301 *
2302 * Since this is based on current temperature (at init time), these values may
2303 * not be valid for very long, but it gives us a starting/default point,
2304 * and allows us to active (i.e. using Tx) scan.
2305 *
2306 * This does *not* write values to NIC, just sets up our internal table.
2307 */
2308 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
2309 {
2310 struct iwl3945_channel_info *ch_info = NULL;
2311 struct iwl3945_channel_power_info *pwr_info;
2312 int delta_index;
2313 u8 rate_index;
2314 u8 scan_tbl_index;
2315 const s8 *clip_pwrs; /* array of power levels for each rate */
2316 u8 gain, dsp_atten;
2317 s8 power;
2318 u8 pwr_index, base_pwr_index, a_band;
2319 u8 i;
2320 int temperature;
2321
2322 /* save temperature reference,
2323 * so we can determine next time to calibrate */
2324 temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2325 priv->last_temperature = temperature;
2326
2327 iwl3945_hw_reg_init_channel_groups(priv);
2328
2329 /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2330 for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2331 i++, ch_info++) {
2332 a_band = is_channel_a_band(ch_info);
2333 if (!is_channel_valid(ch_info))
2334 continue;
2335
2336 /* find this channel's channel group (*not* "band") index */
2337 ch_info->group_index =
2338 iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2339
2340 /* Get this chnlgrp's rate->max/clip-powers table */
2341 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2342
2343 /* calculate power index *adjustment* value according to
2344 * diff between current temperature and factory temperature */
2345 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2346 priv->eeprom.groups[ch_info->group_index].
2347 temperature);
2348
2349 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
2350 ch_info->channel, delta_index, temperature +
2351 IWL_TEMP_CONVERT);
2352
2353 /* set tx power value for all OFDM rates */
2354 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2355 rate_index++) {
2356 s32 power_idx;
2357 int rc;
2358
2359 /* use channel group's clip-power table,
2360 * but don't exceed channel's max power */
2361 s8 pwr = min(ch_info->max_power_avg,
2362 clip_pwrs[rate_index]);
2363
2364 pwr_info = &ch_info->power_info[rate_index];
2365
2366 /* get base (i.e. at factory-measured temperature)
2367 * power table index for this rate's power */
2368 rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2369 ch_info->group_index,
2370 &power_idx);
2371 if (rc) {
2372 IWL_ERROR("Invalid power index\n");
2373 return rc;
2374 }
2375 pwr_info->base_power_index = (u8) power_idx;
2376
2377 /* temperature compensate */
2378 power_idx += delta_index;
2379
2380 /* stay within range of gain table */
2381 power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2382
2383 /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2384 pwr_info->requested_power = pwr;
2385 pwr_info->power_table_index = (u8) power_idx;
2386 pwr_info->tpc.tx_gain =
2387 power_gain_table[a_band][power_idx].tx_gain;
2388 pwr_info->tpc.dsp_atten =
2389 power_gain_table[a_band][power_idx].dsp_atten;
2390 }
2391
2392 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2393 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2394 power = pwr_info->requested_power +
2395 IWL_CCK_FROM_OFDM_POWER_DIFF;
2396 pwr_index = pwr_info->power_table_index +
2397 IWL_CCK_FROM_OFDM_INDEX_DIFF;
2398 base_pwr_index = pwr_info->base_power_index +
2399 IWL_CCK_FROM_OFDM_INDEX_DIFF;
2400
2401 /* stay within table range */
2402 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2403 gain = power_gain_table[a_band][pwr_index].tx_gain;
2404 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2405
2406 /* fill each CCK rate's iwl3945_channel_power_info structure
2407 * NOTE: All CCK-rate Txpwrs are the same for a given chnl!
2408 * NOTE: CCK rates start at end of OFDM rates! */
2409 for (rate_index = 0;
2410 rate_index < IWL_CCK_RATES; rate_index++) {
2411 pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2412 pwr_info->requested_power = power;
2413 pwr_info->power_table_index = pwr_index;
2414 pwr_info->base_power_index = base_pwr_index;
2415 pwr_info->tpc.tx_gain = gain;
2416 pwr_info->tpc.dsp_atten = dsp_atten;
2417 }
2418
2419 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2420 for (scan_tbl_index = 0;
2421 scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2422 s32 actual_index = (scan_tbl_index == 0) ?
2423 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2424 iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2425 actual_index, clip_pwrs, ch_info, a_band);
2426 }
2427 }
2428
2429 return 0;
2430 }
2431
2432 int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2433 {
2434 int rc;
2435 unsigned long flags;
2436
2437 spin_lock_irqsave(&priv->lock, flags);
2438 rc = iwl3945_grab_nic_access(priv);
2439 if (rc) {
2440 spin_unlock_irqrestore(&priv->lock, flags);
2441 return rc;
2442 }
2443
2444 iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), 0);
2445 rc = iwl3945_poll_direct_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2446 if (rc < 0)
2447 IWL_ERROR("Can't stop Rx DMA.\n");
2448
2449 iwl3945_release_nic_access(priv);
2450 spin_unlock_irqrestore(&priv->lock, flags);
2451
2452 return 0;
2453 }
2454
2455 int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2456 {
2457 int rc;
2458 unsigned long flags;
2459 int txq_id = txq->q.id;
2460
2461 struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2462
2463 shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2464
2465 spin_lock_irqsave(&priv->lock, flags);
2466 rc = iwl3945_grab_nic_access(priv);
2467 if (rc) {
2468 spin_unlock_irqrestore(&priv->lock, flags);
2469 return rc;
2470 }
2471 iwl3945_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0);
2472 iwl3945_write_direct32(priv, FH_CBCC_BASE(txq_id), 0);
2473
2474 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(txq_id),
2475 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2476 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2477 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2478 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2479 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2480 iwl3945_release_nic_access(priv);
2481
2482 /* fake read to flush all prev. writes */
2483 iwl3945_read32(priv, FH_TSSR_CBB_BASE);
2484 spin_unlock_irqrestore(&priv->lock, flags);
2485
2486 return 0;
2487 }
2488
2489 int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2490 {
2491 struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2492
2493 return le32_to_cpu(shared_data->rx_read_ptr[0]);
2494 }
2495
2496 /**
2497 * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2498 */
2499 int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2500 {
2501 int rc, i, index, prev_index;
2502 struct iwl3945_rate_scaling_cmd rate_cmd = {
2503 .reserved = {0, 0, 0},
2504 };
2505 struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2506
2507 for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2508 index = iwl3945_rates[i].table_rs_index;
2509
2510 table[index].rate_n_flags =
2511 iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2512 table[index].try_cnt = priv->retry_rate;
2513 prev_index = iwl3945_get_prev_ieee_rate(i);
2514 table[index].next_rate_index = iwl3945_rates[prev_index].table_rs_index;
2515 }
2516
2517 switch (priv->band) {
2518 case IEEE80211_BAND_5GHZ:
2519 IWL_DEBUG_RATE("Select A mode rate scale\n");
2520 /* If one of the following CCK rates is used,
2521 * have it fall back to the 6M OFDM rate */
2522 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++)
2523 table[i].next_rate_index = iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2524
2525 /* Don't fall back to CCK rates */
2526 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index = IWL_RATE_9M_INDEX_TABLE;
2527
2528 /* Don't drop out of OFDM rates */
2529 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2530 iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2531 break;
2532
2533 case IEEE80211_BAND_2GHZ:
2534 IWL_DEBUG_RATE("Select B/G mode rate scale\n");
2535 /* If an OFDM rate is used, have it fall back to the
2536 * 1M CCK rates */
2537 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE; i++)
2538 table[i].next_rate_index = iwl3945_rates[IWL_FIRST_CCK_RATE].table_rs_index;
2539
2540 /* CCK shouldn't fall back to OFDM... */
2541 table[IWL_RATE_11M_INDEX_TABLE].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2542 break;
2543
2544 default:
2545 WARN_ON(1);
2546 break;
2547 }
2548
2549 /* Update the rate scaling for control frame Tx */
2550 rate_cmd.table_id = 0;
2551 rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2552 &rate_cmd);
2553 if (rc)
2554 return rc;
2555
2556 /* Update the rate scaling for data frame Tx */
2557 rate_cmd.table_id = 1;
2558 return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2559 &rate_cmd);
2560 }
2561
2562 /* Called when initializing driver */
2563 int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2564 {
2565 memset((void *)&priv->hw_setting, 0,
2566 sizeof(struct iwl3945_driver_hw_info));
2567
2568 priv->hw_setting.shared_virt =
2569 pci_alloc_consistent(priv->pci_dev,
2570 sizeof(struct iwl3945_shared),
2571 &priv->hw_setting.shared_phys);
2572
2573 if (!priv->hw_setting.shared_virt) {
2574 IWL_ERROR("failed to allocate pci memory\n");
2575 mutex_unlock(&priv->mutex);
2576 return -ENOMEM;
2577 }
2578
2579 priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE;
2580 priv->hw_setting.max_pkt_size = 2342;
2581 priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2582 priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2583 priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2584 priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2585 priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2586
2587 priv->hw_setting.tx_ant_num = 2;
2588 return 0;
2589 }
2590
2591 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2592 struct iwl3945_frame *frame, u8 rate)
2593 {
2594 struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2595 unsigned int frame_size;
2596
2597 tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2598 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2599
2600 tx_beacon_cmd->tx.sta_id = priv->hw_setting.bcast_sta_id;
2601 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2602
2603 frame_size = iwl3945_fill_beacon_frame(priv,
2604 tx_beacon_cmd->frame,
2605 iwl3945_broadcast_addr,
2606 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2607
2608 BUG_ON(frame_size > MAX_MPDU_SIZE);
2609 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2610
2611 tx_beacon_cmd->tx.rate = rate;
2612 tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2613 TX_CMD_FLG_TSF_MSK);
2614
2615 /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2616 tx_beacon_cmd->tx.supp_rates[0] =
2617 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2618
2619 tx_beacon_cmd->tx.supp_rates[1] =
2620 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2621
2622 return (sizeof(struct iwl3945_tx_beacon_cmd) + frame_size);
2623 }
2624
2625 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2626 {
2627 priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
2628 priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2629 }
2630
2631 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2632 {
2633 INIT_DELAYED_WORK(&priv->thermal_periodic,
2634 iwl3945_bg_reg_txpower_periodic);
2635 }
2636
2637 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2638 {
2639 cancel_delayed_work(&priv->thermal_periodic);
2640 }
2641
2642 static struct iwl_3945_cfg iwl3945_bg_cfg = {
2643 .name = "3945BG",
2644 .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2645 .sku = IWL_SKU_G,
2646 };
2647
2648 static struct iwl_3945_cfg iwl3945_abg_cfg = {
2649 .name = "3945ABG",
2650 .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2651 .sku = IWL_SKU_A|IWL_SKU_G,
2652 };
2653
2654 struct pci_device_id iwl3945_hw_card_ids[] = {
2655 {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2656 {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2657 {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2658 {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2659 {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2660 {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2661 {0}
2662 };
2663
2664 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);
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