ia64/kvm: compilation fix. export account_system_vtime.
[pv_ops_mirror.git] / drivers / net / wireless / prism54 / oid_mgt.c
blob57a4ac34bed6cd2eefcb9034ae5a85ec75bfc642
1 /*
2 * Copyright (C) 2003,2004 Aurelien Alleaume <slts@free.fr>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 #include <linux/kernel.h>
21 #include "prismcompat.h"
22 #include "islpci_dev.h"
23 #include "islpci_mgt.h"
24 #include "isl_oid.h"
25 #include "oid_mgt.h"
26 #include "isl_ioctl.h"
28 /* to convert between channel and freq */
29 static const int frequency_list_bg[] = { 2412, 2417, 2422, 2427, 2432,
30 2437, 2442, 2447, 2452, 2457, 2462, 2467, 2472, 2484
33 int
34 channel_of_freq(int f)
36 int c = 0;
38 if ((f >= 2412) && (f <= 2484)) {
39 while ((c < 14) && (f != frequency_list_bg[c]))
40 c++;
41 return (c >= 14) ? 0 : ++c;
42 } else if ((f >= (int) 5000) && (f <= (int) 6000)) {
43 return ( (f - 5000) / 5 );
44 } else
45 return 0;
48 #define OID_STRUCT(name,oid,s,t) [name] = {oid, 0, sizeof(s), t}
49 #define OID_STRUCT_C(name,oid,s,t) OID_STRUCT(name,oid,s,t | OID_FLAG_CACHED)
50 #define OID_U32(name,oid) OID_STRUCT(name,oid,u32,OID_TYPE_U32)
51 #define OID_U32_C(name,oid) OID_STRUCT_C(name,oid,u32,OID_TYPE_U32)
52 #define OID_STRUCT_MLME(name,oid) OID_STRUCT(name,oid,struct obj_mlme,OID_TYPE_MLME)
53 #define OID_STRUCT_MLMEEX(name,oid) OID_STRUCT(name,oid,struct obj_mlmeex,OID_TYPE_MLMEEX)
55 #define OID_UNKNOWN(name,oid) OID_STRUCT(name,oid,0,0)
57 struct oid_t isl_oid[] = {
58 OID_STRUCT(GEN_OID_MACADDRESS, 0x00000000, u8[6], OID_TYPE_ADDR),
59 OID_U32(GEN_OID_LINKSTATE, 0x00000001),
60 OID_UNKNOWN(GEN_OID_WATCHDOG, 0x00000002),
61 OID_UNKNOWN(GEN_OID_MIBOP, 0x00000003),
62 OID_UNKNOWN(GEN_OID_OPTIONS, 0x00000004),
63 OID_UNKNOWN(GEN_OID_LEDCONFIG, 0x00000005),
65 /* 802.11 */
66 OID_U32_C(DOT11_OID_BSSTYPE, 0x10000000),
67 OID_STRUCT_C(DOT11_OID_BSSID, 0x10000001, u8[6], OID_TYPE_RAW),
68 OID_STRUCT_C(DOT11_OID_SSID, 0x10000002, struct obj_ssid,
69 OID_TYPE_SSID),
70 OID_U32(DOT11_OID_STATE, 0x10000003),
71 OID_U32(DOT11_OID_AID, 0x10000004),
72 OID_STRUCT(DOT11_OID_COUNTRYSTRING, 0x10000005, u8[4], OID_TYPE_RAW),
73 OID_STRUCT_C(DOT11_OID_SSIDOVERRIDE, 0x10000006, struct obj_ssid,
74 OID_TYPE_SSID),
76 OID_U32(DOT11_OID_MEDIUMLIMIT, 0x11000000),
77 OID_U32_C(DOT11_OID_BEACONPERIOD, 0x11000001),
78 OID_U32(DOT11_OID_DTIMPERIOD, 0x11000002),
79 OID_U32(DOT11_OID_ATIMWINDOW, 0x11000003),
80 OID_U32(DOT11_OID_LISTENINTERVAL, 0x11000004),
81 OID_U32(DOT11_OID_CFPPERIOD, 0x11000005),
82 OID_U32(DOT11_OID_CFPDURATION, 0x11000006),
84 OID_U32_C(DOT11_OID_AUTHENABLE, 0x12000000),
85 OID_U32_C(DOT11_OID_PRIVACYINVOKED, 0x12000001),
86 OID_U32_C(DOT11_OID_EXUNENCRYPTED, 0x12000002),
87 OID_U32_C(DOT11_OID_DEFKEYID, 0x12000003),
88 [DOT11_OID_DEFKEYX] = {0x12000004, 3, sizeof (struct obj_key),
89 OID_FLAG_CACHED | OID_TYPE_KEY}, /* DOT11_OID_DEFKEY1,...DOT11_OID_DEFKEY4 */
90 OID_UNKNOWN(DOT11_OID_STAKEY, 0x12000008),
91 OID_U32(DOT11_OID_REKEYTHRESHOLD, 0x12000009),
92 OID_UNKNOWN(DOT11_OID_STASC, 0x1200000a),
94 OID_U32(DOT11_OID_PRIVTXREJECTED, 0x1a000000),
95 OID_U32(DOT11_OID_PRIVRXPLAIN, 0x1a000001),
96 OID_U32(DOT11_OID_PRIVRXFAILED, 0x1a000002),
97 OID_U32(DOT11_OID_PRIVRXNOKEY, 0x1a000003),
99 OID_U32_C(DOT11_OID_RTSTHRESH, 0x13000000),
100 OID_U32_C(DOT11_OID_FRAGTHRESH, 0x13000001),
101 OID_U32_C(DOT11_OID_SHORTRETRIES, 0x13000002),
102 OID_U32_C(DOT11_OID_LONGRETRIES, 0x13000003),
103 OID_U32_C(DOT11_OID_MAXTXLIFETIME, 0x13000004),
104 OID_U32(DOT11_OID_MAXRXLIFETIME, 0x13000005),
105 OID_U32(DOT11_OID_AUTHRESPTIMEOUT, 0x13000006),
106 OID_U32(DOT11_OID_ASSOCRESPTIMEOUT, 0x13000007),
108 OID_UNKNOWN(DOT11_OID_ALOFT_TABLE, 0x1d000000),
109 OID_UNKNOWN(DOT11_OID_ALOFT_CTRL_TABLE, 0x1d000001),
110 OID_UNKNOWN(DOT11_OID_ALOFT_RETREAT, 0x1d000002),
111 OID_UNKNOWN(DOT11_OID_ALOFT_PROGRESS, 0x1d000003),
112 OID_U32(DOT11_OID_ALOFT_FIXEDRATE, 0x1d000004),
113 OID_UNKNOWN(DOT11_OID_ALOFT_RSSIGRAPH, 0x1d000005),
114 OID_UNKNOWN(DOT11_OID_ALOFT_CONFIG, 0x1d000006),
116 [DOT11_OID_VDCFX] = {0x1b000000, 7, 0, 0},
117 OID_U32(DOT11_OID_MAXFRAMEBURST, 0x1b000008),
119 OID_U32(DOT11_OID_PSM, 0x14000000),
120 OID_U32(DOT11_OID_CAMTIMEOUT, 0x14000001),
121 OID_U32(DOT11_OID_RECEIVEDTIMS, 0x14000002),
122 OID_U32(DOT11_OID_ROAMPREFERENCE, 0x14000003),
124 OID_U32(DOT11_OID_BRIDGELOCAL, 0x15000000),
125 OID_U32(DOT11_OID_CLIENTS, 0x15000001),
126 OID_U32(DOT11_OID_CLIENTSASSOCIATED, 0x15000002),
127 [DOT11_OID_CLIENTX] = {0x15000003, 2006, 0, 0}, /* DOT11_OID_CLIENTX,...DOT11_OID_CLIENT2007 */
129 OID_STRUCT(DOT11_OID_CLIENTFIND, 0x150007DB, u8[6], OID_TYPE_ADDR),
130 OID_STRUCT(DOT11_OID_WDSLINKADD, 0x150007DC, u8[6], OID_TYPE_ADDR),
131 OID_STRUCT(DOT11_OID_WDSLINKREMOVE, 0x150007DD, u8[6], OID_TYPE_ADDR),
132 OID_STRUCT(DOT11_OID_EAPAUTHSTA, 0x150007DE, u8[6], OID_TYPE_ADDR),
133 OID_STRUCT(DOT11_OID_EAPUNAUTHSTA, 0x150007DF, u8[6], OID_TYPE_ADDR),
134 OID_U32_C(DOT11_OID_DOT1XENABLE, 0x150007E0),
135 OID_UNKNOWN(DOT11_OID_MICFAILURE, 0x150007E1),
136 OID_UNKNOWN(DOT11_OID_REKEYINDICATE, 0x150007E2),
138 OID_U32(DOT11_OID_MPDUTXSUCCESSFUL, 0x16000000),
139 OID_U32(DOT11_OID_MPDUTXONERETRY, 0x16000001),
140 OID_U32(DOT11_OID_MPDUTXMULTIPLERETRIES, 0x16000002),
141 OID_U32(DOT11_OID_MPDUTXFAILED, 0x16000003),
142 OID_U32(DOT11_OID_MPDURXSUCCESSFUL, 0x16000004),
143 OID_U32(DOT11_OID_MPDURXDUPS, 0x16000005),
144 OID_U32(DOT11_OID_RTSSUCCESSFUL, 0x16000006),
145 OID_U32(DOT11_OID_RTSFAILED, 0x16000007),
146 OID_U32(DOT11_OID_ACKFAILED, 0x16000008),
147 OID_U32(DOT11_OID_FRAMERECEIVES, 0x16000009),
148 OID_U32(DOT11_OID_FRAMEERRORS, 0x1600000A),
149 OID_U32(DOT11_OID_FRAMEABORTS, 0x1600000B),
150 OID_U32(DOT11_OID_FRAMEABORTSPHY, 0x1600000C),
152 OID_U32(DOT11_OID_SLOTTIME, 0x17000000),
153 OID_U32(DOT11_OID_CWMIN, 0x17000001),
154 OID_U32(DOT11_OID_CWMAX, 0x17000002),
155 OID_U32(DOT11_OID_ACKWINDOW, 0x17000003),
156 OID_U32(DOT11_OID_ANTENNARX, 0x17000004),
157 OID_U32(DOT11_OID_ANTENNATX, 0x17000005),
158 OID_U32(DOT11_OID_ANTENNADIVERSITY, 0x17000006),
159 OID_U32_C(DOT11_OID_CHANNEL, 0x17000007),
160 OID_U32_C(DOT11_OID_EDTHRESHOLD, 0x17000008),
161 OID_U32(DOT11_OID_PREAMBLESETTINGS, 0x17000009),
162 OID_STRUCT(DOT11_OID_RATES, 0x1700000A, u8[IWMAX_BITRATES + 1],
163 OID_TYPE_RAW),
164 OID_U32(DOT11_OID_CCAMODESUPPORTED, 0x1700000B),
165 OID_U32(DOT11_OID_CCAMODE, 0x1700000C),
166 OID_UNKNOWN(DOT11_OID_RSSIVECTOR, 0x1700000D),
167 OID_UNKNOWN(DOT11_OID_OUTPUTPOWERTABLE, 0x1700000E),
168 OID_U32(DOT11_OID_OUTPUTPOWER, 0x1700000F),
169 OID_STRUCT(DOT11_OID_SUPPORTEDRATES, 0x17000010,
170 u8[IWMAX_BITRATES + 1], OID_TYPE_RAW),
171 OID_U32_C(DOT11_OID_FREQUENCY, 0x17000011),
172 [DOT11_OID_SUPPORTEDFREQUENCIES] =
173 {0x17000012, 0, sizeof (struct obj_frequencies)
174 + sizeof (u16) * IWMAX_FREQ, OID_TYPE_FREQUENCIES},
176 OID_U32(DOT11_OID_NOISEFLOOR, 0x17000013),
177 OID_STRUCT(DOT11_OID_FREQUENCYACTIVITY, 0x17000014, u8[IWMAX_FREQ + 1],
178 OID_TYPE_RAW),
179 OID_UNKNOWN(DOT11_OID_IQCALIBRATIONTABLE, 0x17000015),
180 OID_U32(DOT11_OID_NONERPPROTECTION, 0x17000016),
181 OID_U32(DOT11_OID_SLOTSETTINGS, 0x17000017),
182 OID_U32(DOT11_OID_NONERPTIMEOUT, 0x17000018),
183 OID_U32(DOT11_OID_PROFILES, 0x17000019),
184 OID_STRUCT(DOT11_OID_EXTENDEDRATES, 0x17000020,
185 u8[IWMAX_BITRATES + 1], OID_TYPE_RAW),
187 OID_STRUCT_MLME(DOT11_OID_DEAUTHENTICATE, 0x18000000),
188 OID_STRUCT_MLME(DOT11_OID_AUTHENTICATE, 0x18000001),
189 OID_STRUCT_MLME(DOT11_OID_DISASSOCIATE, 0x18000002),
190 OID_STRUCT_MLME(DOT11_OID_ASSOCIATE, 0x18000003),
191 OID_UNKNOWN(DOT11_OID_SCAN, 0x18000004),
192 OID_STRUCT_MLMEEX(DOT11_OID_BEACON, 0x18000005),
193 OID_STRUCT_MLMEEX(DOT11_OID_PROBE, 0x18000006),
194 OID_STRUCT_MLMEEX(DOT11_OID_DEAUTHENTICATEEX, 0x18000007),
195 OID_STRUCT_MLMEEX(DOT11_OID_AUTHENTICATEEX, 0x18000008),
196 OID_STRUCT_MLMEEX(DOT11_OID_DISASSOCIATEEX, 0x18000009),
197 OID_STRUCT_MLMEEX(DOT11_OID_ASSOCIATEEX, 0x1800000A),
198 OID_STRUCT_MLMEEX(DOT11_OID_REASSOCIATE, 0x1800000B),
199 OID_STRUCT_MLMEEX(DOT11_OID_REASSOCIATEEX, 0x1800000C),
201 OID_U32(DOT11_OID_NONERPSTATUS, 0x1E000000),
203 OID_U32(DOT11_OID_STATIMEOUT, 0x19000000),
204 OID_U32_C(DOT11_OID_MLMEAUTOLEVEL, 0x19000001),
205 OID_U32(DOT11_OID_BSSTIMEOUT, 0x19000002),
206 [DOT11_OID_ATTACHMENT] = {0x19000003, 0,
207 sizeof(struct obj_attachment), OID_TYPE_ATTACH},
208 OID_STRUCT_C(DOT11_OID_PSMBUFFER, 0x19000004, struct obj_buffer,
209 OID_TYPE_BUFFER),
211 OID_U32(DOT11_OID_BSSS, 0x1C000000),
212 [DOT11_OID_BSSX] = {0x1C000001, 63, sizeof (struct obj_bss),
213 OID_TYPE_BSS}, /*DOT11_OID_BSS1,...,DOT11_OID_BSS64 */
214 OID_STRUCT(DOT11_OID_BSSFIND, 0x1C000042, struct obj_bss, OID_TYPE_BSS),
215 [DOT11_OID_BSSLIST] = {0x1C000043, 0, sizeof (struct
216 obj_bsslist) +
217 sizeof (struct obj_bss[IWMAX_BSS]),
218 OID_TYPE_BSSLIST},
220 OID_UNKNOWN(OID_INL_TUNNEL, 0xFF020000),
221 OID_UNKNOWN(OID_INL_MEMADDR, 0xFF020001),
222 OID_UNKNOWN(OID_INL_MEMORY, 0xFF020002),
223 OID_U32_C(OID_INL_MODE, 0xFF020003),
224 OID_UNKNOWN(OID_INL_COMPONENT_NR, 0xFF020004),
225 OID_STRUCT(OID_INL_VERSION, 0xFF020005, u8[8], OID_TYPE_RAW),
226 OID_UNKNOWN(OID_INL_INTERFACE_ID, 0xFF020006),
227 OID_UNKNOWN(OID_INL_COMPONENT_ID, 0xFF020007),
228 OID_U32_C(OID_INL_CONFIG, 0xFF020008),
229 OID_U32_C(OID_INL_DOT11D_CONFORMANCE, 0xFF02000C),
230 OID_U32(OID_INL_PHYCAPABILITIES, 0xFF02000D),
231 OID_U32_C(OID_INL_OUTPUTPOWER, 0xFF02000F),
236 mgt_init(islpci_private *priv)
238 int i;
240 priv->mib = kcalloc(OID_NUM_LAST, sizeof (void *), GFP_KERNEL);
241 if (!priv->mib)
242 return -ENOMEM;
244 /* Alloc the cache */
245 for (i = 0; i < OID_NUM_LAST; i++) {
246 if (isl_oid[i].flags & OID_FLAG_CACHED) {
247 priv->mib[i] = kzalloc(isl_oid[i].size *
248 (isl_oid[i].range + 1),
249 GFP_KERNEL);
250 if (!priv->mib[i])
251 return -ENOMEM;
252 } else
253 priv->mib[i] = NULL;
256 init_rwsem(&priv->mib_sem);
257 prism54_mib_init(priv);
259 return 0;
262 void
263 mgt_clean(islpci_private *priv)
265 int i;
267 if (!priv->mib)
268 return;
269 for (i = 0; i < OID_NUM_LAST; i++) {
270 kfree(priv->mib[i]);
271 priv->mib[i] = NULL;
273 kfree(priv->mib);
274 priv->mib = NULL;
277 void
278 mgt_le_to_cpu(int type, void *data)
280 switch (type) {
281 case OID_TYPE_U32:
282 *(u32 *) data = le32_to_cpu(*(u32 *) data);
283 break;
284 case OID_TYPE_BUFFER:{
285 struct obj_buffer *buff = data;
286 buff->size = le32_to_cpu(buff->size);
287 buff->addr = le32_to_cpu(buff->addr);
288 break;
290 case OID_TYPE_BSS:{
291 struct obj_bss *bss = data;
292 bss->age = le16_to_cpu(bss->age);
293 bss->channel = le16_to_cpu(bss->channel);
294 bss->capinfo = le16_to_cpu(bss->capinfo);
295 bss->rates = le16_to_cpu(bss->rates);
296 bss->basic_rates = le16_to_cpu(bss->basic_rates);
297 break;
299 case OID_TYPE_BSSLIST:{
300 struct obj_bsslist *list = data;
301 int i;
302 list->nr = le32_to_cpu(list->nr);
303 for (i = 0; i < list->nr; i++)
304 mgt_le_to_cpu(OID_TYPE_BSS, &list->bsslist[i]);
305 break;
307 case OID_TYPE_FREQUENCIES:{
308 struct obj_frequencies *freq = data;
309 int i;
310 freq->nr = le16_to_cpu(freq->nr);
311 for (i = 0; i < freq->nr; i++)
312 freq->mhz[i] = le16_to_cpu(freq->mhz[i]);
313 break;
315 case OID_TYPE_MLME:{
316 struct obj_mlme *mlme = data;
317 mlme->id = le16_to_cpu(mlme->id);
318 mlme->state = le16_to_cpu(mlme->state);
319 mlme->code = le16_to_cpu(mlme->code);
320 break;
322 case OID_TYPE_MLMEEX:{
323 struct obj_mlmeex *mlme = data;
324 mlme->id = le16_to_cpu(mlme->id);
325 mlme->state = le16_to_cpu(mlme->state);
326 mlme->code = le16_to_cpu(mlme->code);
327 mlme->size = le16_to_cpu(mlme->size);
328 break;
330 case OID_TYPE_ATTACH:{
331 struct obj_attachment *attach = data;
332 attach->id = le16_to_cpu(attach->id);
333 attach->size = le16_to_cpu(attach->size);
334 break;
336 case OID_TYPE_SSID:
337 case OID_TYPE_KEY:
338 case OID_TYPE_ADDR:
339 case OID_TYPE_RAW:
340 break;
341 default:
342 BUG();
346 static void
347 mgt_cpu_to_le(int type, void *data)
349 switch (type) {
350 case OID_TYPE_U32:
351 *(u32 *) data = cpu_to_le32(*(u32 *) data);
352 break;
353 case OID_TYPE_BUFFER:{
354 struct obj_buffer *buff = data;
355 buff->size = cpu_to_le32(buff->size);
356 buff->addr = cpu_to_le32(buff->addr);
357 break;
359 case OID_TYPE_BSS:{
360 struct obj_bss *bss = data;
361 bss->age = cpu_to_le16(bss->age);
362 bss->channel = cpu_to_le16(bss->channel);
363 bss->capinfo = cpu_to_le16(bss->capinfo);
364 bss->rates = cpu_to_le16(bss->rates);
365 bss->basic_rates = cpu_to_le16(bss->basic_rates);
366 break;
368 case OID_TYPE_BSSLIST:{
369 struct obj_bsslist *list = data;
370 int i;
371 list->nr = cpu_to_le32(list->nr);
372 for (i = 0; i < list->nr; i++)
373 mgt_cpu_to_le(OID_TYPE_BSS, &list->bsslist[i]);
374 break;
376 case OID_TYPE_FREQUENCIES:{
377 struct obj_frequencies *freq = data;
378 int i;
379 freq->nr = cpu_to_le16(freq->nr);
380 for (i = 0; i < freq->nr; i++)
381 freq->mhz[i] = cpu_to_le16(freq->mhz[i]);
382 break;
384 case OID_TYPE_MLME:{
385 struct obj_mlme *mlme = data;
386 mlme->id = cpu_to_le16(mlme->id);
387 mlme->state = cpu_to_le16(mlme->state);
388 mlme->code = cpu_to_le16(mlme->code);
389 break;
391 case OID_TYPE_MLMEEX:{
392 struct obj_mlmeex *mlme = data;
393 mlme->id = cpu_to_le16(mlme->id);
394 mlme->state = cpu_to_le16(mlme->state);
395 mlme->code = cpu_to_le16(mlme->code);
396 mlme->size = cpu_to_le16(mlme->size);
397 break;
399 case OID_TYPE_ATTACH:{
400 struct obj_attachment *attach = data;
401 attach->id = cpu_to_le16(attach->id);
402 attach->size = cpu_to_le16(attach->size);
403 break;
405 case OID_TYPE_SSID:
406 case OID_TYPE_KEY:
407 case OID_TYPE_ADDR:
408 case OID_TYPE_RAW:
409 break;
410 default:
411 BUG();
415 /* Note : data is modified during this function */
418 mgt_set_request(islpci_private *priv, enum oid_num_t n, int extra, void *data)
420 int ret = 0;
421 struct islpci_mgmtframe *response = NULL;
422 int response_op = PIMFOR_OP_ERROR;
423 int dlen;
424 void *cache, *_data = data;
425 u32 oid;
427 BUG_ON(OID_NUM_LAST <= n);
428 BUG_ON(extra > isl_oid[n].range);
430 if (!priv->mib)
431 /* memory has been freed */
432 return -1;
434 dlen = isl_oid[n].size;
435 cache = priv->mib[n];
436 cache += (cache ? extra * dlen : 0);
437 oid = isl_oid[n].oid + extra;
439 if (_data == NULL)
440 /* we are requested to re-set a cached value */
441 _data = cache;
442 else
443 mgt_cpu_to_le(isl_oid[n].flags & OID_FLAG_TYPE, _data);
444 /* If we are going to write to the cache, we don't want anyone to read
445 * it -> acquire write lock.
446 * Else we could acquire a read lock to be sure we don't bother the
447 * commit process (which takes a write lock). But I'm not sure if it's
448 * needed.
450 if (cache)
451 down_write(&priv->mib_sem);
453 if (islpci_get_state(priv) >= PRV_STATE_READY) {
454 ret = islpci_mgt_transaction(priv->ndev, PIMFOR_OP_SET, oid,
455 _data, dlen, &response);
456 if (!ret) {
457 response_op = response->header->operation;
458 islpci_mgt_release(response);
460 if (ret || response_op == PIMFOR_OP_ERROR)
461 ret = -EIO;
462 } else if (!cache)
463 ret = -EIO;
465 if (cache) {
466 if (!ret && data)
467 memcpy(cache, _data, dlen);
468 up_write(&priv->mib_sem);
471 /* re-set given data to what it was */
472 if (data)
473 mgt_le_to_cpu(isl_oid[n].flags & OID_FLAG_TYPE, data);
475 return ret;
478 /* None of these are cached */
480 mgt_set_varlen(islpci_private *priv, enum oid_num_t n, void *data, int extra_len)
482 int ret = 0;
483 struct islpci_mgmtframe *response;
484 int response_op = PIMFOR_OP_ERROR;
485 int dlen;
486 u32 oid;
488 BUG_ON(OID_NUM_LAST <= n);
490 dlen = isl_oid[n].size;
491 oid = isl_oid[n].oid;
493 mgt_cpu_to_le(isl_oid[n].flags & OID_FLAG_TYPE, data);
495 if (islpci_get_state(priv) >= PRV_STATE_READY) {
496 ret = islpci_mgt_transaction(priv->ndev, PIMFOR_OP_SET, oid,
497 data, dlen + extra_len, &response);
498 if (!ret) {
499 response_op = response->header->operation;
500 islpci_mgt_release(response);
502 if (ret || response_op == PIMFOR_OP_ERROR)
503 ret = -EIO;
504 } else
505 ret = -EIO;
507 /* re-set given data to what it was */
508 if (data)
509 mgt_le_to_cpu(isl_oid[n].flags & OID_FLAG_TYPE, data);
511 return ret;
515 mgt_get_request(islpci_private *priv, enum oid_num_t n, int extra, void *data,
516 union oid_res_t *res)
519 int ret = -EIO;
520 int reslen = 0;
521 struct islpci_mgmtframe *response = NULL;
523 int dlen;
524 void *cache, *_res = NULL;
525 u32 oid;
527 BUG_ON(OID_NUM_LAST <= n);
528 BUG_ON(extra > isl_oid[n].range);
530 res->ptr = NULL;
532 if (!priv->mib)
533 /* memory has been freed */
534 return -1;
536 dlen = isl_oid[n].size;
537 cache = priv->mib[n];
538 cache += cache ? extra * dlen : 0;
539 oid = isl_oid[n].oid + extra;
540 reslen = dlen;
542 if (cache)
543 down_read(&priv->mib_sem);
545 if (islpci_get_state(priv) >= PRV_STATE_READY) {
546 ret = islpci_mgt_transaction(priv->ndev, PIMFOR_OP_GET,
547 oid, data, dlen, &response);
548 if (ret || !response ||
549 response->header->operation == PIMFOR_OP_ERROR) {
550 if (response)
551 islpci_mgt_release(response);
552 ret = -EIO;
554 if (!ret) {
555 _res = response->data;
556 reslen = response->header->length;
558 } else if (cache) {
559 _res = cache;
560 ret = 0;
562 if ((isl_oid[n].flags & OID_FLAG_TYPE) == OID_TYPE_U32)
563 res->u = ret ? 0 : le32_to_cpu(*(u32 *) _res);
564 else {
565 res->ptr = kmalloc(reslen, GFP_KERNEL);
566 BUG_ON(res->ptr == NULL);
567 if (ret)
568 memset(res->ptr, 0, reslen);
569 else {
570 memcpy(res->ptr, _res, reslen);
571 mgt_le_to_cpu(isl_oid[n].flags & OID_FLAG_TYPE,
572 res->ptr);
575 if (cache)
576 up_read(&priv->mib_sem);
578 if (response && !ret)
579 islpci_mgt_release(response);
581 if (reslen > isl_oid[n].size)
582 printk(KERN_DEBUG
583 "mgt_get_request(0x%x): received data length was bigger "
584 "than expected (%d > %d). Memory is probably corrupted...",
585 oid, reslen, isl_oid[n].size);
587 return ret;
590 /* lock outside */
592 mgt_commit_list(islpci_private *priv, enum oid_num_t *l, int n)
594 int i, ret = 0;
595 struct islpci_mgmtframe *response;
597 for (i = 0; i < n; i++) {
598 struct oid_t *t = &(isl_oid[l[i]]);
599 void *data = priv->mib[l[i]];
600 int j = 0;
601 u32 oid = t->oid;
602 BUG_ON(data == NULL);
603 while (j <= t->range) {
604 int r = islpci_mgt_transaction(priv->ndev, PIMFOR_OP_SET,
605 oid, data, t->size,
606 &response);
607 if (response) {
608 r |= (response->header->operation == PIMFOR_OP_ERROR);
609 islpci_mgt_release(response);
611 if (r)
612 printk(KERN_ERR "%s: mgt_commit_list: failure. "
613 "oid=%08x err=%d\n",
614 priv->ndev->name, oid, r);
615 ret |= r;
616 j++;
617 oid++;
618 data += t->size;
621 return ret;
624 /* Lock outside */
626 void
627 mgt_set(islpci_private *priv, enum oid_num_t n, void *data)
629 BUG_ON(OID_NUM_LAST <= n);
630 BUG_ON(priv->mib[n] == NULL);
632 memcpy(priv->mib[n], data, isl_oid[n].size);
633 mgt_cpu_to_le(isl_oid[n].flags & OID_FLAG_TYPE, priv->mib[n]);
636 void
637 mgt_get(islpci_private *priv, enum oid_num_t n, void *res)
639 BUG_ON(OID_NUM_LAST <= n);
640 BUG_ON(priv->mib[n] == NULL);
641 BUG_ON(res == NULL);
643 memcpy(res, priv->mib[n], isl_oid[n].size);
644 mgt_le_to_cpu(isl_oid[n].flags & OID_FLAG_TYPE, res);
647 /* Commits the cache. Lock outside. */
649 static enum oid_num_t commit_part1[] = {
650 OID_INL_CONFIG,
651 OID_INL_MODE,
652 DOT11_OID_BSSTYPE,
653 DOT11_OID_CHANNEL,
654 DOT11_OID_MLMEAUTOLEVEL
657 static enum oid_num_t commit_part2[] = {
658 DOT11_OID_SSID,
659 DOT11_OID_PSMBUFFER,
660 DOT11_OID_AUTHENABLE,
661 DOT11_OID_PRIVACYINVOKED,
662 DOT11_OID_EXUNENCRYPTED,
663 DOT11_OID_DEFKEYX, /* MULTIPLE */
664 DOT11_OID_DEFKEYID,
665 DOT11_OID_DOT1XENABLE,
666 OID_INL_DOT11D_CONFORMANCE,
667 /* Do not initialize this - fw < 1.0.4.3 rejects it
668 OID_INL_OUTPUTPOWER,
672 /* update the MAC addr. */
673 static int
674 mgt_update_addr(islpci_private *priv)
676 struct islpci_mgmtframe *res;
677 int ret;
679 ret = islpci_mgt_transaction(priv->ndev, PIMFOR_OP_GET,
680 isl_oid[GEN_OID_MACADDRESS].oid, NULL,
681 isl_oid[GEN_OID_MACADDRESS].size, &res);
683 if ((ret == 0) && res && (res->header->operation != PIMFOR_OP_ERROR))
684 memcpy(priv->ndev->dev_addr, res->data, 6);
685 else
686 ret = -EIO;
687 if (res)
688 islpci_mgt_release(res);
690 if (ret)
691 printk(KERN_ERR "%s: mgt_update_addr: failure\n", priv->ndev->name);
692 return ret;
695 #define VEC_SIZE(a) ARRAY_SIZE(a)
698 mgt_commit(islpci_private *priv)
700 int rvalue;
701 u32 u;
703 if (islpci_get_state(priv) < PRV_STATE_INIT)
704 return 0;
706 rvalue = mgt_commit_list(priv, commit_part1, VEC_SIZE(commit_part1));
708 if (priv->iw_mode != IW_MODE_MONITOR)
709 rvalue |= mgt_commit_list(priv, commit_part2, VEC_SIZE(commit_part2));
711 u = OID_INL_MODE;
712 rvalue |= mgt_commit_list(priv, &u, 1);
713 rvalue |= mgt_update_addr(priv);
715 if (rvalue) {
716 /* some request have failed. The device might be in an
717 incoherent state. We should reset it ! */
718 printk(KERN_DEBUG "%s: mgt_commit: failure\n", priv->ndev->name);
720 return rvalue;
723 /* The following OIDs need to be "unlatched":
725 * MEDIUMLIMIT,BEACONPERIOD,DTIMPERIOD,ATIMWINDOW,LISTENINTERVAL
726 * FREQUENCY,EXTENDEDRATES.
728 * The way to do this is to set ESSID. Note though that they may get
729 * unlatch before though by setting another OID. */
730 #if 0
731 void
732 mgt_unlatch_all(islpci_private *priv)
734 u32 u;
735 int rvalue = 0;
737 if (islpci_get_state(priv) < PRV_STATE_INIT)
738 return;
740 u = DOT11_OID_SSID;
741 rvalue = mgt_commit_list(priv, &u, 1);
742 /* Necessary if in MANUAL RUN mode? */
743 #if 0
744 u = OID_INL_MODE;
745 rvalue |= mgt_commit_list(priv, &u, 1);
747 u = DOT11_OID_MLMEAUTOLEVEL;
748 rvalue |= mgt_commit_list(priv, &u, 1);
750 u = OID_INL_MODE;
751 rvalue |= mgt_commit_list(priv, &u, 1);
752 #endif
754 if (rvalue)
755 printk(KERN_DEBUG "%s: Unlatching OIDs failed\n", priv->ndev->name);
757 #endif
759 /* This will tell you if you are allowed to answer a mlme(ex) request .*/
762 mgt_mlme_answer(islpci_private *priv)
764 u32 mlmeautolevel;
765 /* Acquire a read lock because if we are in a mode change, it's
766 * possible to answer true, while the card is leaving master to managed
767 * mode. Answering to a mlme in this situation could hang the card.
769 down_read(&priv->mib_sem);
770 mlmeautolevel =
771 le32_to_cpu(*(u32 *) priv->mib[DOT11_OID_MLMEAUTOLEVEL]);
772 up_read(&priv->mib_sem);
774 return ((priv->iw_mode == IW_MODE_MASTER) &&
775 (mlmeautolevel >= DOT11_MLME_INTERMEDIATE));
778 enum oid_num_t
779 mgt_oidtonum(u32 oid)
781 int i;
783 for (i = 0; i < OID_NUM_LAST; i++)
784 if (isl_oid[i].oid == oid)
785 return i;
787 printk(KERN_DEBUG "looking for an unknown oid 0x%x", oid);
789 return OID_NUM_LAST;
793 mgt_response_to_str(enum oid_num_t n, union oid_res_t *r, char *str)
795 switch (isl_oid[n].flags & OID_FLAG_TYPE) {
796 case OID_TYPE_U32:
797 return snprintf(str, PRIV_STR_SIZE, "%u\n", r->u);
798 break;
799 case OID_TYPE_BUFFER:{
800 struct obj_buffer *buff = r->ptr;
801 return snprintf(str, PRIV_STR_SIZE,
802 "size=%u\naddr=0x%X\n", buff->size,
803 buff->addr);
805 break;
806 case OID_TYPE_BSS:{
807 struct obj_bss *bss = r->ptr;
808 return snprintf(str, PRIV_STR_SIZE,
809 "age=%u\nchannel=%u\n"
810 "capinfo=0x%X\nrates=0x%X\n"
811 "basic_rates=0x%X\n", bss->age,
812 bss->channel, bss->capinfo,
813 bss->rates, bss->basic_rates);
815 break;
816 case OID_TYPE_BSSLIST:{
817 struct obj_bsslist *list = r->ptr;
818 int i, k;
819 k = snprintf(str, PRIV_STR_SIZE, "nr=%u\n", list->nr);
820 for (i = 0; i < list->nr; i++)
821 k += snprintf(str + k, PRIV_STR_SIZE - k,
822 "bss[%u] : \nage=%u\nchannel=%u\n"
823 "capinfo=0x%X\nrates=0x%X\n"
824 "basic_rates=0x%X\n",
825 i, list->bsslist[i].age,
826 list->bsslist[i].channel,
827 list->bsslist[i].capinfo,
828 list->bsslist[i].rates,
829 list->bsslist[i].basic_rates);
830 return k;
832 break;
833 case OID_TYPE_FREQUENCIES:{
834 struct obj_frequencies *freq = r->ptr;
835 int i, t;
836 printk("nr : %u\n", freq->nr);
837 t = snprintf(str, PRIV_STR_SIZE, "nr=%u\n", freq->nr);
838 for (i = 0; i < freq->nr; i++)
839 t += snprintf(str + t, PRIV_STR_SIZE - t,
840 "mhz[%u]=%u\n", i, freq->mhz[i]);
841 return t;
843 break;
844 case OID_TYPE_MLME:{
845 struct obj_mlme *mlme = r->ptr;
846 return snprintf(str, PRIV_STR_SIZE,
847 "id=0x%X\nstate=0x%X\ncode=0x%X\n",
848 mlme->id, mlme->state, mlme->code);
850 break;
851 case OID_TYPE_MLMEEX:{
852 struct obj_mlmeex *mlme = r->ptr;
853 return snprintf(str, PRIV_STR_SIZE,
854 "id=0x%X\nstate=0x%X\n"
855 "code=0x%X\nsize=0x%X\n", mlme->id,
856 mlme->state, mlme->code, mlme->size);
858 break;
859 case OID_TYPE_ATTACH:{
860 struct obj_attachment *attach = r->ptr;
861 return snprintf(str, PRIV_STR_SIZE,
862 "id=%d\nsize=%d\n",
863 attach->id,
864 attach->size);
866 break;
867 case OID_TYPE_SSID:{
868 struct obj_ssid *ssid = r->ptr;
869 return snprintf(str, PRIV_STR_SIZE,
870 "length=%u\noctets=%.*s\n",
871 ssid->length, ssid->length,
872 ssid->octets);
874 break;
875 case OID_TYPE_KEY:{
876 struct obj_key *key = r->ptr;
877 int t, i;
878 t = snprintf(str, PRIV_STR_SIZE,
879 "type=0x%X\nlength=0x%X\nkey=0x",
880 key->type, key->length);
881 for (i = 0; i < key->length; i++)
882 t += snprintf(str + t, PRIV_STR_SIZE - t,
883 "%02X:", key->key[i]);
884 t += snprintf(str + t, PRIV_STR_SIZE - t, "\n");
885 return t;
887 break;
888 case OID_TYPE_RAW:
889 case OID_TYPE_ADDR:{
890 unsigned char *buff = r->ptr;
891 int t, i;
892 t = snprintf(str, PRIV_STR_SIZE, "hex data=");
893 for (i = 0; i < isl_oid[n].size; i++)
894 t += snprintf(str + t, PRIV_STR_SIZE - t,
895 "%02X:", buff[i]);
896 t += snprintf(str + t, PRIV_STR_SIZE - t, "\n");
897 return t;
899 break;
900 default:
901 BUG();
903 return 0;