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ia64/kvm: compilation fix. export account_system_vtime.
[pv_ops_mirror.git] / drivers / net / wireless / rtl8187_dev.c
blobd5787b37e1fb401695b43d2bf49022f5777b0a69
1 /*
2 * Linux device driver for RTL8187
3 *
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
6 *
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
9 *
10 * Magic delays and register offsets below are taken from the original
11 * r8187 driver sources. Thanks to Realtek for their support!
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18 #include <linux/init.h>
19 #include <linux/usb.h>
20 #include <linux/delay.h>
21 #include <linux/etherdevice.h>
22 #include <linux/eeprom_93cx6.h>
23 #include <net/mac80211.h>
24
25 #include "rtl8187.h"
26 #include "rtl8187_rtl8225.h"
27
28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
29 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
30 MODULE_DESCRIPTION("RTL8187 USB wireless driver");
31 MODULE_LICENSE("GPL");
32
33 static struct usb_device_id rtl8187_table[] __devinitdata = {
34 /* Realtek */
35 {USB_DEVICE(0x0bda, 0x8187)},
36 /* Netgear */
37 {USB_DEVICE(0x0846, 0x6100)},
38 {USB_DEVICE(0x0846, 0x6a00)},
39 /* HP */
40 {USB_DEVICE(0x03f0, 0xca02)},
41 /* Sitecom */
42 {USB_DEVICE(0x0df6, 0x000d)},
43 {}
44 };
45
46 MODULE_DEVICE_TABLE(usb, rtl8187_table);
47
48 static const struct ieee80211_rate rtl818x_rates[] = {
49 { .bitrate = 10, .hw_value = 0, },
50 { .bitrate = 20, .hw_value = 1, },
51 { .bitrate = 55, .hw_value = 2, },
52 { .bitrate = 110, .hw_value = 3, },
53 { .bitrate = 60, .hw_value = 4, },
54 { .bitrate = 90, .hw_value = 5, },
55 { .bitrate = 120, .hw_value = 6, },
56 { .bitrate = 180, .hw_value = 7, },
57 { .bitrate = 240, .hw_value = 8, },
58 { .bitrate = 360, .hw_value = 9, },
59 { .bitrate = 480, .hw_value = 10, },
60 { .bitrate = 540, .hw_value = 11, },
61 };
62
63 static const struct ieee80211_channel rtl818x_channels[] = {
64 { .center_freq = 2412 },
65 { .center_freq = 2417 },
66 { .center_freq = 2422 },
67 { .center_freq = 2427 },
68 { .center_freq = 2432 },
69 { .center_freq = 2437 },
70 { .center_freq = 2442 },
71 { .center_freq = 2447 },
72 { .center_freq = 2452 },
73 { .center_freq = 2457 },
74 { .center_freq = 2462 },
75 { .center_freq = 2467 },
76 { .center_freq = 2472 },
77 { .center_freq = 2484 },
78 };
79
80 static void rtl8187_iowrite_async_cb(struct urb *urb)
81 {
82 kfree(urb->context);
83 usb_free_urb(urb);
84 }
85
86 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
87 void *data, u16 len)
88 {
89 struct usb_ctrlrequest *dr;
90 struct urb *urb;
91 struct rtl8187_async_write_data {
92 u8 data[4];
93 struct usb_ctrlrequest dr;
94 } *buf;
95
96 buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
97 if (!buf)
98 return;
99
100 urb = usb_alloc_urb(0, GFP_ATOMIC);
101 if (!urb) {
102 kfree(buf);
103 return;
104 }
105
106 dr = &buf->dr;
107
108 dr->bRequestType = RTL8187_REQT_WRITE;
109 dr->bRequest = RTL8187_REQ_SET_REG;
110 dr->wValue = addr;
111 dr->wIndex = 0;
112 dr->wLength = cpu_to_le16(len);
113
114 memcpy(buf, data, len);
115
116 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
117 (unsigned char *)dr, buf, len,
118 rtl8187_iowrite_async_cb, buf);
119 usb_submit_urb(urb, GFP_ATOMIC);
120 }
121
122 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
123 __le32 *addr, u32 val)
124 {
125 __le32 buf = cpu_to_le32(val);
126
127 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
128 &buf, sizeof(buf));
129 }
130
131 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
132 {
133 struct rtl8187_priv *priv = dev->priv;
134
135 data <<= 8;
136 data |= addr | 0x80;
137
138 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
139 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
140 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
141 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
142
143 msleep(1);
144 }
145
146 static void rtl8187_tx_cb(struct urb *urb)
147 {
148 struct ieee80211_tx_status status;
149 struct sk_buff *skb = (struct sk_buff *)urb->context;
150 struct rtl8187_tx_info *info = (struct rtl8187_tx_info *)skb->cb;
151
152 memset(&status, 0, sizeof(status));
153
154 usb_free_urb(info->urb);
155 if (info->control)
156 memcpy(&status.control, info->control, sizeof(status.control));
157 kfree(info->control);
158 skb_pull(skb, sizeof(struct rtl8187_tx_hdr));
159 status.flags |= IEEE80211_TX_STATUS_ACK;
160 ieee80211_tx_status_irqsafe(info->dev, skb, &status);
161 }
162
163 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
164 struct ieee80211_tx_control *control)
165 {
166 struct rtl8187_priv *priv = dev->priv;
167 struct rtl8187_tx_hdr *hdr;
168 struct rtl8187_tx_info *info;
169 struct urb *urb;
170 __le16 rts_dur = 0;
171 u32 flags;
172
173 urb = usb_alloc_urb(0, GFP_ATOMIC);
174 if (!urb) {
175 kfree_skb(skb);
176 return 0;
177 }
178
179 flags = skb->len;
180 flags |= RTL8187_TX_FLAG_NO_ENCRYPT;
181
182 BUG_ON(!control->tx_rate);
183
184 flags |= control->tx_rate->hw_value << 24;
185 if (ieee80211_get_morefrag((struct ieee80211_hdr *)skb->data))
186 flags |= RTL8187_TX_FLAG_MORE_FRAG;
187 if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
188 BUG_ON(!control->rts_cts_rate);
189 flags |= RTL8187_TX_FLAG_RTS;
190 flags |= control->rts_cts_rate->hw_value << 19;
191 rts_dur = ieee80211_rts_duration(dev, priv->vif,
192 skb->len, control);
193 } else if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
194 BUG_ON(!control->rts_cts_rate);
195 flags |= RTL8187_TX_FLAG_CTS;
196 flags |= control->rts_cts_rate->hw_value << 19;
197 }
198
199 hdr = (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
200 hdr->flags = cpu_to_le32(flags);
201 hdr->len = 0;
202 hdr->rts_duration = rts_dur;
203 hdr->retry = cpu_to_le32(control->retry_limit << 8);
204
205 info = (struct rtl8187_tx_info *)skb->cb;
206 info->control = kmemdup(control, sizeof(*control), GFP_ATOMIC);
207 info->urb = urb;
208 info->dev = dev;
209 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, 2),
210 hdr, skb->len, rtl8187_tx_cb, skb);
211 usb_submit_urb(urb, GFP_ATOMIC);
212
213 return 0;
214 }
215
216 static void rtl8187_rx_cb(struct urb *urb)
217 {
218 struct sk_buff *skb = (struct sk_buff *)urb->context;
219 struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
220 struct ieee80211_hw *dev = info->dev;
221 struct rtl8187_priv *priv = dev->priv;
222 struct rtl8187_rx_hdr *hdr;
223 struct ieee80211_rx_status rx_status = { 0 };
224 int rate, signal;
225 u32 flags;
226
227 spin_lock(&priv->rx_queue.lock);
228 if (skb->next)
229 __skb_unlink(skb, &priv->rx_queue);
230 else {
231 spin_unlock(&priv->rx_queue.lock);
232 return;
233 }
234 spin_unlock(&priv->rx_queue.lock);
235
236 if (unlikely(urb->status)) {
237 usb_free_urb(urb);
238 dev_kfree_skb_irq(skb);
239 return;
240 }
241
242 skb_put(skb, urb->actual_length);
243 hdr = (struct rtl8187_rx_hdr *)(skb_tail_pointer(skb) - sizeof(*hdr));
244 flags = le32_to_cpu(hdr->flags);
245 skb_trim(skb, flags & 0x0FFF);
246
247 signal = hdr->agc >> 1;
248 rate = (flags >> 20) & 0xF;
249 if (rate > 3) { /* OFDM rate */
250 if (signal > 90)
251 signal = 90;
252 else if (signal < 25)
253 signal = 25;
254 signal = 90 - signal;
255 } else { /* CCK rate */
256 if (signal > 95)
257 signal = 95;
258 else if (signal < 30)
259 signal = 30;
260 signal = 95 - signal;
261 }
262
263 rx_status.antenna = (hdr->signal >> 7) & 1;
264 rx_status.signal = 64 - min(hdr->noise, (u8)64);
265 rx_status.ssi = signal;
266 rx_status.rate_idx = rate;
267 rx_status.freq = dev->conf.channel->center_freq;
268 rx_status.band = dev->conf.channel->band;
269 rx_status.mactime = le64_to_cpu(hdr->mac_time);
270 rx_status.flag |= RX_FLAG_TSFT;
271 if (flags & (1 << 13))
272 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
273 ieee80211_rx_irqsafe(dev, skb, &rx_status);
274
275 skb = dev_alloc_skb(RTL8187_MAX_RX);
276 if (unlikely(!skb)) {
277 usb_free_urb(urb);
278 /* TODO check rx queue length and refill *somewhere* */
279 return;
280 }
281
282 info = (struct rtl8187_rx_info *)skb->cb;
283 info->urb = urb;
284 info->dev = dev;
285 urb->transfer_buffer = skb_tail_pointer(skb);
286 urb->context = skb;
287 skb_queue_tail(&priv->rx_queue, skb);
288
289 usb_submit_urb(urb, GFP_ATOMIC);
290 }
291
292 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
293 {
294 struct rtl8187_priv *priv = dev->priv;
295 struct urb *entry;
296 struct sk_buff *skb;
297 struct rtl8187_rx_info *info;
298
299 while (skb_queue_len(&priv->rx_queue) < 8) {
300 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
301 if (!skb)
302 break;
303 entry = usb_alloc_urb(0, GFP_KERNEL);
304 if (!entry) {
305 kfree_skb(skb);
306 break;
307 }
308 usb_fill_bulk_urb(entry, priv->udev,
309 usb_rcvbulkpipe(priv->udev, 1),
310 skb_tail_pointer(skb),
311 RTL8187_MAX_RX, rtl8187_rx_cb, skb);
312 info = (struct rtl8187_rx_info *)skb->cb;
313 info->urb = entry;
314 info->dev = dev;
315 skb_queue_tail(&priv->rx_queue, skb);
316 usb_submit_urb(entry, GFP_KERNEL);
317 }
318
319 return 0;
320 }
321
322 static int rtl8187_init_hw(struct ieee80211_hw *dev)
323 {
324 struct rtl8187_priv *priv = dev->priv;
325 u8 reg;
326 int i;
327
328 /* reset */
329 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
330 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
331 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
332 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
333 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
334 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
335 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
336
337 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
338
339 msleep(200);
340 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
341 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
342 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
343 msleep(200);
344
345 reg = rtl818x_ioread8(priv, &priv->map->CMD);
346 reg &= (1 << 1);
347 reg |= RTL818X_CMD_RESET;
348 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
349
350 i = 10;
351 do {
352 msleep(2);
353 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
354 RTL818X_CMD_RESET))
355 break;
356 } while (--i);
357
358 if (!i) {
359 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
360 return -ETIMEDOUT;
361 }
362
363 /* reload registers from eeprom */
364 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
365
366 i = 10;
367 do {
368 msleep(4);
369 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
370 RTL818X_EEPROM_CMD_CONFIG))
371 break;
372 } while (--i);
373
374 if (!i) {
375 printk(KERN_ERR "%s: eeprom reset timeout!\n",
376 wiphy_name(dev->wiphy));
377 return -ETIMEDOUT;
378 }
379
380 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
381 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
382 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
383 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
384 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
385 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
386 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
387
388 /* setup card */
389 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
390 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
391
392 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
393 rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
394 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
395
396 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
397
398 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
399 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
400 reg &= 0x3F;
401 reg |= 0x80;
402 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
403
404 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
405
406 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
407 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
408 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
409
410 // TODO: set RESP_RATE and BRSR properly
411 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
412 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
413
414 /* host_usb_init */
415 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
416 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
417 reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
418 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
419 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
420 rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
421 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
422 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
423 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
424 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
425 msleep(100);
426
427 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
428 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
429 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
430 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
431 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
432 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
433 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
434 msleep(100);
435
436 priv->rf->init(dev);
437
438 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
439 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
440 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
441 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
442 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
443 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
444 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
445
446 return 0;
447 }
448
449 static int rtl8187_start(struct ieee80211_hw *dev)
450 {
451 struct rtl8187_priv *priv = dev->priv;
452 u32 reg;
453 int ret;
454
455 ret = rtl8187_init_hw(dev);
456 if (ret)
457 return ret;
458
459 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
460
461 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
462 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
463
464 rtl8187_init_urbs(dev);
465
466 reg = RTL818X_RX_CONF_ONLYERLPKT |
467 RTL818X_RX_CONF_RX_AUTORESETPHY |
468 RTL818X_RX_CONF_BSSID |
469 RTL818X_RX_CONF_MGMT |
470 RTL818X_RX_CONF_DATA |
471 (7 << 13 /* RX FIFO threshold NONE */) |
472 (7 << 10 /* MAX RX DMA */) |
473 RTL818X_RX_CONF_BROADCAST |
474 RTL818X_RX_CONF_NICMAC;
475
476 priv->rx_conf = reg;
477 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
478
479 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
480 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
481 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
482 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
483
484 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
485 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
486 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
487 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
488 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
489
490 reg = RTL818X_TX_CONF_CW_MIN |
491 (7 << 21 /* MAX TX DMA */) |
492 RTL818X_TX_CONF_NO_ICV;
493 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
494
495 reg = rtl818x_ioread8(priv, &priv->map->CMD);
496 reg |= RTL818X_CMD_TX_ENABLE;
497 reg |= RTL818X_CMD_RX_ENABLE;
498 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
499
500 return 0;
501 }
502
503 static void rtl8187_stop(struct ieee80211_hw *dev)
504 {
505 struct rtl8187_priv *priv = dev->priv;
506 struct rtl8187_rx_info *info;
507 struct sk_buff *skb;
508 u32 reg;
509
510 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
511
512 reg = rtl818x_ioread8(priv, &priv->map->CMD);
513 reg &= ~RTL818X_CMD_TX_ENABLE;
514 reg &= ~RTL818X_CMD_RX_ENABLE;
515 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
516
517 priv->rf->stop(dev);
518
519 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
520 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
521 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
522 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
523
524 while ((skb = skb_dequeue(&priv->rx_queue))) {
525 info = (struct rtl8187_rx_info *)skb->cb;
526 usb_kill_urb(info->urb);
527 kfree_skb(skb);
528 }
529 return;
530 }
531
532 static int rtl8187_add_interface(struct ieee80211_hw *dev,
533 struct ieee80211_if_init_conf *conf)
534 {
535 struct rtl8187_priv *priv = dev->priv;
536 int i;
537
538 if (priv->mode != IEEE80211_IF_TYPE_MNTR)
539 return -EOPNOTSUPP;
540
541 switch (conf->type) {
542 case IEEE80211_IF_TYPE_STA:
543 priv->mode = conf->type;
544 break;
545 default:
546 return -EOPNOTSUPP;
547 }
548
549 priv->vif = conf->vif;
550
551 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
552 for (i = 0; i < ETH_ALEN; i++)
553 rtl818x_iowrite8(priv, &priv->map->MAC[i],
554 ((u8 *)conf->mac_addr)[i]);
555 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
556
557 return 0;
558 }
559
560 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
561 struct ieee80211_if_init_conf *conf)
562 {
563 struct rtl8187_priv *priv = dev->priv;
564 priv->mode = IEEE80211_IF_TYPE_MNTR;
565 priv->vif = NULL;
566 }
567
568 static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
569 {
570 struct rtl8187_priv *priv = dev->priv;
571 u32 reg;
572
573 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
574 /* Enable TX loopback on MAC level to avoid TX during channel
575 * changes, as this has be seen to causes problems and the
576 * card will stop work until next reset
577 */
578 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
579 reg | RTL818X_TX_CONF_LOOPBACK_MAC);
580 msleep(10);
581 priv->rf->set_chan(dev, conf);
582 msleep(10);
583 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
584
585 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
586
587 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
588 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
589 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
590 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
591 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
592 } else {
593 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
594 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
595 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
596 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
597 }
598
599 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
600 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
601 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
602 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
603 return 0;
604 }
605
606 static int rtl8187_config_interface(struct ieee80211_hw *dev,
607 struct ieee80211_vif *vif,
608 struct ieee80211_if_conf *conf)
609 {
610 struct rtl8187_priv *priv = dev->priv;
611 int i;
612
613 for (i = 0; i < ETH_ALEN; i++)
614 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
615
616 if (is_valid_ether_addr(conf->bssid))
617 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
618 else
619 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
620
621 return 0;
622 }
623
624 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
625 unsigned int changed_flags,
626 unsigned int *total_flags,
627 int mc_count, struct dev_addr_list *mclist)
628 {
629 struct rtl8187_priv *priv = dev->priv;
630
631 if (changed_flags & FIF_FCSFAIL)
632 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
633 if (changed_flags & FIF_CONTROL)
634 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
635 if (changed_flags & FIF_OTHER_BSS)
636 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
637 if (*total_flags & FIF_ALLMULTI || mc_count > 0)
638 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
639 else
640 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
641
642 *total_flags = 0;
643
644 if (priv->rx_conf & RTL818X_RX_CONF_FCS)
645 *total_flags |= FIF_FCSFAIL;
646 if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
647 *total_flags |= FIF_CONTROL;
648 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
649 *total_flags |= FIF_OTHER_BSS;
650 if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
651 *total_flags |= FIF_ALLMULTI;
652
653 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
654 }
655
656 static const struct ieee80211_ops rtl8187_ops = {
657 .tx = rtl8187_tx,
658 .start = rtl8187_start,
659 .stop = rtl8187_stop,
660 .add_interface = rtl8187_add_interface,
661 .remove_interface = rtl8187_remove_interface,
662 .config = rtl8187_config,
663 .config_interface = rtl8187_config_interface,
664 .configure_filter = rtl8187_configure_filter,
665 };
666
667 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
668 {
669 struct ieee80211_hw *dev = eeprom->data;
670 struct rtl8187_priv *priv = dev->priv;
671 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
672
673 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
674 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
675 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
676 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
677 }
678
679 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
680 {
681 struct ieee80211_hw *dev = eeprom->data;
682 struct rtl8187_priv *priv = dev->priv;
683 u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
684
685 if (eeprom->reg_data_in)
686 reg |= RTL818X_EEPROM_CMD_WRITE;
687 if (eeprom->reg_data_out)
688 reg |= RTL818X_EEPROM_CMD_READ;
689 if (eeprom->reg_data_clock)
690 reg |= RTL818X_EEPROM_CMD_CK;
691 if (eeprom->reg_chip_select)
692 reg |= RTL818X_EEPROM_CMD_CS;
693
694 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
695 udelay(10);
696 }
697
698 static int __devinit rtl8187_probe(struct usb_interface *intf,
699 const struct usb_device_id *id)
700 {
701 struct usb_device *udev = interface_to_usbdev(intf);
702 struct ieee80211_hw *dev;
703 struct rtl8187_priv *priv;
704 struct eeprom_93cx6 eeprom;
705 struct ieee80211_channel *channel;
706 u16 txpwr, reg;
707 int err, i;
708 DECLARE_MAC_BUF(mac);
709
710 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
711 if (!dev) {
712 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
713 return -ENOMEM;
714 }
715
716 priv = dev->priv;
717
718 SET_IEEE80211_DEV(dev, &intf->dev);
719 usb_set_intfdata(intf, dev);
720 priv->udev = udev;
721
722 usb_get_dev(udev);
723
724 skb_queue_head_init(&priv->rx_queue);
725
726 BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
727 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
728
729 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
730 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
731 priv->map = (struct rtl818x_csr *)0xFF00;
732
733 priv->band.band = IEEE80211_BAND_2GHZ;
734 priv->band.channels = priv->channels;
735 priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
736 priv->band.bitrates = priv->rates;
737 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
738 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
739
740
741 priv->mode = IEEE80211_IF_TYPE_MNTR;
742 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
743 IEEE80211_HW_RX_INCLUDES_FCS;
744 dev->extra_tx_headroom = sizeof(struct rtl8187_tx_hdr);
745 dev->queues = 1;
746 dev->max_rssi = 65;
747 dev->max_signal = 64;
748
749 eeprom.data = dev;
750 eeprom.register_read = rtl8187_eeprom_register_read;
751 eeprom.register_write = rtl8187_eeprom_register_write;
752 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
753 eeprom.width = PCI_EEPROM_WIDTH_93C66;
754 else
755 eeprom.width = PCI_EEPROM_WIDTH_93C46;
756
757 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
758 udelay(10);
759
760 eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
761 (__le16 __force *)dev->wiphy->perm_addr, 3);
762 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
763 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
764 "generated MAC address\n");
765 random_ether_addr(dev->wiphy->perm_addr);
766 }
767
768 channel = priv->channels;
769 for (i = 0; i < 3; i++) {
770 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
771 &txpwr);
772 (*channel++).hw_value = txpwr & 0xFF;
773 (*channel++).hw_value = txpwr >> 8;
774 }
775 for (i = 0; i < 2; i++) {
776 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
777 &txpwr);
778 (*channel++).hw_value = txpwr & 0xFF;
779 (*channel++).hw_value = txpwr >> 8;
780 }
781 for (i = 0; i < 2; i++) {
782 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6 + i,
783 &txpwr);
784 (*channel++).hw_value = txpwr & 0xFF;
785 (*channel++).hw_value = txpwr >> 8;
786 }
787
788 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
789 &priv->txpwr_base);
790
791 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
792 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
793 /* 0 means asic B-cut, we should use SW 3 wire
794 * bit-by-bit banging for radio. 1 means we can use
795 * USB specific request to write radio registers */
796 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
797 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
798 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
799
800 priv->rf = rtl8187_detect_rf(dev);
801
802 err = ieee80211_register_hw(dev);
803 if (err) {
804 printk(KERN_ERR "rtl8187: Cannot register device\n");
805 goto err_free_dev;
806 }
807
808 printk(KERN_INFO "%s: hwaddr %s, rtl8187 V%d + %s\n",
809 wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
810 priv->asic_rev, priv->rf->name);
811
812 return 0;
813
814 err_free_dev:
815 ieee80211_free_hw(dev);
816 usb_set_intfdata(intf, NULL);
817 usb_put_dev(udev);
818 return err;
819 }
820
821 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
822 {
823 struct ieee80211_hw *dev = usb_get_intfdata(intf);
824 struct rtl8187_priv *priv;
825
826 if (!dev)
827 return;
828
829 ieee80211_unregister_hw(dev);
830
831 priv = dev->priv;
832 usb_put_dev(interface_to_usbdev(intf));
833 ieee80211_free_hw(dev);
834 }
835
836 static struct usb_driver rtl8187_driver = {
837 .name = KBUILD_MODNAME,
838 .id_table = rtl8187_table,
839 .probe = rtl8187_probe,
840 .disconnect = rtl8187_disconnect,
841 };
842
843 static int __init rtl8187_init(void)
844 {
845 return usb_register(&rtl8187_driver);
846 }
847
848 static void __exit rtl8187_exit(void)
849 {
850 usb_deregister(&rtl8187_driver);
851 }
852
853 module_init(rtl8187_init);
854 module_exit(rtl8187_exit);
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