2 * PS3 platform declarations.
4 * Copyright (C) 2006 Sony Computer Entertainment Inc.
5 * Copyright 2006 Sony Corp.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #if !defined(_PS3_PLATFORM_H)
22 #define _PS3_PLATFORM_H
24 #include <linux/rtc.h>
25 #include <scsi/scsi.h>
31 void __init
ps3_hpte_init(unsigned long htab_size
);
32 void __init
ps3_map_htab(void);
36 void __init
ps3_mm_init(void);
37 void __init
ps3_mm_vas_create(unsigned long* htab_size
);
38 void ps3_mm_vas_destroy(void);
39 void ps3_mm_shutdown(void);
43 void ps3_init_IRQ(void);
44 void ps3_shutdown_IRQ(int cpu
);
45 void __init
ps3_register_ipi_debug_brk(unsigned int cpu
, unsigned int virq
);
49 void smp_init_ps3(void);
50 void ps3_smp_cleanup_cpu(int cpu
);
54 void __init
ps3_calibrate_decr(void);
55 unsigned long __init
ps3_get_boot_time(void);
56 void ps3_get_rtc_time(struct rtc_time
*time
);
57 int ps3_set_rtc_time(struct rtc_time
*time
);
61 int __init
ps3_os_area_init(void);
62 u64
ps3_os_area_rtc_diff(void);
66 #if defined(CONFIG_SPU_BASE)
67 void ps3_spu_set_platform (void);
69 static inline void ps3_spu_set_platform (void) {}
72 /* repository bus info */
76 PS3_BUS_TYPE_STORAGE
= 5,
80 PS3_DEV_TYPE_STOR_DISK
= TYPE_DISK
, /* 0 */
81 PS3_DEV_TYPE_SB_GELIC
= 3,
82 PS3_DEV_TYPE_SB_USB
= 4,
83 PS3_DEV_TYPE_STOR_ROM
= TYPE_ROM
, /* 5 */
84 PS3_DEV_TYPE_SB_GPIO
= 6,
85 PS3_DEV_TYPE_STOR_FLASH
= TYPE_RBC
, /* 14 */
86 PS3_DEV_TYPE_NOACCESS
= 255,
89 int ps3_repository_read_bus_str(unsigned int bus_index
, const char *bus_str
,
91 int ps3_repository_read_bus_id(unsigned int bus_index
, unsigned int *bus_id
);
92 int ps3_repository_read_bus_type(unsigned int bus_index
,
93 enum ps3_bus_type
*bus_type
);
94 int ps3_repository_read_bus_num_dev(unsigned int bus_index
,
95 unsigned int *num_dev
);
97 /* repository bus device info */
99 enum ps3_interrupt_type
{
100 PS3_INTERRUPT_TYPE_EVENT_PORT
= 2,
101 PS3_INTERRUPT_TYPE_SB_OHCI
= 3,
102 PS3_INTERRUPT_TYPE_SB_EHCI
= 4,
103 PS3_INTERRUPT_TYPE_OTHER
= 5,
107 PS3_REG_TYPE_SB_OHCI
= 3,
108 PS3_REG_TYPE_SB_EHCI
= 4,
109 PS3_REG_TYPE_SB_GPIO
= 5,
112 int ps3_repository_read_dev_str(unsigned int bus_index
,
113 unsigned int dev_index
, const char *dev_str
, u64
*value
);
114 int ps3_repository_read_dev_id(unsigned int bus_index
, unsigned int dev_index
,
115 unsigned int *dev_id
);
116 int ps3_repository_read_dev_type(unsigned int bus_index
,
117 unsigned int dev_index
, enum ps3_dev_type
*dev_type
);
118 int ps3_repository_read_dev_intr(unsigned int bus_index
,
119 unsigned int dev_index
, unsigned int intr_index
,
120 enum ps3_interrupt_type
*intr_type
, unsigned int *interrupt_id
);
121 int ps3_repository_read_dev_reg_type(unsigned int bus_index
,
122 unsigned int dev_index
, unsigned int reg_index
,
123 enum ps3_reg_type
*reg_type
);
124 int ps3_repository_read_dev_reg_addr(unsigned int bus_index
,
125 unsigned int dev_index
, unsigned int reg_index
, u64
*bus_addr
,
127 int ps3_repository_read_dev_reg(unsigned int bus_index
,
128 unsigned int dev_index
, unsigned int reg_index
,
129 enum ps3_reg_type
*reg_type
, u64
*bus_addr
, u64
*len
);
131 /* repository bus enumerators */
133 struct ps3_repository_device
{
134 enum ps3_bus_type bus_type
;
135 unsigned int bus_index
;
137 enum ps3_dev_type dev_type
;
138 unsigned int dev_index
;
142 static inline struct ps3_repository_device
*ps3_repository_bump_device(
143 struct ps3_repository_device
*repo
)
148 int ps3_repository_find_device(struct ps3_repository_device
*repo
);
149 int ps3_repository_find_devices(enum ps3_bus_type bus_type
,
150 int (*callback
)(const struct ps3_repository_device
*repo
));
151 int ps3_repository_find_bus(enum ps3_bus_type bus_type
, unsigned int from
,
152 unsigned int *bus_index
);
153 int ps3_repository_find_interrupt(const struct ps3_repository_device
*repo
,
154 enum ps3_interrupt_type intr_type
, unsigned int *interrupt_id
);
155 int ps3_repository_find_reg(const struct ps3_repository_device
*repo
,
156 enum ps3_reg_type reg_type
, u64
*bus_addr
, u64
*len
);
158 /* repository block device info */
160 int ps3_repository_read_stor_dev_port(unsigned int bus_index
,
161 unsigned int dev_index
, u64
*port
);
162 int ps3_repository_read_stor_dev_blk_size(unsigned int bus_index
,
163 unsigned int dev_index
, u64
*blk_size
);
164 int ps3_repository_read_stor_dev_num_blocks(unsigned int bus_index
,
165 unsigned int dev_index
, u64
*num_blocks
);
166 int ps3_repository_read_stor_dev_num_regions(unsigned int bus_index
,
167 unsigned int dev_index
, unsigned int *num_regions
);
168 int ps3_repository_read_stor_dev_region_id(unsigned int bus_index
,
169 unsigned int dev_index
, unsigned int region_index
,
170 unsigned int *region_id
);
171 int ps3_repository_read_stor_dev_region_size(unsigned int bus_index
,
172 unsigned int dev_index
, unsigned int region_index
, u64
*region_size
);
173 int ps3_repository_read_stor_dev_region_start(unsigned int bus_index
,
174 unsigned int dev_index
, unsigned int region_index
, u64
*region_start
);
175 int ps3_repository_read_stor_dev_info(unsigned int bus_index
,
176 unsigned int dev_index
, u64
*port
, u64
*blk_size
,
177 u64
*num_blocks
, unsigned int *num_regions
);
178 int ps3_repository_read_stor_dev_region(unsigned int bus_index
,
179 unsigned int dev_index
, unsigned int region_index
,
180 unsigned int *region_id
, u64
*region_start
, u64
*region_size
);
182 /* repository pu and memory info */
184 int ps3_repository_read_num_pu(unsigned int *num_pu
);
185 int ps3_repository_read_ppe_id(unsigned int *pu_index
, unsigned int *ppe_id
);
186 int ps3_repository_read_rm_base(unsigned int ppe_id
, u64
*rm_base
);
187 int ps3_repository_read_rm_size(unsigned int ppe_id
, u64
*rm_size
);
188 int ps3_repository_read_region_total(u64
*region_total
);
189 int ps3_repository_read_mm_info(u64
*rm_base
, u64
*rm_size
,
192 /* repository pme info */
194 int ps3_repository_read_num_be(unsigned int *num_be
);
195 int ps3_repository_read_be_node_id(unsigned int be_index
, u64
*node_id
);
196 int ps3_repository_read_tb_freq(u64 node_id
, u64
*tb_freq
);
197 int ps3_repository_read_be_tb_freq(unsigned int be_index
, u64
*tb_freq
);
199 /* repository 'Other OS' area */
201 int ps3_repository_read_boot_dat_addr(u64
*lpar_addr
);
202 int ps3_repository_read_boot_dat_size(unsigned int *size
);
203 int ps3_repository_read_boot_dat_info(u64
*lpar_addr
, unsigned int *size
);
205 /* repository spu info */
208 * enum spu_resource_type - Type of spu resource.
209 * @spu_resource_type_shared: Logical spu is shared with other partions.
210 * @spu_resource_type_exclusive: Logical spu is not shared with other partions.
212 * Returned by ps3_repository_read_spu_resource_id().
215 enum ps3_spu_resource_type
{
216 PS3_SPU_RESOURCE_TYPE_SHARED
= 0,
217 PS3_SPU_RESOURCE_TYPE_EXCLUSIVE
= 0x8000000000000000UL
,
220 int ps3_repository_read_num_spu_reserved(unsigned int *num_spu_reserved
);
221 int ps3_repository_read_num_spu_resource_id(unsigned int *num_resource_id
);
222 int ps3_repository_read_spu_resource_id(unsigned int res_index
,
223 enum ps3_spu_resource_type
* resource_type
, unsigned int *resource_id
);
225 /* repository vuart info */
227 int ps3_repository_read_vuart_av_port(unsigned int *port
);
228 int ps3_repository_read_vuart_sysmgr_port(unsigned int *port
);
230 /* Page table entries */
231 #define IOPTE_PP_W 0x8000000000000000ul /* protection: write */
232 #define IOPTE_PP_R 0x4000000000000000ul /* protection: read */
233 #define IOPTE_M 0x2000000000000000ul /* coherency required */
234 #define IOPTE_SO_R 0x1000000000000000ul /* ordering: writes */
235 #define IOPTE_SO_RW 0x1800000000000000ul /* ordering: r & w */
236 #define IOPTE_RPN_Mask 0x07fffffffffff000ul /* RPN */
237 #define IOPTE_H 0x0000000000000800ul /* cache hint */
238 #define IOPTE_IOID_Mask 0x00000000000007fful /* ioid */