PCI: add ICH7/8 ACPI/GPIO io resource quirks
[pv_ops_mirror.git] / arch / ppc / kernel / ppc_htab.c
blobbd129d3c2cc13af95228168f53d6cf76df5d2666
1 /*
2 * PowerPC hash table management proc entry. Will show information
3 * about the current hash table and will allow changes to it.
5 * Written by Cort Dougan (cort@cs.nmt.edu)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
13 #include <linux/errno.h>
14 #include <linux/sched.h>
15 #include <linux/proc_fs.h>
16 #include <linux/stat.h>
17 #include <linux/sysctl.h>
18 #include <linux/capability.h>
19 #include <linux/ctype.h>
20 #include <linux/threads.h>
21 #include <linux/smp_lock.h>
22 #include <linux/seq_file.h>
23 #include <linux/init.h>
24 #include <linux/bitops.h>
26 #include <asm/uaccess.h>
27 #include <asm/mmu.h>
28 #include <asm/residual.h>
29 #include <asm/io.h>
30 #include <asm/pgtable.h>
31 #include <asm/cputable.h>
32 #include <asm/system.h>
33 #include <asm/reg.h>
35 static int ppc_htab_show(struct seq_file *m, void *v);
36 static ssize_t ppc_htab_write(struct file * file, const char __user * buffer,
37 size_t count, loff_t *ppos);
38 extern PTE *Hash, *Hash_end;
39 extern unsigned long Hash_size, Hash_mask;
40 extern unsigned long _SDR1;
41 extern unsigned long htab_reloads;
42 extern unsigned long htab_preloads;
43 extern unsigned long htab_evicts;
44 extern unsigned long pte_misses;
45 extern unsigned long pte_errors;
46 extern unsigned int primary_pteg_full;
47 extern unsigned int htab_hash_searches;
49 static int ppc_htab_open(struct inode *inode, struct file *file)
51 return single_open(file, ppc_htab_show, NULL);
54 const struct file_operations ppc_htab_operations = {
55 .open = ppc_htab_open,
56 .read = seq_read,
57 .llseek = seq_lseek,
58 .write = ppc_htab_write,
59 .release = single_release,
62 static char *pmc1_lookup(unsigned long mmcr0)
64 switch ( mmcr0 & (0x7f<<7) )
66 case 0x0:
67 return "none";
68 case MMCR0_PMC1_CYCLES:
69 return "cycles";
70 case MMCR0_PMC1_ICACHEMISS:
71 return "ic miss";
72 case MMCR0_PMC1_DTLB:
73 return "dtlb miss";
74 default:
75 return "unknown";
79 static char *pmc2_lookup(unsigned long mmcr0)
81 switch ( mmcr0 & 0x3f )
83 case 0x0:
84 return "none";
85 case MMCR0_PMC2_CYCLES:
86 return "cycles";
87 case MMCR0_PMC2_DCACHEMISS:
88 return "dc miss";
89 case MMCR0_PMC2_ITLB:
90 return "itlb miss";
91 case MMCR0_PMC2_LOADMISSTIME:
92 return "load miss time";
93 default:
94 return "unknown";
99 * print some useful info about the hash table. This function
100 * is _REALLY_ slow (see the nested for loops below) but nothing
101 * in here should be really timing critical. -- Cort
103 static int ppc_htab_show(struct seq_file *m, void *v)
105 unsigned long mmcr0 = 0, pmc1 = 0, pmc2 = 0;
106 #if defined(CONFIG_PPC_STD_MMU)
107 unsigned int kptes = 0, uptes = 0;
108 PTE *ptr;
109 #endif /* CONFIG_PPC_STD_MMU */
111 if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
112 mmcr0 = mfspr(SPRN_MMCR0);
113 pmc1 = mfspr(SPRN_PMC1);
114 pmc2 = mfspr(SPRN_PMC2);
115 seq_printf(m,
116 "604 Performance Monitoring\n"
117 "MMCR0\t\t: %08lx %s%s ",
118 mmcr0,
119 ( mmcr0>>28 & 0x2 ) ? "(user mode counted)" : "",
120 ( mmcr0>>28 & 0x4 ) ? "(kernel mode counted)" : "");
121 seq_printf(m,
122 "\nPMC1\t\t: %08lx (%s)\n"
123 "PMC2\t\t: %08lx (%s)\n",
124 pmc1, pmc1_lookup(mmcr0),
125 pmc2, pmc2_lookup(mmcr0));
128 #ifdef CONFIG_PPC_STD_MMU
129 /* if we don't have a htab */
130 if ( Hash_size == 0 ) {
131 seq_printf(m, "No Hash Table used\n");
132 return 0;
135 for (ptr = Hash; ptr < Hash_end; ptr++) {
136 unsigned int mctx, vsid;
138 if (!ptr->v)
139 continue;
140 /* undo the esid skew */
141 vsid = ptr->vsid;
142 mctx = ((vsid - (vsid & 0xf) * 0x111) >> 4) & 0xfffff;
143 if (mctx == 0)
144 kptes++;
145 else
146 uptes++;
149 seq_printf(m,
150 "PTE Hash Table Information\n"
151 "Size\t\t: %luKb\n"
152 "Buckets\t\t: %lu\n"
153 "Address\t\t: %08lx\n"
154 "Entries\t\t: %lu\n"
155 "User ptes\t: %u\n"
156 "Kernel ptes\t: %u\n"
157 "Percent full\t: %lu%%\n"
158 , (unsigned long)(Hash_size>>10),
159 (Hash_size/(sizeof(PTE)*8)),
160 (unsigned long)Hash,
161 Hash_size/sizeof(PTE)
162 , uptes,
163 kptes,
164 ((kptes+uptes)*100) / (Hash_size/sizeof(PTE))
167 seq_printf(m,
168 "Reloads\t\t: %lu\n"
169 "Preloads\t: %lu\n"
170 "Searches\t: %u\n"
171 "Overflows\t: %u\n"
172 "Evicts\t\t: %lu\n",
173 htab_reloads, htab_preloads, htab_hash_searches,
174 primary_pteg_full, htab_evicts);
175 #endif /* CONFIG_PPC_STD_MMU */
177 seq_printf(m,
178 "Non-error misses: %lu\n"
179 "Error misses\t: %lu\n",
180 pte_misses, pte_errors);
181 return 0;
185 * Allow user to define performance counters and resize the hash table
187 static ssize_t ppc_htab_write(struct file * file, const char __user * ubuffer,
188 size_t count, loff_t *ppos)
190 #ifdef CONFIG_PPC_STD_MMU
191 unsigned long tmp;
192 char buffer[16];
194 if (!capable(CAP_SYS_ADMIN))
195 return -EACCES;
196 if (strncpy_from_user(buffer, ubuffer, 15))
197 return -EFAULT;
198 buffer[15] = 0;
200 /* don't set the htab size for now */
201 if ( !strncmp( buffer, "size ", 5) )
202 return -EBUSY;
204 if ( !strncmp( buffer, "reset", 5) )
206 if (cpu_has_feature(CPU_FTR_604_PERF_MON)) {
207 /* reset PMC1 and PMC2 */
208 mtspr(SPRN_PMC1, 0);
209 mtspr(SPRN_PMC2, 0);
211 htab_reloads = 0;
212 htab_evicts = 0;
213 pte_misses = 0;
214 pte_errors = 0;
217 /* Everything below here requires the performance monitor feature. */
218 if (!cpu_has_feature(CPU_FTR_604_PERF_MON))
219 return count;
221 /* turn off performance monitoring */
222 if ( !strncmp( buffer, "off", 3) )
224 mtspr(SPRN_MMCR0, 0);
225 mtspr(SPRN_PMC1, 0);
226 mtspr(SPRN_PMC2, 0);
229 if ( !strncmp( buffer, "user", 4) )
231 /* setup mmcr0 and clear the correct pmc */
232 tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x20000000;
233 mtspr(SPRN_MMCR0, tmp);
234 mtspr(SPRN_PMC1, 0);
235 mtspr(SPRN_PMC2, 0);
238 if ( !strncmp( buffer, "kernel", 6) )
240 /* setup mmcr0 and clear the correct pmc */
241 tmp = (mfspr(SPRN_MMCR0) & ~(0x60000000)) | 0x40000000;
242 mtspr(SPRN_MMCR0, tmp);
243 mtspr(SPRN_PMC1, 0);
244 mtspr(SPRN_PMC2, 0);
247 /* PMC1 values */
248 if ( !strncmp( buffer, "dtlb", 4) )
250 /* setup mmcr0 and clear the correct pmc */
251 tmp = (mfspr(SPRN_MMCR0) & ~(0x7F << 7)) | MMCR0_PMC1_DTLB;
252 mtspr(SPRN_MMCR0, tmp);
253 mtspr(SPRN_PMC1, 0);
256 if ( !strncmp( buffer, "ic miss", 7) )
258 /* setup mmcr0 and clear the correct pmc */
259 tmp = (mfspr(SPRN_MMCR0) & ~(0x7F<<7)) | MMCR0_PMC1_ICACHEMISS;
260 mtspr(SPRN_MMCR0, tmp);
261 mtspr(SPRN_PMC1, 0);
264 /* PMC2 values */
265 if ( !strncmp( buffer, "load miss time", 14) )
267 /* setup mmcr0 and clear the correct pmc */
268 asm volatile(
269 "mfspr %0,%1\n\t" /* get current mccr0 */
270 "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
271 "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
272 "mtspr %1,%0 \n\t" /* set new mccr0 */
273 "mtspr %3,%4 \n\t" /* reset the pmc */
274 : "=r" (tmp)
275 : "i" (SPRN_MMCR0),
276 "i" (MMCR0_PMC2_LOADMISSTIME),
277 "i" (SPRN_PMC2), "r" (0) );
280 if ( !strncmp( buffer, "itlb", 4) )
282 /* setup mmcr0 and clear the correct pmc */
283 asm volatile(
284 "mfspr %0,%1\n\t" /* get current mccr0 */
285 "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
286 "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
287 "mtspr %1,%0 \n\t" /* set new mccr0 */
288 "mtspr %3,%4 \n\t" /* reset the pmc */
289 : "=r" (tmp)
290 : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_ITLB),
291 "i" (SPRN_PMC2), "r" (0) );
294 if ( !strncmp( buffer, "dc miss", 7) )
296 /* setup mmcr0 and clear the correct pmc */
297 asm volatile(
298 "mfspr %0,%1\n\t" /* get current mccr0 */
299 "rlwinm %0,%0,0,0,31-6\n\t" /* clear bits [26-31] */
300 "ori %0,%0,%2 \n\t" /* or in mmcr0 settings */
301 "mtspr %1,%0 \n\t" /* set new mccr0 */
302 "mtspr %3,%4 \n\t" /* reset the pmc */
303 : "=r" (tmp)
304 : "i" (SPRN_MMCR0), "i" (MMCR0_PMC2_DCACHEMISS),
305 "i" (SPRN_PMC2), "r" (0) );
308 return count;
309 #else /* CONFIG_PPC_STD_MMU */
310 return 0;
311 #endif /* CONFIG_PPC_STD_MMU */
314 int proc_dol2crvec(ctl_table *table, int write, struct file *filp,
315 void __user *buffer_arg, size_t *lenp, loff_t *ppos)
317 int vleft, first=1, len, left, val;
318 char __user *buffer = (char __user *) buffer_arg;
319 #define TMPBUFLEN 256
320 char buf[TMPBUFLEN], *p;
321 static const char *sizestrings[4] = {
322 "2MB", "256KB", "512KB", "1MB"
324 static const char *clockstrings[8] = {
325 "clock disabled", "+1 clock", "+1.5 clock", "reserved(3)",
326 "+2 clock", "+2.5 clock", "+3 clock", "reserved(7)"
328 static const char *typestrings[4] = {
329 "flow-through burst SRAM", "reserved SRAM",
330 "pipelined burst SRAM", "pipelined late-write SRAM"
332 static const char *holdstrings[4] = {
333 "0.5", "1.0", "(reserved2)", "(reserved3)"
336 if (!cpu_has_feature(CPU_FTR_L2CR))
337 return -EFAULT;
339 if ( /*!table->maxlen ||*/ (*ppos && !write)) {
340 *lenp = 0;
341 return 0;
344 vleft = table->maxlen / sizeof(int);
345 left = *lenp;
347 for (; left /*&& vleft--*/; first=0) {
348 if (write) {
349 while (left) {
350 char c;
351 if(get_user(c, buffer))
352 return -EFAULT;
353 if (!isspace(c))
354 break;
355 left--;
356 buffer++;
358 if (!left)
359 break;
360 len = left;
361 if (len > TMPBUFLEN-1)
362 len = TMPBUFLEN-1;
363 if(copy_from_user(buf, buffer, len))
364 return -EFAULT;
365 buf[len] = 0;
366 p = buf;
367 if (*p < '0' || *p > '9')
368 break;
369 val = simple_strtoul(p, &p, 0);
370 len = p-buf;
371 if ((len < left) && *p && !isspace(*p))
372 break;
373 buffer += len;
374 left -= len;
375 _set_L2CR(val);
376 } else {
377 p = buf;
378 if (!first)
379 *p++ = '\t';
380 val = _get_L2CR();
381 p += sprintf(p, "0x%08x: ", val);
382 p += sprintf(p, " %s", (val >> 31) & 1 ? "enabled" :
383 "disabled");
384 p += sprintf(p, ", %sparity", (val>>30)&1 ? "" : "no ");
385 p += sprintf(p, ", %s", sizestrings[(val >> 28) & 3]);
386 p += sprintf(p, ", %s", clockstrings[(val >> 25) & 7]);
387 p += sprintf(p, ", %s", typestrings[(val >> 23) & 2]);
388 p += sprintf(p, "%s", (val>>22)&1 ? ", data only" : "");
389 p += sprintf(p, "%s", (val>>20)&1 ? ", ZZ enabled": "");
390 p += sprintf(p, ", %s", (val>>19)&1 ? "write-through" :
391 "copy-back");
392 p += sprintf(p, "%s", (val>>18)&1 ? ", testing" : "");
393 p += sprintf(p, ", %sns hold",holdstrings[(val>>16)&3]);
394 p += sprintf(p, "%s", (val>>15)&1 ? ", DLL slow" : "");
395 p += sprintf(p, "%s", (val>>14)&1 ? ", diff clock" :"");
396 p += sprintf(p, "%s", (val>>13)&1 ? ", DLL bypass" :"");
398 p += sprintf(p,"\n");
400 len = strlen(buf);
401 if (len > left)
402 len = left;
403 if (copy_to_user(buffer, buf, len))
404 return -EFAULT;
405 left -= len;
406 buffer += len;
407 break;
411 if (!write && !first && left) {
412 if(put_user('\n', (char __user *) buffer))
413 return -EFAULT;
414 left--, buffer++;
416 if (write) {
417 char __user *s = (char __user *) buffer;
418 while (left) {
419 char c;
420 if(get_user(c, s++))
421 return -EFAULT;
422 if (!isspace(c))
423 break;
424 left--;
427 if (write && first)
428 return -EINVAL;
429 *lenp -= left;
430 *ppos += *lenp;
431 return 0;
434 #ifdef CONFIG_SYSCTL
436 * Register our sysctl.
438 static ctl_table htab_ctl_table[]={
440 .ctl_name = KERN_PPC_L2CR,
441 .procname = "l2cr",
442 .mode = 0644,
443 .proc_handler = &proc_dol2crvec,
445 { 0, },
447 static ctl_table htab_sysctl_root[] = {
448 { 1, "kernel", NULL, 0, 0755, htab_ctl_table, },
449 { 0,},
452 static int __init
453 register_ppc_htab_sysctl(void)
455 register_sysctl_table(htab_sysctl_root, 0);
457 return 0;
460 __initcall(register_ppc_htab_sysctl);
461 #endif