arch/ppc/kernel/traps.c

   1 /*
   2  *  Copyright (C) 1995-1996  Gary Thomas (gdt@linuxppc.org)
   3  *
   4  *  This program is free software; you can redistribute it and/or
   5  *  modify it under the terms of the GNU General Public License
   6  *  as published by the Free Software Foundation; either version
   7  *  2 of the License, or (at your option) any later version.
   8  *
   9  *  Modified by Cort Dougan (cort@cs.nmt.edu)
  10  *  and Paul Mackerras (paulus@cs.anu.edu.au)
  11  */
  12
  13 /*
  14  * This file handles the architecture-dependent parts of hardware exceptions
  15  */
  16
  17 #include <linux/errno.h>
  18 #include <linux/sched.h>
  19 #include <linux/kernel.h>
  20 #include <linux/mm.h>
  21 #include <linux/stddef.h>
  22 #include <linux/unistd.h>
  23 #include <linux/ptrace.h>
  24 #include <linux/slab.h>
  25 #include <linux/user.h>
  26 #include <linux/a.out.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/init.h>
  29 #include <linux/module.h>
  30 #include <linux/prctl.h>
  31
  32 #include <asm/pgtable.h>
  33 #include <asm/uaccess.h>
  34 #include <asm/system.h>
  35 #include <asm/io.h>
  36 #include <asm/reg.h>
  37 #include <asm/xmon.h>
  38 #include <asm/pmc.h>
  39
  40 #ifdef CONFIG_XMON
  41 extern int xmon_bpt(struct pt_regs *regs);
  42 extern int xmon_sstep(struct pt_regs *regs);
  43 extern int xmon_iabr_match(struct pt_regs *regs);
  44 extern int xmon_dabr_match(struct pt_regs *regs);
  45
  46 int (*debugger)(struct pt_regs *regs) = xmon;
  47 int (*debugger_bpt)(struct pt_regs *regs) = xmon_bpt;
  48 int (*debugger_sstep)(struct pt_regs *regs) = xmon_sstep;
  49 int (*debugger_iabr_match)(struct pt_regs *regs) = xmon_iabr_match;
  50 int (*debugger_dabr_match)(struct pt_regs *regs) = xmon_dabr_match;
  51 void (*debugger_fault_handler)(struct pt_regs *regs);
  52 #else
  53 #ifdef CONFIG_KGDB
  54 int (*debugger)(struct pt_regs *regs);
  55 int (*debugger_bpt)(struct pt_regs *regs);
  56 int (*debugger_sstep)(struct pt_regs *regs);
  57 int (*debugger_iabr_match)(struct pt_regs *regs);
  58 int (*debugger_dabr_match)(struct pt_regs *regs);
  59 void (*debugger_fault_handler)(struct pt_regs *regs);
  60 #else
  61 #define debugger(regs)                  do { } while (0)
  62 #define debugger_bpt(regs)              0
  63 #define debugger_sstep(regs)            0
  64 #define debugger_iabr_match(regs)       0
  65 #define debugger_dabr_match(regs)       0
  66 #define debugger_fault_handler          ((void (*)(struct pt_regs *))0)
  67 #endif
  68 #endif
  69
  70 /*
  71  * Trap & Exception support
  72  */
  73
  74 DEFINE_SPINLOCK(die_lock);
  75
  76 int die(const char * str, struct pt_regs * fp, long err)
  77 {
  78         static int die_counter;
  79         int nl = 0;
  80         console_verbose();
  81         spin_lock_irq(&die_lock);
  82         printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
  83 #ifdef CONFIG_PREEMPT
  84         printk("PREEMPT ");
  85         nl = 1;
  86 #endif
  87 #ifdef CONFIG_SMP
  88         printk("SMP NR_CPUS=%d ", NR_CPUS);
  89         nl = 1;
  90 #endif
  91         if (nl)
  92                 printk("\n");
  93         show_regs(fp);
  94         spin_unlock_irq(&die_lock);
  95         /* do_exit() should take care of panic'ing from an interrupt
  96          * context so we don't handle it here
  97          */
  98         do_exit(err);
  99 }
 100
 101 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
 102 {
 103         siginfo_t info;
 104
 105         if (!user_mode(regs)) {
 106                 debugger(regs);
 107                 die("Exception in kernel mode", regs, signr);
 108         }
 109         info.si_signo = signr;
 110         info.si_errno = 0;
 111         info.si_code = code;
 112         info.si_addr = (void __user *) addr;
 113         force_sig_info(signr, &info, current);
 114
 115         /*
 116          * Init gets no signals that it doesn't have a handler for.
 117          * That's all very well, but if it has caused a synchronous
 118          * exception and we ignore the resulting signal, it will just
 119          * generate the same exception over and over again and we get
 120          * nowhere.  Better to kill it and let the kernel panic.
 121          */
 122         if (is_init(current)) {
 123                 __sighandler_t handler;
 124
 125                 spin_lock_irq(&current->sighand->siglock);
 126                 handler = current->sighand->action[signr-1].sa.sa_handler;
 127                 spin_unlock_irq(&current->sighand->siglock);
 128                 if (handler == SIG_DFL) {
 129                         /* init has generated a synchronous exception
 130                            and it doesn't have a handler for the signal */
 131                         printk(KERN_CRIT "init has generated signal %d "
 132                                "but has no handler for it\n", signr);
 133                         do_exit(signr);
 134                 }
 135         }
 136 }
 137
 138 /*
 139  * I/O accesses can cause machine checks on powermacs.
 140  * Check if the NIP corresponds to the address of a sync
 141  * instruction for which there is an entry in the exception
 142  * table.
 143  * Note that the 601 only takes a machine check on TEA
 144  * (transfer error ack) signal assertion, and does not
 145  * set any of the top 16 bits of SRR1.
 146  *  -- paulus.
 147  */
 148 static inline int check_io_access(struct pt_regs *regs)
 149 {
 150 #if defined CONFIG_8xx
 151         unsigned long msr = regs->msr;
 152         const struct exception_table_entry *entry;
 153         unsigned int *nip = (unsigned int *)regs->nip;
 154
 155         if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))
 156             && (entry = search_exception_tables(regs->nip)) != NULL) {
 157                 /*
 158                  * Check that it's a sync instruction, or somewhere
 159                  * in the twi; isync; nop sequence that inb/inw/inl uses.
 160                  * As the address is in the exception table
 161                  * we should be able to read the instr there.
 162                  * For the debug message, we look at the preceding
 163                  * load or store.
 164                  */
 165                 if (*nip == 0x60000000)         /* nop */
 166                         nip -= 2;
 167                 else if (*nip == 0x4c00012c)    /* isync */
 168                         --nip;
 169                 /* eieio from I/O string functions */
 170                 else if ((*nip) == 0x7c0006ac || *(nip+1) == 0x7c0006ac)
 171                         nip += 2;
 172                 if (*nip == 0x7c0004ac || (*nip >> 26) == 3 ||
 173                         (*(nip+1) >> 26) == 3) {
 174                         /* sync or twi */
 175                         unsigned int rb;
 176
 177                         --nip;
 178                         rb = (*nip >> 11) & 0x1f;
 179                         printk(KERN_DEBUG "%s bad port %lx at %p\n",
 180                                (*nip & 0x100)? "OUT to": "IN from",
 181                                regs->gpr[rb] - _IO_BASE, nip);
 182                         regs->msr |= MSR_RI;
 183                         regs->nip = entry->fixup;
 184                         return 1;
 185                 }
 186         }
 187 #endif /* CONFIG_8xx */
 188         return 0;
 189 }
 190
 191 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
 192 /* On 4xx, the reason for the machine check or program exception
 193    is in the ESR. */
 194 #define get_reason(regs)        ((regs)->dsisr)
 195 #ifndef CONFIG_FSL_BOOKE
 196 #define get_mc_reason(regs)     ((regs)->dsisr)
 197 #else
 198 #define get_mc_reason(regs)     (mfspr(SPRN_MCSR))
 199 #endif
 200 #define REASON_FP               ESR_FP
 201 #define REASON_ILLEGAL          (ESR_PIL | ESR_PUO)
 202 #define REASON_PRIVILEGED       ESR_PPR
 203 #define REASON_TRAP             ESR_PTR
 204
 205 /* single-step stuff */
 206 #define single_stepping(regs)   (current->thread.dbcr0 & DBCR0_IC)
 207 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
 208
 209 #else
 210 /* On non-4xx, the reason for the machine check or program
 211    exception is in the MSR. */
 212 #define get_reason(regs)        ((regs)->msr)
 213 #define get_mc_reason(regs)     ((regs)->msr)
 214 #define REASON_FP               0x100000
 215 #define REASON_ILLEGAL          0x80000
 216 #define REASON_PRIVILEGED       0x40000
 217 #define REASON_TRAP             0x20000
 218
 219 #define single_stepping(regs)   ((regs)->msr & MSR_SE)
 220 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
 221 #endif
 222
 223 /*
 224  * This is "fall-back" implementation for configurations
 225  * which don't provide platform-specific machine check info
 226  */
 227 void __attribute__ ((weak))
 228 platform_machine_check(struct pt_regs *regs)
 229 {
 230 }
 231
 232 void machine_check_exception(struct pt_regs *regs)
 233 {
 234         unsigned long reason = get_mc_reason(regs);
 235
 236         if (user_mode(regs)) {
 237                 regs->msr |= MSR_RI;
 238                 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
 239                 return;
 240         }
 241
 242 #if defined(CONFIG_8xx) && defined(CONFIG_PCI)
 243         /* the qspan pci read routines can cause machine checks -- Cort */
 244         bad_page_fault(regs, regs->dar, SIGBUS);
 245         return;
 246 #endif
 247
 248         if (debugger_fault_handler) {
 249                 debugger_fault_handler(regs);
 250                 regs->msr |= MSR_RI;
 251                 return;
 252         }
 253
 254         if (check_io_access(regs))
 255                 return;
 256
 257 #if defined(CONFIG_4xx) && !defined(CONFIG_440A)
 258         if (reason & ESR_IMCP) {
 259                 printk("Instruction");
 260                 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
 261         } else
 262                 printk("Data");
 263         printk(" machine check in kernel mode.\n");
 264 #elif defined(CONFIG_440A)
 265         printk("Machine check in kernel mode.\n");
 266         if (reason & ESR_IMCP){
 267                 printk("Instruction Synchronous Machine Check exception\n");
 268                 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
 269         }
 270         else {
 271                 u32 mcsr = mfspr(SPRN_MCSR);
 272                 if (mcsr & MCSR_IB)
 273                         printk("Instruction Read PLB Error\n");
 274                 if (mcsr & MCSR_DRB)
 275                         printk("Data Read PLB Error\n");
 276                 if (mcsr & MCSR_DWB)
 277                         printk("Data Write PLB Error\n");
 278                 if (mcsr & MCSR_TLBP)
 279                         printk("TLB Parity Error\n");
 280                 if (mcsr & MCSR_ICP){
 281                         flush_instruction_cache();
 282                         printk("I-Cache Parity Error\n");
 283                 }
 284                 if (mcsr & MCSR_DCSP)
 285                         printk("D-Cache Search Parity Error\n");
 286                 if (mcsr & MCSR_DCFP)
 287                         printk("D-Cache Flush Parity Error\n");
 288                 if (mcsr & MCSR_IMPE)
 289                         printk("Machine Check exception is imprecise\n");
 290
 291                 /* Clear MCSR */
 292                 mtspr(SPRN_MCSR, mcsr);
 293         }
 294 #elif defined (CONFIG_E500)
 295         printk("Machine check in kernel mode.\n");
 296         printk("Caused by (from MCSR=%lx): ", reason);
 297
 298         if (reason & MCSR_MCP)
 299                 printk("Machine Check Signal\n");
 300         if (reason & MCSR_ICPERR)
 301                 printk("Instruction Cache Parity Error\n");
 302         if (reason & MCSR_DCP_PERR)
 303                 printk("Data Cache Push Parity Error\n");
 304         if (reason & MCSR_DCPERR)
 305                 printk("Data Cache Parity Error\n");
 306         if (reason & MCSR_GL_CI)
 307                 printk("Guarded Load or Cache-Inhibited stwcx.\n");
 308         if (reason & MCSR_BUS_IAERR)
 309                 printk("Bus - Instruction Address Error\n");
 310         if (reason & MCSR_BUS_RAERR)
 311                 printk("Bus - Read Address Error\n");
 312         if (reason & MCSR_BUS_WAERR)
 313                 printk("Bus - Write Address Error\n");
 314         if (reason & MCSR_BUS_IBERR)
 315                 printk("Bus - Instruction Data Error\n");
 316         if (reason & MCSR_BUS_RBERR)
 317                 printk("Bus - Read Data Bus Error\n");
 318         if (reason & MCSR_BUS_WBERR)
 319                 printk("Bus - Read Data Bus Error\n");
 320         if (reason & MCSR_BUS_IPERR)
 321                 printk("Bus - Instruction Parity Error\n");
 322         if (reason & MCSR_BUS_RPERR)
 323                 printk("Bus - Read Parity Error\n");
 324 #elif defined (CONFIG_E200)
 325         printk("Machine check in kernel mode.\n");
 326         printk("Caused by (from MCSR=%lx): ", reason);
 327
 328         if (reason & MCSR_MCP)
 329                 printk("Machine Check Signal\n");
 330         if (reason & MCSR_CP_PERR)
 331                 printk("Cache Push Parity Error\n");
 332         if (reason & MCSR_CPERR)
 333                 printk("Cache Parity Error\n");
 334         if (reason & MCSR_EXCP_ERR)
 335                 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n");
 336         if (reason & MCSR_BUS_IRERR)
 337                 printk("Bus - Read Bus Error on instruction fetch\n");
 338         if (reason & MCSR_BUS_DRERR)
 339                 printk("Bus - Read Bus Error on data load\n");
 340         if (reason & MCSR_BUS_WRERR)
 341                 printk("Bus - Write Bus Error on buffered store or cache line push\n");
 342 #else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */
 343         printk("Machine check in kernel mode.\n");
 344         printk("Caused by (from SRR1=%lx): ", reason);
 345         switch (reason & 0x601F0000) {
 346         case 0x80000:
 347                 printk("Machine check signal\n");
 348                 break;
 349         case 0:         /* for 601 */
 350         case 0x40000:
 351         case 0x140000:  /* 7450 MSS error and TEA */
 352                 printk("Transfer error ack signal\n");
 353                 break;
 354         case 0x20000:
 355                 printk("Data parity error signal\n");
 356                 break;
 357         case 0x10000:
 358                 printk("Address parity error signal\n");
 359                 break;
 360         case 0x20000000:
 361                 printk("L1 Data Cache error\n");
 362                 break;
 363         case 0x40000000:
 364                 printk("L1 Instruction Cache error\n");
 365                 break;
 366         case 0x00100000:
 367                 printk("L2 data cache parity error\n");
 368                 break;
 369         default:
 370                 printk("Unknown values in msr\n");
 371         }
 372 #endif /* CONFIG_4xx */
 373
 374         /*
 375          * Optional platform-provided routine to print out
 376          * additional info, e.g. bus error registers.
 377          */
 378         platform_machine_check(regs);
 379
 380         debugger(regs);
 381         die("machine check", regs, SIGBUS);
 382 }
 383
 384 void SMIException(struct pt_regs *regs)
 385 {
 386         debugger(regs);
 387 #if !(defined(CONFIG_XMON) || defined(CONFIG_KGDB))
 388         show_regs(regs);
 389         panic("System Management Interrupt");
 390 #endif
 391 }
 392
 393 void unknown_exception(struct pt_regs *regs)
 394 {
 395         printk("Bad trap at PC: %lx, MSR: %lx, vector=%lx    %s\n",
 396                regs->nip, regs->msr, regs->trap, print_tainted());
 397         _exception(SIGTRAP, regs, 0, 0);
 398 }
 399
 400 void instruction_breakpoint_exception(struct pt_regs *regs)
 401 {
 402         if (debugger_iabr_match(regs))
 403                 return;
 404         _exception(SIGTRAP, regs, TRAP_BRKPT, 0);
 405 }
 406
 407 void RunModeException(struct pt_regs *regs)
 408 {
 409         _exception(SIGTRAP, regs, 0, 0);
 410 }
 411
 412 /* Illegal instruction emulation support.  Originally written to
 413  * provide the PVR to user applications using the mfspr rd, PVR.
 414  * Return non-zero if we can't emulate, or -EFAULT if the associated
 415  * memory access caused an access fault.  Return zero on success.
 416  *
 417  * There are a couple of ways to do this, either "decode" the instruction
 418  * or directly match lots of bits.  In this case, matching lots of
 419  * bits is faster and easier.
 420  *
 421  */
 422 #define INST_MFSPR_PVR          0x7c1f42a6
 423 #define INST_MFSPR_PVR_MASK     0xfc1fffff
 424
 425 #define INST_DCBA               0x7c0005ec
 426 #define INST_DCBA_MASK          0x7c0007fe
 427
 428 #define INST_MCRXR              0x7c000400
 429 #define INST_MCRXR_MASK         0x7c0007fe
 430
 431 #define INST_STRING             0x7c00042a
 432 #define INST_STRING_MASK        0x7c0007fe
 433 #define INST_STRING_GEN_MASK    0x7c00067e
 434 #define INST_LSWI               0x7c0004aa
 435 #define INST_LSWX               0x7c00042a
 436 #define INST_STSWI              0x7c0005aa
 437 #define INST_STSWX              0x7c00052a
 438
 439 static int emulate_string_inst(struct pt_regs *regs, u32 instword)
 440 {
 441         u8 rT = (instword >> 21) & 0x1f;
 442         u8 rA = (instword >> 16) & 0x1f;
 443         u8 NB_RB = (instword >> 11) & 0x1f;
 444         u32 num_bytes;
 445         unsigned long EA;
 446         int pos = 0;
 447
 448         /* Early out if we are an invalid form of lswx */
 449         if ((instword & INST_STRING_MASK) == INST_LSWX)
 450                 if ((rT == rA) || (rT == NB_RB))
 451                         return -EINVAL;
 452
 453         EA = (rA == 0) ? 0 : regs->gpr[rA];
 454
 455         switch (instword & INST_STRING_MASK) {
 456                 case INST_LSWX:
 457                 case INST_STSWX:
 458                         EA += NB_RB;
 459                         num_bytes = regs->xer & 0x7f;
 460                         break;
 461                 case INST_LSWI:
 462                 case INST_STSWI:
 463                         num_bytes = (NB_RB == 0) ? 32 : NB_RB;
 464                         break;
 465                 default:
 466                         return -EINVAL;
 467         }
 468
 469         while (num_bytes != 0)
 470         {
 471                 u8 val;
 472                 u32 shift = 8 * (3 - (pos & 0x3));
 473
 474                 switch ((instword & INST_STRING_MASK)) {
 475                         case INST_LSWX:
 476                         case INST_LSWI:
 477                                 if (get_user(val, (u8 __user *)EA))
 478                                         return -EFAULT;
 479                                 /* first time updating this reg,
 480                                  * zero it out */
 481                                 if (pos == 0)
 482                                         regs->gpr[rT] = 0;
 483                                 regs->gpr[rT] |= val << shift;
 484                                 break;
 485                         case INST_STSWI:
 486                         case INST_STSWX:
 487                                 val = regs->gpr[rT] >> shift;
 488                                 if (put_user(val, (u8 __user *)EA))
 489                                         return -EFAULT;
 490                                 break;
 491                 }
 492                 /* move EA to next address */
 493                 EA += 1;
 494                 num_bytes--;
 495
 496                 /* manage our position within the register */
 497                 if (++pos == 4) {
 498                         pos = 0;
 499                         if (++rT == 32)
 500                                 rT = 0;
 501                 }
 502         }
 503
 504         return 0;
 505 }
 506
 507 static int emulate_instruction(struct pt_regs *regs)
 508 {
 509         u32 instword;
 510         u32 rd;
 511
 512         if (!user_mode(regs))
 513                 return -EINVAL;
 514         CHECK_FULL_REGS(regs);
 515
 516         if (get_user(instword, (u32 __user *)(regs->nip)))
 517                 return -EFAULT;
 518
 519         /* Emulate the mfspr rD, PVR.
 520          */
 521         if ((instword & INST_MFSPR_PVR_MASK) == INST_MFSPR_PVR) {
 522                 rd = (instword >> 21) & 0x1f;
 523                 regs->gpr[rd] = mfspr(SPRN_PVR);
 524                 return 0;
 525         }
 526
 527         /* Emulating the dcba insn is just a no-op.  */
 528         if ((instword & INST_DCBA_MASK) == INST_DCBA)
 529                 return 0;
 530
 531         /* Emulate the mcrxr insn.  */
 532         if ((instword & INST_MCRXR_MASK) == INST_MCRXR) {
 533                 int shift = (instword >> 21) & 0x1c;
 534                 unsigned long msk = 0xf0000000UL >> shift;
 535
 536                 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
 537                 regs->xer &= ~0xf0000000UL;
 538                 return 0;
 539         }
 540
 541         /* Emulate load/store string insn. */
 542         if ((instword & INST_STRING_GEN_MASK) == INST_STRING)
 543                 return emulate_string_inst(regs, instword);
 544
 545         return -EINVAL;
 546 }
 547
 548 /*
 549  * After we have successfully emulated an instruction, we have to
 550  * check if the instruction was being single-stepped, and if so,
 551  * pretend we got a single-step exception.  This was pointed out
 552  * by Kumar Gala.  -- paulus
 553  */
 554 static void emulate_single_step(struct pt_regs *regs)
 555 {
 556         if (single_stepping(regs)) {
 557                 clear_single_step(regs);
 558                 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
 559         }
 560 }
 561
 562 /*
 563  * Look through the list of trap instructions that are used for BUG(),
 564  * BUG_ON() and WARN_ON() and see if we hit one.  At this point we know
 565  * that the exception was caused by a trap instruction of some kind.
 566  * Returns 1 if we should continue (i.e. it was a WARN_ON) or 0
 567  * otherwise.
 568  */
 569 extern struct bug_entry __start___bug_table[], __stop___bug_table[];
 570
 571 #ifndef CONFIG_MODULES
 572 #define module_find_bug(x)      NULL
 573 #endif
 574
 575 struct bug_entry *find_bug(unsigned long bugaddr)
 576 {
 577         struct bug_entry *bug;
 578
 579         for (bug = __start___bug_table; bug < __stop___bug_table; ++bug)
 580                 if (bugaddr == bug->bug_addr)
 581                         return bug;
 582         return module_find_bug(bugaddr);
 583 }
 584
 585 int check_bug_trap(struct pt_regs *regs)
 586 {
 587         struct bug_entry *bug;
 588         unsigned long addr;
 589
 590         if (regs->msr & MSR_PR)
 591                 return 0;       /* not in kernel */
 592         addr = regs->nip;       /* address of trap instruction */
 593         if (addr < PAGE_OFFSET)
 594                 return 0;
 595         bug = find_bug(regs->nip);
 596         if (bug == NULL)
 597                 return 0;
 598         if (bug->line & BUG_WARNING_TRAP) {
 599                 /* this is a WARN_ON rather than BUG/BUG_ON */
 600 #ifdef CONFIG_XMON
 601                 xmon_printf(KERN_ERR "Badness in %s at %s:%ld\n",
 602                        bug->function, bug->file,
 603                        bug->line & ~BUG_WARNING_TRAP);
 604 #endif /* CONFIG_XMON */
 605                 printk(KERN_ERR "Badness in %s at %s:%ld\n",
 606                        bug->function, bug->file,
 607                        bug->line & ~BUG_WARNING_TRAP);
 608                 dump_stack();
 609                 return 1;
 610         }
 611 #ifdef CONFIG_XMON
 612         xmon_printf(KERN_CRIT "kernel BUG in %s at %s:%ld!\n",
 613                bug->function, bug->file, bug->line);
 614         xmon(regs);
 615 #endif /* CONFIG_XMON */
 616         printk(KERN_CRIT "kernel BUG in %s at %s:%ld!\n",
 617                bug->function, bug->file, bug->line);
 618
 619         return 0;
 620 }
 621
 622 void program_check_exception(struct pt_regs *regs)
 623 {
 624         unsigned int reason = get_reason(regs);
 625         extern int do_mathemu(struct pt_regs *regs);
 626
 627 #ifdef CONFIG_MATH_EMULATION
 628         /* (reason & REASON_ILLEGAL) would be the obvious thing here,
 629          * but there seems to be a hardware bug on the 405GP (RevD)
 630          * that means ESR is sometimes set incorrectly - either to
 631          * ESR_DST (!?) or 0.  In the process of chasing this with the
 632          * hardware people - not sure if it can happen on any illegal
 633          * instruction or only on FP instructions, whether there is a
 634          * pattern to occurences etc. -dgibson 31/Mar/2003 */
 635         if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) {
 636                 emulate_single_step(regs);
 637                 return;
 638         }
 639 #endif /* CONFIG_MATH_EMULATION */
 640
 641         if (reason & REASON_FP) {
 642                 /* IEEE FP exception */
 643                 int code = 0;
 644                 u32 fpscr;
 645
 646                 /* We must make sure the FP state is consistent with
 647                  * our MSR_FP in regs
 648                  */
 649                 preempt_disable();
 650                 if (regs->msr & MSR_FP)
 651                         giveup_fpu(current);
 652                 preempt_enable();
 653
 654                 fpscr = current->thread.fpscr.val;
 655                 fpscr &= fpscr << 22;   /* mask summary bits with enables */
 656                 if (fpscr & FPSCR_VX)
 657                         code = FPE_FLTINV;
 658                 else if (fpscr & FPSCR_OX)
 659                         code = FPE_FLTOVF;
 660                 else if (fpscr & FPSCR_UX)
 661                         code = FPE_FLTUND;
 662                 else if (fpscr & FPSCR_ZX)
 663                         code = FPE_FLTDIV;
 664                 else if (fpscr & FPSCR_XX)
 665                         code = FPE_FLTRES;
 666                 _exception(SIGFPE, regs, code, regs->nip);
 667                 return;
 668         }
 669
 670         if (reason & REASON_TRAP) {
 671                 /* trap exception */
 672                 if (debugger_bpt(regs))
 673                         return;
 674                 if (check_bug_trap(regs)) {
 675                         regs->nip += 4;
 676                         return;
 677                 }
 678                 _exception(SIGTRAP, regs, TRAP_BRKPT, 0);
 679                 return;
 680         }
 681
 682         /* Try to emulate it if we should. */
 683         if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) {
 684                 switch (emulate_instruction(regs)) {
 685                 case 0:
 686                         regs->nip += 4;
 687                         emulate_single_step(regs);
 688                         return;
 689                 case -EFAULT:
 690                         _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
 691                         return;
 692                 }
 693         }
 694
 695         if (reason & REASON_PRIVILEGED)
 696                 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
 697         else
 698                 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
 699 }
 700
 701 void single_step_exception(struct pt_regs *regs)
 702 {
 703         regs->msr &= ~(MSR_SE | MSR_BE);  /* Turn off 'trace' bits */
 704         if (debugger_sstep(regs))
 705                 return;
 706         _exception(SIGTRAP, regs, TRAP_TRACE, 0);
 707 }
 708
 709 void alignment_exception(struct pt_regs *regs)
 710 {
 711         int fixed;
 712
 713         fixed = fix_alignment(regs);
 714         if (fixed == 1) {
 715                 regs->nip += 4; /* skip over emulated instruction */
 716                 emulate_single_step(regs);
 717                 return;
 718         }
 719         if (fixed == -EFAULT) {
 720                 /* fixed == -EFAULT means the operand address was bad */
 721                 if (user_mode(regs))
 722                         _exception(SIGSEGV, regs, SEGV_ACCERR, regs->dar);
 723                 else
 724                         bad_page_fault(regs, regs->dar, SIGSEGV);
 725                 return;
 726         }
 727         _exception(SIGBUS, regs, BUS_ADRALN, regs->dar);
 728 }
 729
 730 void StackOverflow(struct pt_regs *regs)
 731 {
 732         printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
 733                current, regs->gpr[1]);
 734         debugger(regs);
 735         show_regs(regs);
 736         panic("kernel stack overflow");
 737 }
 738
 739 void nonrecoverable_exception(struct pt_regs *regs)
 740 {
 741         printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n",
 742                regs->nip, regs->msr);
 743         debugger(regs);
 744         die("nonrecoverable exception", regs, SIGKILL);
 745 }
 746
 747 void trace_syscall(struct pt_regs *regs)
 748 {
 749         printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld    %s\n",
 750                current, current->pid, regs->nip, regs->link, regs->gpr[0],
 751                regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
 752 }
 753
 754 #ifdef CONFIG_8xx
 755 void SoftwareEmulation(struct pt_regs *regs)
 756 {
 757         extern int do_mathemu(struct pt_regs *);
 758         extern int Soft_emulate_8xx(struct pt_regs *);
 759         int errcode;
 760
 761         CHECK_FULL_REGS(regs);
 762
 763         if (!user_mode(regs)) {
 764                 debugger(regs);
 765                 die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
 766         }
 767
 768 #ifdef CONFIG_MATH_EMULATION
 769         errcode = do_mathemu(regs);
 770 #else
 771         errcode = Soft_emulate_8xx(regs);
 772 #endif
 773         if (errcode) {
 774                 if (errcode > 0)
 775                         _exception(SIGFPE, regs, 0, 0);
 776                 else if (errcode == -EFAULT)
 777                         _exception(SIGSEGV, regs, 0, 0);
 778                 else
 779                         _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
 780         } else
 781                 emulate_single_step(regs);
 782 }
 783 #endif /* CONFIG_8xx */
 784
 785 #if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
 786
 787 void DebugException(struct pt_regs *regs, unsigned long debug_status)
 788 {
 789         if (debug_status & DBSR_IC) {   /* instruction completion */
 790                 regs->msr &= ~MSR_DE;
 791                 if (user_mode(regs)) {
 792                         current->thread.dbcr0 &= ~DBCR0_IC;
 793                 } else {
 794                         /* Disable instruction completion */
 795                         mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
 796                         /* Clear the instruction completion event */
 797                         mtspr(SPRN_DBSR, DBSR_IC);
 798                         if (debugger_sstep(regs))
 799                                 return;
 800                 }
 801                 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
 802         }
 803 }
 804 #endif /* CONFIG_4xx || CONFIG_BOOKE */
 805
 806 #if !defined(CONFIG_TAU_INT)
 807 void TAUException(struct pt_regs *regs)
 808 {
 809         printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx    %s\n",
 810                regs->nip, regs->msr, regs->trap, print_tainted());
 811 }
 812 #endif /* CONFIG_INT_TAU */
 813
 814 /*
 815  * FP unavailable trap from kernel - print a message, but let
 816  * the task use FP in the kernel until it returns to user mode.
 817  */
 818 void kernel_fp_unavailable_exception(struct pt_regs *regs)
 819 {
 820         regs->msr |= MSR_FP;
 821         printk(KERN_ERR "floating point used in kernel (task=%p, pc=%lx)\n",
 822                current, regs->nip);
 823 }
 824
 825 void altivec_unavailable_exception(struct pt_regs *regs)
 826 {
 827         static int kernel_altivec_count;
 828
 829 #ifndef CONFIG_ALTIVEC
 830         if (user_mode(regs)) {
 831                 /* A user program has executed an altivec instruction,
 832                    but this kernel doesn't support altivec. */
 833                 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
 834                 return;
 835         }
 836 #endif
 837         /* The kernel has executed an altivec instruction without
 838            first enabling altivec.  Whinge but let it do it. */
 839         if (++kernel_altivec_count < 10)
 840                 printk(KERN_ERR "AltiVec used in kernel (task=%p, pc=%lx)\n",
 841                        current, regs->nip);
 842         regs->msr |= MSR_VEC;
 843 }
 844
 845 #ifdef CONFIG_ALTIVEC
 846 void altivec_assist_exception(struct pt_regs *regs)
 847 {
 848         int err;
 849
 850         preempt_disable();
 851         if (regs->msr & MSR_VEC)
 852                 giveup_altivec(current);
 853         preempt_enable();
 854         if (!user_mode(regs)) {
 855                 printk(KERN_ERR "altivec assist exception in kernel mode"
 856                        " at %lx\n", regs->nip);
 857                 debugger(regs);
 858                 die("altivec assist exception", regs, SIGFPE);
 859                 return;
 860         }
 861
 862         err = emulate_altivec(regs);
 863         if (err == 0) {
 864                 regs->nip += 4;         /* skip emulated instruction */
 865                 emulate_single_step(regs);
 866                 return;
 867         }
 868
 869         if (err == -EFAULT) {
 870                 /* got an error reading the instruction */
 871                 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
 872         } else {
 873                 /* didn't recognize the instruction */
 874                 /* XXX quick hack for now: set the non-Java bit in the VSCR */
 875                 printk(KERN_ERR "unrecognized altivec instruction "
 876                        "in %s at %lx\n", current->comm, regs->nip);
 877                 current->thread.vscr.u[3] |= 0x10000;
 878         }
 879 }
 880 #endif /* CONFIG_ALTIVEC */
 881
 882 #ifdef CONFIG_E500
 883 void performance_monitor_exception(struct pt_regs *regs)
 884 {
 885         perf_irq(regs);
 886 }
 887 #endif
 888
 889 #ifdef CONFIG_FSL_BOOKE
 890 void CacheLockingException(struct pt_regs *regs, unsigned long address,
 891                            unsigned long error_code)
 892 {
 893         /* We treat cache locking instructions from the user
 894          * as priv ops, in the future we could try to do
 895          * something smarter
 896          */
 897         if (error_code & (ESR_DLK|ESR_ILK))
 898                 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
 899         return;
 900 }
 901 #endif /* CONFIG_FSL_BOOKE */
 902
 903 #ifdef CONFIG_SPE
 904 void SPEFloatingPointException(struct pt_regs *regs)
 905 {
 906         unsigned long spefscr;
 907         int fpexc_mode;
 908         int code = 0;
 909
 910         spefscr = current->thread.spefscr;
 911         fpexc_mode = current->thread.fpexc_mode;
 912
 913         /* Hardware does not neccessarily set sticky
 914          * underflow/overflow/invalid flags */
 915         if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
 916                 code = FPE_FLTOVF;
 917                 spefscr |= SPEFSCR_FOVFS;
 918         }
 919         else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
 920                 code = FPE_FLTUND;
 921                 spefscr |= SPEFSCR_FUNFS;
 922         }
 923         else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
 924                 code = FPE_FLTDIV;
 925         else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
 926                 code = FPE_FLTINV;
 927                 spefscr |= SPEFSCR_FINVS;
 928         }
 929         else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
 930                 code = FPE_FLTRES;
 931
 932         current->thread.spefscr = spefscr;
 933
 934         _exception(SIGFPE, regs, code, regs->nip);
 935         return;
 936 }
 937 #endif
 938
 939 #ifdef CONFIG_BOOKE_WDT
 940 /*
 941  * Default handler for a Watchdog exception,
 942  * spins until a reboot occurs
 943  */
 944 void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)
 945 {
 946         /* Generic WatchdogHandler, implement your own */
 947         mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));
 948         return;
 949 }
 950
 951 void WatchdogException(struct pt_regs *regs)
 952 {
 953         printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n");
 954         WatchdogHandler(regs);
 955 }
 956 #endif
 957
 958 void __init trap_init(void)
 959 {
 960 }