PCI: add ICH7/8 ACPI/GPIO io resource quirks
[pv_ops_mirror.git] / arch / sh64 / mm / tlbmiss.c
blobc8615954aaa98b425f9ff8f091ef70055a52cd63
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * arch/sh64/mm/tlbmiss.c
8 * Original code from fault.c
9 * Copyright (C) 2000, 2001 Paolo Alberelli
11 * Fast PTE->TLB refill path
12 * Copyright (C) 2003 Richard.Curnow@superh.com
14 * IMPORTANT NOTES :
15 * The do_fast_page_fault function is called from a context in entry.S where very few registers
16 * have been saved. In particular, the code in this file must be compiled not to use ANY
17 * caller-save regiseters that are not part of the restricted save set. Also, it means that
18 * code in this file must not make calls to functions elsewhere in the kernel, or else the
19 * excepting context will see corruption in its caller-save registers. Plus, the entry.S save
20 * area is non-reentrant, so this code has to run with SR.BL==1, i.e. no interrupts taken inside
21 * it and panic on any exception.
25 #include <linux/signal.h>
26 #include <linux/sched.h>
27 #include <linux/kernel.h>
28 #include <linux/errno.h>
29 #include <linux/string.h>
30 #include <linux/types.h>
31 #include <linux/ptrace.h>
32 #include <linux/mman.h>
33 #include <linux/mm.h>
34 #include <linux/smp.h>
35 #include <linux/smp_lock.h>
36 #include <linux/interrupt.h>
38 #include <asm/system.h>
39 #include <asm/tlb.h>
40 #include <asm/io.h>
41 #include <asm/uaccess.h>
42 #include <asm/pgalloc.h>
43 #include <asm/mmu_context.h>
44 #include <asm/registers.h> /* required by inline asm statements */
46 /* Callable from fault.c, so not static */
47 inline void __do_tlb_refill(unsigned long address,
48 unsigned long long is_text_not_data, pte_t *pte)
50 unsigned long long ptel;
51 unsigned long long pteh=0;
52 struct tlb_info *tlbp;
53 unsigned long long next;
55 /* Get PTEL first */
56 ptel = pte_val(*pte);
59 * Set PTEH register
61 pteh = address & MMU_VPN_MASK;
63 /* Sign extend based on neff. */
64 #if (NEFF == 32)
65 /* Faster sign extension */
66 pteh = (unsigned long long)(signed long long)(signed long)pteh;
67 #else
68 /* General case */
69 pteh = (pteh & NEFF_SIGN) ? (pteh | NEFF_MASK) : pteh;
70 #endif
72 /* Set the ASID. */
73 pteh |= get_asid() << PTEH_ASID_SHIFT;
74 pteh |= PTEH_VALID;
76 /* Set PTEL register, set_pte has performed the sign extension */
77 ptel &= _PAGE_FLAGS_HARDWARE_MASK; /* drop software flags */
79 tlbp = is_text_not_data ? &(cpu_data->itlb) : &(cpu_data->dtlb);
80 next = tlbp->next;
81 __flush_tlb_slot(next);
82 asm volatile ("putcfg %0,1,%2\n\n\t"
83 "putcfg %0,0,%1\n"
84 : : "r" (next), "r" (pteh), "r" (ptel) );
86 next += TLB_STEP;
87 if (next > tlbp->last) next = tlbp->first;
88 tlbp->next = next;
92 static int handle_vmalloc_fault(struct mm_struct *mm, unsigned long protection_flags,
93 unsigned long long textaccess,
94 unsigned long address)
96 pgd_t *dir;
97 pmd_t *pmd;
98 static pte_t *pte;
99 pte_t entry;
101 dir = pgd_offset_k(address);
102 pmd = pmd_offset(dir, address);
104 if (pmd_none(*pmd)) {
105 return 0;
108 if (pmd_bad(*pmd)) {
109 pmd_clear(pmd);
110 return 0;
113 pte = pte_offset_kernel(pmd, address);
114 entry = *pte;
116 if (pte_none(entry) || !pte_present(entry)) {
117 return 0;
120 if ((pte_val(entry) & protection_flags) != protection_flags) {
121 return 0;
124 __do_tlb_refill(address, textaccess, pte);
126 return 1;
129 static int handle_tlbmiss(struct mm_struct *mm, unsigned long long protection_flags,
130 unsigned long long textaccess,
131 unsigned long address)
133 pgd_t *dir;
134 pmd_t *pmd;
135 pte_t *pte;
136 pte_t entry;
138 /* NB. The PGD currently only contains a single entry - there is no
139 page table tree stored for the top half of the address space since
140 virtual pages in that region should never be mapped in user mode.
141 (In kernel mode, the only things in that region are the 512Mb super
142 page (locked in), and vmalloc (modules) + I/O device pages (handled
143 by handle_vmalloc_fault), so no PGD for the upper half is required
144 by kernel mode either).
146 See how mm->pgd is allocated and initialised in pgd_alloc to see why
147 the next test is necessary. - RPC */
148 if (address >= (unsigned long) TASK_SIZE) {
149 /* upper half - never has page table entries. */
150 return 0;
152 dir = pgd_offset(mm, address);
153 if (pgd_none(*dir)) {
154 return 0;
156 if (!pgd_present(*dir)) {
157 return 0;
160 pmd = pmd_offset(dir, address);
161 if (pmd_none(*pmd)) {
162 return 0;
164 if (!pmd_present(*pmd)) {
165 return 0;
167 pte = pte_offset_kernel(pmd, address);
168 entry = *pte;
169 if (pte_none(entry)) {
170 return 0;
172 if (!pte_present(entry)) {
173 return 0;
176 /* If the page doesn't have sufficient protection bits set to service the
177 kind of fault being handled, there's not much point doing the TLB refill.
178 Punt the fault to the general handler. */
179 if ((pte_val(entry) & protection_flags) != protection_flags) {
180 return 0;
183 __do_tlb_refill(address, textaccess, pte);
185 return 1;
188 /* Put all this information into one structure so that everything is just arithmetic
189 relative to a single base address. This reduces the number of movi/shori pairs needed
190 just to load addresses of static data. */
191 struct expevt_lookup {
192 unsigned short protection_flags[8];
193 unsigned char is_text_access[8];
194 unsigned char is_write_access[8];
197 #define PRU (1<<9)
198 #define PRW (1<<8)
199 #define PRX (1<<7)
200 #define PRR (1<<6)
202 #define DIRTY (_PAGE_DIRTY | _PAGE_ACCESSED)
203 #define YOUNG (_PAGE_ACCESSED)
205 /* Sized as 8 rather than 4 to allow checking the PTE's PRU bit against whether
206 the fault happened in user mode or privileged mode. */
207 static struct expevt_lookup expevt_lookup_table = {
208 .protection_flags = {PRX, PRX, 0, 0, PRR, PRR, PRW, PRW},
209 .is_text_access = {1, 1, 0, 0, 0, 0, 0, 0}
213 This routine handles page faults that can be serviced just by refilling a
214 TLB entry from an existing page table entry. (This case represents a very
215 large majority of page faults.) Return 1 if the fault was successfully
216 handled. Return 0 if the fault could not be handled. (This leads into the
217 general fault handling in fault.c which deals with mapping file-backed
218 pages, stack growth, segmentation faults, swapping etc etc)
220 asmlinkage int do_fast_page_fault(unsigned long long ssr_md, unsigned long long expevt,
221 unsigned long address)
223 struct task_struct *tsk;
224 struct mm_struct *mm;
225 unsigned long long textaccess;
226 unsigned long long protection_flags;
227 unsigned long long index;
228 unsigned long long expevt4;
230 /* The next few lines implement a way of hashing EXPEVT into a small array index
231 which can be used to lookup parameters specific to the type of TLBMISS being
232 handled. Note:
233 ITLBMISS has EXPEVT==0xa40
234 RTLBMISS has EXPEVT==0x040
235 WTLBMISS has EXPEVT==0x060
238 expevt4 = (expevt >> 4);
239 /* TODO : xor ssr_md into this expression too. Then we can check that PRU is set
240 when it needs to be. */
241 index = expevt4 ^ (expevt4 >> 5);
242 index &= 7;
243 protection_flags = expevt_lookup_table.protection_flags[index];
244 textaccess = expevt_lookup_table.is_text_access[index];
246 #ifdef CONFIG_SH64_PROC_TLB
247 ++calls_to_do_fast_page_fault;
248 #endif
250 /* SIM
251 * Note this is now called with interrupts still disabled
252 * This is to cope with being called for a missing IO port
253 * address with interupts disabled. This should be fixed as
254 * soon as we have a better 'fast path' miss handler.
256 * Plus take care how you try and debug this stuff.
257 * For example, writing debug data to a port which you
258 * have just faulted on is not going to work.
261 tsk = current;
262 mm = tsk->mm;
264 if ((address >= VMALLOC_START && address < VMALLOC_END) ||
265 (address >= IOBASE_VADDR && address < IOBASE_END)) {
266 if (ssr_md) {
267 /* Process-contexts can never have this address range mapped */
268 if (handle_vmalloc_fault(mm, protection_flags, textaccess, address)) {
269 return 1;
272 } else if (!in_interrupt() && mm) {
273 if (handle_tlbmiss(mm, protection_flags, textaccess, address)) {
274 return 1;
278 return 0;