2 * Copyright (C) 2005-2006 Atmel Corporation
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 #include <linux/init.h>
9 #include <linux/sysdev.h>
10 #include <linux/seq_file.h>
11 #include <linux/cpu.h>
12 #include <linux/module.h>
13 #include <linux/percpu.h>
14 #include <linux/param.h>
15 #include <linux/errno.h>
17 #include <asm/setup.h>
18 #include <asm/sysreg.h>
20 static DEFINE_PER_CPU(struct cpu
, cpu_devices
);
22 #ifdef CONFIG_PERFORMANCE_COUNTERS
25 * XXX: If/when a SMP-capable implementation of AVR32 will ever be
26 * made, we must make sure that the code executes on the correct CPU.
28 static ssize_t
show_pc0event(struct sys_device
*dev
, char *buf
)
32 pccr
= sysreg_read(PCCR
);
33 return sprintf(buf
, "0x%lx\n", (pccr
>> 12) & 0x3f);
35 static ssize_t
store_pc0event(struct sys_device
*dev
, const char *buf
,
41 val
= simple_strtoul(buf
, &endp
, 0);
42 if (endp
== buf
|| val
> 0x3f)
44 val
= (val
<< 12) | (sysreg_read(PCCR
) & 0xfffc0fff);
45 sysreg_write(PCCR
, val
);
48 static ssize_t
show_pc0count(struct sys_device
*dev
, char *buf
)
52 pcnt0
= sysreg_read(PCNT0
);
53 return sprintf(buf
, "%lu\n", pcnt0
);
55 static ssize_t
store_pc0count(struct sys_device
*dev
, const char *buf
,
61 val
= simple_strtoul(buf
, &endp
, 0);
64 sysreg_write(PCNT0
, val
);
69 static ssize_t
show_pc1event(struct sys_device
*dev
, char *buf
)
73 pccr
= sysreg_read(PCCR
);
74 return sprintf(buf
, "0x%lx\n", (pccr
>> 18) & 0x3f);
76 static ssize_t
store_pc1event(struct sys_device
*dev
, const char *buf
,
82 val
= simple_strtoul(buf
, &endp
, 0);
83 if (endp
== buf
|| val
> 0x3f)
85 val
= (val
<< 18) | (sysreg_read(PCCR
) & 0xff03ffff);
86 sysreg_write(PCCR
, val
);
89 static ssize_t
show_pc1count(struct sys_device
*dev
, char *buf
)
93 pcnt1
= sysreg_read(PCNT1
);
94 return sprintf(buf
, "%lu\n", pcnt1
);
96 static ssize_t
store_pc1count(struct sys_device
*dev
, const char *buf
,
102 val
= simple_strtoul(buf
, &endp
, 0);
105 sysreg_write(PCNT1
, val
);
110 static ssize_t
show_pccycles(struct sys_device
*dev
, char *buf
)
114 pccnt
= sysreg_read(PCCNT
);
115 return sprintf(buf
, "%lu\n", pccnt
);
117 static ssize_t
store_pccycles(struct sys_device
*dev
, const char *buf
,
123 val
= simple_strtoul(buf
, &endp
, 0);
126 sysreg_write(PCCNT
, val
);
131 static ssize_t
show_pcenable(struct sys_device
*dev
, char *buf
)
135 pccr
= sysreg_read(PCCR
);
136 return sprintf(buf
, "%c\n", (pccr
& 1)?'1':'0');
138 static ssize_t
store_pcenable(struct sys_device
*dev
, const char *buf
,
141 unsigned long pccr
, val
;
144 val
= simple_strtoul(buf
, &endp
, 0);
150 pccr
= sysreg_read(PCCR
);
151 pccr
= (pccr
& ~1UL) | val
;
152 sysreg_write(PCCR
, pccr
);
157 static SYSDEV_ATTR(pc0event
, 0600, show_pc0event
, store_pc0event
);
158 static SYSDEV_ATTR(pc0count
, 0600, show_pc0count
, store_pc0count
);
159 static SYSDEV_ATTR(pc1event
, 0600, show_pc1event
, store_pc1event
);
160 static SYSDEV_ATTR(pc1count
, 0600, show_pc1count
, store_pc1count
);
161 static SYSDEV_ATTR(pccycles
, 0600, show_pccycles
, store_pccycles
);
162 static SYSDEV_ATTR(pcenable
, 0600, show_pcenable
, store_pcenable
);
164 #endif /* CONFIG_PERFORMANCE_COUNTERS */
166 static int __init
topology_init(void)
170 for_each_possible_cpu(cpu
) {
171 struct cpu
*c
= &per_cpu(cpu_devices
, cpu
);
173 register_cpu(c
, cpu
);
175 #ifdef CONFIG_PERFORMANCE_COUNTERS
176 sysdev_create_file(&c
->sysdev
, &attr_pc0event
);
177 sysdev_create_file(&c
->sysdev
, &attr_pc0count
);
178 sysdev_create_file(&c
->sysdev
, &attr_pc1event
);
179 sysdev_create_file(&c
->sysdev
, &attr_pc1count
);
180 sysdev_create_file(&c
->sysdev
, &attr_pccycles
);
181 sysdev_create_file(&c
->sysdev
, &attr_pcenable
);
188 subsys_initcall(topology_init
);
190 static const char *cpu_names
[] = {
194 #define NR_CPU_NAMES ARRAY_SIZE(cpu_names)
196 static const char *arch_names
[] = {
200 #define NR_ARCH_NAMES ARRAY_SIZE(arch_names)
202 static const char *mmu_types
[] = {
209 void __init
setup_processor(void)
211 unsigned long config0
, config1
;
212 unsigned long features
;
213 unsigned cpu_id
, cpu_rev
, arch_id
, arch_rev
, mmu_type
;
216 config0
= sysreg_read(CONFIG0
);
217 config1
= sysreg_read(CONFIG1
);
218 cpu_id
= SYSREG_BFEXT(PROCESSORID
, config0
);
219 cpu_rev
= SYSREG_BFEXT(PROCESSORREVISION
, config0
);
220 arch_id
= SYSREG_BFEXT(AT
, config0
);
221 arch_rev
= SYSREG_BFEXT(AR
, config0
);
222 mmu_type
= SYSREG_BFEXT(MMUT
, config0
);
224 boot_cpu_data
.arch_type
= arch_id
;
225 boot_cpu_data
.cpu_type
= cpu_id
;
226 boot_cpu_data
.arch_revision
= arch_rev
;
227 boot_cpu_data
.cpu_revision
= cpu_rev
;
228 boot_cpu_data
.tlb_config
= mmu_type
;
230 tmp
= SYSREG_BFEXT(ILSZ
, config1
);
232 boot_cpu_data
.icache
.ways
= 1 << SYSREG_BFEXT(IASS
, config1
);
233 boot_cpu_data
.icache
.sets
= 1 << SYSREG_BFEXT(ISET
, config1
);
234 boot_cpu_data
.icache
.linesz
= 1 << (tmp
+ 1);
236 tmp
= SYSREG_BFEXT(DLSZ
, config1
);
238 boot_cpu_data
.dcache
.ways
= 1 << SYSREG_BFEXT(DASS
, config1
);
239 boot_cpu_data
.dcache
.sets
= 1 << SYSREG_BFEXT(DSET
, config1
);
240 boot_cpu_data
.dcache
.linesz
= 1 << (tmp
+ 1);
243 if ((cpu_id
>= NR_CPU_NAMES
) || (arch_id
>= NR_ARCH_NAMES
)) {
244 printk ("Unknown CPU configuration (ID %02x, arch %02x), "
245 "continuing anyway...\n",
250 printk ("CPU: %s [%02x] revision %d (%s revision %d)\n",
251 cpu_names
[cpu_id
], cpu_id
, cpu_rev
,
252 arch_names
[arch_id
], arch_rev
);
253 printk ("CPU: MMU configuration: %s\n", mmu_types
[mmu_type
]);
255 printk ("CPU: features:");
257 if (config0
& SYSREG_BIT(CONFIG0_R
)) {
258 features
|= AVR32_FEATURE_RMW
;
261 if (config0
& SYSREG_BIT(CONFIG0_D
)) {
262 features
|= AVR32_FEATURE_DSP
;
265 if (config0
& SYSREG_BIT(CONFIG0_S
)) {
266 features
|= AVR32_FEATURE_SIMD
;
269 if (config0
& SYSREG_BIT(CONFIG0_O
)) {
270 features
|= AVR32_FEATURE_OCD
;
273 if (config0
& SYSREG_BIT(CONFIG0_P
)) {
274 features
|= AVR32_FEATURE_PCTR
;
277 if (config0
& SYSREG_BIT(CONFIG0_J
)) {
278 features
|= AVR32_FEATURE_JAVA
;
281 if (config0
& SYSREG_BIT(CONFIG0_F
)) {
282 features
|= AVR32_FEATURE_FPU
;
286 boot_cpu_data
.features
= features
;
289 #ifdef CONFIG_PROC_FS
290 static int c_show(struct seq_file
*m
, void *v
)
292 unsigned int icache_size
, dcache_size
;
293 unsigned int cpu
= smp_processor_id();
295 icache_size
= boot_cpu_data
.icache
.ways
*
296 boot_cpu_data
.icache
.sets
*
297 boot_cpu_data
.icache
.linesz
;
298 dcache_size
= boot_cpu_data
.dcache
.ways
*
299 boot_cpu_data
.dcache
.sets
*
300 boot_cpu_data
.dcache
.linesz
;
302 seq_printf(m
, "processor\t: %d\n", cpu
);
304 if (boot_cpu_data
.arch_type
< NR_ARCH_NAMES
)
305 seq_printf(m
, "cpu family\t: %s revision %d\n",
306 arch_names
[boot_cpu_data
.arch_type
],
307 boot_cpu_data
.arch_revision
);
308 if (boot_cpu_data
.cpu_type
< NR_CPU_NAMES
)
309 seq_printf(m
, "cpu type\t: %s revision %d\n",
310 cpu_names
[boot_cpu_data
.cpu_type
],
311 boot_cpu_data
.cpu_revision
);
313 seq_printf(m
, "i-cache\t\t: %dK (%u ways x %u sets x %u)\n",
315 boot_cpu_data
.icache
.ways
,
316 boot_cpu_data
.icache
.sets
,
317 boot_cpu_data
.icache
.linesz
);
318 seq_printf(m
, "d-cache\t\t: %dK (%u ways x %u sets x %u)\n",
320 boot_cpu_data
.dcache
.ways
,
321 boot_cpu_data
.dcache
.sets
,
322 boot_cpu_data
.dcache
.linesz
);
323 seq_printf(m
, "bogomips\t: %lu.%02lu\n",
324 boot_cpu_data
.loops_per_jiffy
/ (500000/HZ
),
325 (boot_cpu_data
.loops_per_jiffy
/ (5000/HZ
)) % 100);
330 static void *c_start(struct seq_file
*m
, loff_t
*pos
)
332 return *pos
< 1 ? (void *)1 : NULL
;
335 static void *c_next(struct seq_file
*m
, void *v
, loff_t
*pos
)
341 static void c_stop(struct seq_file
*m
, void *v
)
346 struct seq_operations cpuinfo_op
= {
352 #endif /* CONFIG_PROC_FS */