2 * linux/arch/ia64/kernel/irq.c
4 * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
6 * This file contains the code used by various IRQ handling routines:
7 * asking for different IRQs should be done through these routines
8 * instead of just grabbing them. Thus setups with different IRQ numbers
9 * shouldn't result in any weird surprises, and installing new handlers
12 * Copyright (C) Ashok Raj<ashok.raj@intel.com>, Intel Corporation 2004
14 * 4/14/2004: Added code to handle cpu migration and do safe irq
15 * migration without losing interrupts for iosapic
19 #include <asm/delay.h>
20 #include <asm/uaccess.h>
21 #include <linux/module.h>
22 #include <linux/seq_file.h>
23 #include <linux/interrupt.h>
24 #include <linux/kernel_stat.h>
27 * 'what should we do if we get a hw irq event on an illegal vector'.
28 * each architecture has to answer this themselves.
30 void ack_bad_irq(unsigned int irq
)
32 printk(KERN_ERR
"Unexpected irq vector 0x%x on CPU %u!\n", irq
, smp_processor_id());
35 #ifdef CONFIG_IA64_GENERIC
36 unsigned int __ia64_local_vector_to_irq (ia64_vector vec
)
38 return (unsigned int) vec
;
43 * Interrupt statistics:
46 atomic_t irq_err_count
;
49 * /proc/interrupts printing:
52 int show_interrupts(struct seq_file
*p
, void *v
)
54 int i
= *(loff_t
*) v
, j
;
55 struct irqaction
* action
;
60 for_each_online_cpu(j
) {
61 seq_printf(p
, "CPU%d ",j
);
67 spin_lock_irqsave(&irq_desc
[i
].lock
, flags
);
68 action
= irq_desc
[i
].action
;
71 seq_printf(p
, "%3d: ",i
);
73 seq_printf(p
, "%10u ", kstat_irqs(i
));
75 for_each_online_cpu(j
) {
76 seq_printf(p
, "%10u ", kstat_cpu(j
).irqs
[i
]);
79 seq_printf(p
, " %14s", irq_desc
[i
].chip
->name
);
80 seq_printf(p
, " %s", action
->name
);
82 for (action
=action
->next
; action
; action
= action
->next
)
83 seq_printf(p
, ", %s", action
->name
);
87 spin_unlock_irqrestore(&irq_desc
[i
].lock
, flags
);
88 } else if (i
== NR_IRQS
)
89 seq_printf(p
, "ERR: %10u\n", atomic_read(&irq_err_count
));
94 static char irq_redir
[NR_IRQS
]; // = { [0 ... NR_IRQS-1] = 1 };
96 void set_irq_affinity_info (unsigned int irq
, int hwid
, int redir
)
98 cpumask_t mask
= CPU_MASK_NONE
;
100 cpu_set(cpu_logical_id(hwid
), mask
);
103 irq_desc
[irq
].affinity
= mask
;
104 irq_redir
[irq
] = (char) (redir
& 0xff);
108 bool is_affinity_mask_valid(cpumask_t cpumask
)
110 if (ia64_platform_is("sn2")) {
111 /* Only allow one CPU to be specified in the smp_affinity mask */
112 if (cpus_weight(cpumask
) != 1)
118 #endif /* CONFIG_SMP */
120 #ifdef CONFIG_HOTPLUG_CPU
121 unsigned int vectors_in_migration
[NR_IRQS
];
124 * Since cpu_online_map is already updated, we just need to check for
125 * affinity that has zeros
127 static void migrate_irqs(void)
133 for (irq
=0; irq
< NR_IRQS
; irq
++) {
134 desc
= irq_desc
+ irq
;
136 if (desc
->status
== IRQ_DISABLED
)
140 * No handling for now.
141 * TBD: Implement a disable function so we can now
142 * tell CPU not to respond to these local intr sources.
143 * such as ITV,CPEI,MCA etc.
145 if (desc
->status
== IRQ_PER_CPU
)
148 cpus_and(mask
, irq_desc
[irq
].affinity
, cpu_online_map
);
149 if (any_online_cpu(mask
) == NR_CPUS
) {
151 * Save it for phase 2 processing
153 vectors_in_migration
[irq
] = irq
;
155 new_cpu
= any_online_cpu(cpu_online_map
);
156 mask
= cpumask_of_cpu(new_cpu
);
159 * Al three are essential, currently WARN_ON.. maybe panic?
161 if (desc
->chip
&& desc
->chip
->disable
&&
162 desc
->chip
->enable
&& desc
->chip
->set_affinity
) {
163 desc
->chip
->disable(irq
);
164 desc
->chip
->set_affinity(irq
, mask
);
165 desc
->chip
->enable(irq
);
167 WARN_ON((!(desc
->chip
) || !(desc
->chip
->disable
) ||
168 !(desc
->chip
->enable
) ||
169 !(desc
->chip
->set_affinity
)));
175 void fixup_irqs(void)
178 extern void ia64_process_pending_intr(void);
179 extern void ia64_disable_timer(void);
180 extern volatile int time_keeper_id
;
182 ia64_disable_timer();
185 * Find a new timesync master
187 if (smp_processor_id() == time_keeper_id
) {
188 time_keeper_id
= first_cpu(cpu_online_map
);
189 printk ("CPU %d is now promoted to time-keeper master\n", time_keeper_id
);
193 * Phase 1: Locate IRQs bound to this cpu and
194 * relocate them for cpu removal.
199 * Phase 2: Perform interrupt processing for all entries reported in
202 ia64_process_pending_intr();
205 * Phase 3: Now handle any interrupts not captured in local APIC.
206 * This is to account for cases that device interrupted during the time the
207 * rte was being disabled and re-programmed.
209 for (irq
=0; irq
< NR_IRQS
; irq
++) {
210 if (vectors_in_migration
[irq
]) {
211 struct pt_regs
*old_regs
= set_irq_regs(NULL
);
213 vectors_in_migration
[irq
]=0;
214 generic_handle_irq(irq
);
215 set_irq_regs(old_regs
);
220 * Now let processor die. We do irq disable and max_xtp() to
221 * ensure there is no more interrupts routed to this processor.
222 * But the local timer interrupt can have 1 pending which we
223 * take care in timer_interrupt().