dmaengine: driver for the iop32x, iop33x, and iop13xx raid engines
[pv_ops_mirror.git] / arch / m32r / boot / compressed / m32r_sio.c
blobee3c8be12fa0efba5244d5c1f1b393760f131e89
1 /*
2 * arch/m32r/boot/compressed/m32r_sio.c
4 * 2003-02-12: Takeo Takahashi
5 * 2006-11-30: OPSPUT support by Kazuhiro Inaoka
7 */
9 #include <asm/processor.h>
11 static void putc(char c);
13 static int puts(const char *s)
15 char c;
16 while ((c = *s++)) putc(c);
17 return 0;
20 #if defined(CONFIG_PLAT_M32700UT_Alpha) || defined(CONFIG_PLAT_M32700UT) || defined(CONFIG_PLAT_OPSPUT)
21 #include <asm/m32r.h>
22 #include <asm/io.h>
24 #define USE_FPGA_MAP 0
26 #if USE_FPGA_MAP
28 * fpga configuration program uses MMU, and define map as same as
29 * M32104 uT-Engine board.
31 #define BOOT_SIO0STS (volatile unsigned short *)(0x02c00000 + 0x20006)
32 #define BOOT_SIO0TXB (volatile unsigned short *)(0x02c00000 + 0x2000c)
33 #else
34 #undef PLD_BASE
35 #if defined(CONFIG_PLAT_OPSPUT)
36 #define PLD_BASE 0x1cc00000
37 #else
38 #define PLD_BASE 0xa4c00000
39 #endif
40 #define BOOT_SIO0STS PLD_ESIO0STS
41 #define BOOT_SIO0TXB PLD_ESIO0TXB
42 #endif
44 static void putc(char c)
46 while ((*BOOT_SIO0STS & 0x3) != 0x3)
47 cpu_relax();
48 if (c == '\n') {
49 *BOOT_SIO0TXB = '\r';
50 while ((*BOOT_SIO0STS & 0x3) != 0x3)
51 cpu_relax();
53 *BOOT_SIO0TXB = c;
55 #else /* !(CONFIG_PLAT_M32700UT_Alpha) && !(CONFIG_PLAT_M32700UT) */
56 #if defined(CONFIG_PLAT_MAPPI2)
57 #define SIO0STS (volatile unsigned short *)(0xa0efd000 + 14)
58 #define SIO0TXB (volatile unsigned short *)(0xa0efd000 + 30)
59 #else
60 #define SIO0STS (volatile unsigned short *)(0x00efd000 + 14)
61 #define SIO0TXB (volatile unsigned short *)(0x00efd000 + 30)
62 #endif
64 static void putc(char c)
66 while ((*SIO0STS & 0x1) == 0)
67 cpu_relax();
68 if (c == '\n') {
69 *SIO0TXB = '\r';
70 while ((*SIO0STS & 0x1) == 0)
71 cpu_relax();
73 *SIO0TXB = c;
75 #endif