dmaengine: driver for the iop32x, iop33x, and iop13xx raid engines
[pv_ops_mirror.git] / arch / m32r / kernel / setup_mappi.c
blob6b2d77da06830c734c01d588881694c115e84c53
1 /*
2 * linux/arch/m32r/kernel/setup_mappi.c
4 * Setup routines for Renesas MAPPI Board
6 * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto
8 */
10 #include <linux/irq.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
15 #include <asm/system.h>
16 #include <asm/m32r.h>
17 #include <asm/io.h>
19 #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
21 icu_data_t icu_data[NR_IRQS];
23 static void disable_mappi_irq(unsigned int irq)
25 unsigned long port, data;
27 port = irq2port(irq);
28 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
29 outl(data, port);
32 static void enable_mappi_irq(unsigned int irq)
34 unsigned long port, data;
36 port = irq2port(irq);
37 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
38 outl(data, port);
41 static void mask_and_ack_mappi(unsigned int irq)
43 disable_mappi_irq(irq);
46 static void end_mappi_irq(unsigned int irq)
48 enable_mappi_irq(irq);
51 static unsigned int startup_mappi_irq(unsigned int irq)
53 enable_mappi_irq(irq);
54 return (0);
57 static void shutdown_mappi_irq(unsigned int irq)
59 unsigned long port;
61 port = irq2port(irq);
62 outl(M32R_ICUCR_ILEVEL7, port);
65 static struct hw_interrupt_type mappi_irq_type =
67 .typename = "MAPPI-IRQ",
68 .startup = startup_mappi_irq,
69 .shutdown = shutdown_mappi_irq,
70 .enable = enable_mappi_irq,
71 .disable = disable_mappi_irq,
72 .ack = mask_and_ack_mappi,
73 .end = end_mappi_irq
76 void __init init_IRQ(void)
78 static int once = 0;
80 if (once)
81 return;
82 else
83 once++;
85 #ifdef CONFIG_NE2000
86 /* INT0 : LAN controller (RTL8019AS) */
87 irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
88 irq_desc[M32R_IRQ_INT0].chip = &mappi_irq_type;
89 irq_desc[M32R_IRQ_INT0].action = NULL;
90 irq_desc[M32R_IRQ_INT0].depth = 1;
91 icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
92 disable_mappi_irq(M32R_IRQ_INT0);
93 #endif /* CONFIG_M32R_NE2000 */
95 /* MFT2 : system timer */
96 irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
97 irq_desc[M32R_IRQ_MFT2].chip = &mappi_irq_type;
98 irq_desc[M32R_IRQ_MFT2].action = NULL;
99 irq_desc[M32R_IRQ_MFT2].depth = 1;
100 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
101 disable_mappi_irq(M32R_IRQ_MFT2);
103 #ifdef CONFIG_SERIAL_M32R_SIO
104 /* SIO0_R : uart receive data */
105 irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
106 irq_desc[M32R_IRQ_SIO0_R].chip = &mappi_irq_type;
107 irq_desc[M32R_IRQ_SIO0_R].action = NULL;
108 irq_desc[M32R_IRQ_SIO0_R].depth = 1;
109 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
110 disable_mappi_irq(M32R_IRQ_SIO0_R);
112 /* SIO0_S : uart send data */
113 irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
114 irq_desc[M32R_IRQ_SIO0_S].chip = &mappi_irq_type;
115 irq_desc[M32R_IRQ_SIO0_S].action = NULL;
116 irq_desc[M32R_IRQ_SIO0_S].depth = 1;
117 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
118 disable_mappi_irq(M32R_IRQ_SIO0_S);
120 /* SIO1_R : uart receive data */
121 irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
122 irq_desc[M32R_IRQ_SIO1_R].chip = &mappi_irq_type;
123 irq_desc[M32R_IRQ_SIO1_R].action = NULL;
124 irq_desc[M32R_IRQ_SIO1_R].depth = 1;
125 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
126 disable_mappi_irq(M32R_IRQ_SIO1_R);
128 /* SIO1_S : uart send data */
129 irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
130 irq_desc[M32R_IRQ_SIO1_S].chip = &mappi_irq_type;
131 irq_desc[M32R_IRQ_SIO1_S].action = NULL;
132 irq_desc[M32R_IRQ_SIO1_S].depth = 1;
133 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
134 disable_mappi_irq(M32R_IRQ_SIO1_S);
135 #endif /* CONFIG_SERIAL_M32R_SIO */
137 #if defined(CONFIG_M32R_PCC)
138 /* INT1 : pccard0 interrupt */
139 irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
140 irq_desc[M32R_IRQ_INT1].chip = &mappi_irq_type;
141 irq_desc[M32R_IRQ_INT1].action = NULL;
142 irq_desc[M32R_IRQ_INT1].depth = 1;
143 icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
144 disable_mappi_irq(M32R_IRQ_INT1);
146 /* INT2 : pccard1 interrupt */
147 irq_desc[M32R_IRQ_INT2].status = IRQ_DISABLED;
148 irq_desc[M32R_IRQ_INT2].chip = &mappi_irq_type;
149 irq_desc[M32R_IRQ_INT2].action = NULL;
150 irq_desc[M32R_IRQ_INT2].depth = 1;
151 icu_data[M32R_IRQ_INT2].icucr = M32R_ICUCR_IEN | M32R_ICUCR_ISMOD00;
152 disable_mappi_irq(M32R_IRQ_INT2);
153 #endif /* CONFIG_M32RPCC */
156 #if defined(CONFIG_FB_S1D13XXX)
158 #include <video/s1d13xxxfb.h>
159 #include <asm/s1d13806.h>
161 static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
162 .initregs = s1d13xxxfb_initregs,
163 .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
164 .platform_init_video = NULL,
165 #ifdef CONFIG_PM
166 .platform_suspend_video = NULL,
167 .platform_resume_video = NULL,
168 #endif
171 static struct resource s1d13xxxfb_resources[] = {
172 [0] = {
173 .start = 0x10200000UL,
174 .end = 0x1033FFFFUL,
175 .flags = IORESOURCE_MEM,
177 [1] = {
178 .start = 0x10000000UL,
179 .end = 0x100001FFUL,
180 .flags = IORESOURCE_MEM,
184 static struct platform_device s1d13xxxfb_device = {
185 .name = S1D_DEVICENAME,
186 .id = 0,
187 .dev = {
188 .platform_data = &s1d13xxxfb_data,
190 .num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
191 .resource = s1d13xxxfb_resources,
194 static int __init platform_init(void)
196 platform_device_register(&s1d13xxxfb_device);
197 return 0;
199 arch_initcall(platform_init);
200 #endif