zd1211rw: too early inclusion of asm/unaligned.h
[pv_ops_mirror.git] / drivers / net / wireless / rtl8187.h
blob6124e467b156467d2f7101806a78d29d5edbf531
1 /*
2 * Definitions for RTL8187 hardware
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #ifndef RTL8187_H
16 #define RTL8187_H
18 #include "rtl818x.h"
20 #define RTL8187_EEPROM_TXPWR_BASE 0x05
21 #define RTL8187_EEPROM_MAC_ADDR 0x07
22 #define RTL8187_EEPROM_TXPWR_CHAN_1 0x16 /* 3 channels */
23 #define RTL8187_EEPROM_TXPWR_CHAN_6 0x1B /* 2 channels */
24 #define RTL8187_EEPROM_TXPWR_CHAN_4 0x3D /* 2 channels */
26 #define RTL8187_REQT_READ 0xC0
27 #define RTL8187_REQT_WRITE 0x40
28 #define RTL8187_REQ_GET_REG 0x05
29 #define RTL8187_REQ_SET_REG 0x05
31 #define RTL8187_MAX_RX 0x9C4
33 struct rtl8187_rx_info {
34 struct urb *urb;
35 struct ieee80211_hw *dev;
38 struct rtl8187_rx_hdr {
39 __le16 len;
40 __le16 rate;
41 u8 noise;
42 u8 signal;
43 u8 agc;
44 u8 reserved;
45 __le64 mac_time;
46 } __attribute__((packed));
48 struct rtl8187_tx_info {
49 struct ieee80211_tx_control *control;
50 struct urb *urb;
51 struct ieee80211_hw *dev;
54 struct rtl8187_tx_hdr {
55 __le32 flags;
56 #define RTL8187_TX_FLAG_NO_ENCRYPT (1 << 15)
57 #define RTL8187_TX_FLAG_MORE_FRAG (1 << 17)
58 #define RTL8187_TX_FLAG_CTS (1 << 18)
59 #define RTL8187_TX_FLAG_RTS (1 << 23)
60 __le16 rts_duration;
61 __le16 len;
62 __le32 retry;
63 } __attribute__((packed));
65 struct rtl8187_priv {
66 /* common between rtl818x drivers */
67 struct rtl818x_csr *map;
68 void (*rf_init)(struct ieee80211_hw *);
69 int mode;
71 /* rtl8187 specific */
72 struct ieee80211_channel channels[14];
73 struct ieee80211_rate rates[12];
74 struct ieee80211_hw_mode modes[2];
75 struct usb_device *udev;
76 u8 *hwaddr;
77 u16 txpwr_base;
78 u8 asic_rev;
79 struct sk_buff_head rx_queue;
82 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);
84 static inline u8 rtl818x_ioread8(struct rtl8187_priv *priv, u8 *addr)
86 u8 val;
88 usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
89 RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
90 (unsigned long)addr, 0, &val, sizeof(val), HZ / 2);
92 return val;
95 static inline u16 rtl818x_ioread16(struct rtl8187_priv *priv, __le16 *addr)
97 __le16 val;
99 usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
100 RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
101 (unsigned long)addr, 0, &val, sizeof(val), HZ / 2);
103 return le16_to_cpu(val);
106 static inline u32 rtl818x_ioread32(struct rtl8187_priv *priv, __le32 *addr)
108 __le32 val;
110 usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
111 RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
112 (unsigned long)addr, 0, &val, sizeof(val), HZ / 2);
114 return le32_to_cpu(val);
117 static inline void rtl818x_iowrite8(struct rtl8187_priv *priv,
118 u8 *addr, u8 val)
120 usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
121 RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
122 (unsigned long)addr, 0, &val, sizeof(val), HZ / 2);
125 static inline void rtl818x_iowrite16(struct rtl8187_priv *priv,
126 __le16 *addr, u16 val)
128 __le16 buf = cpu_to_le16(val);
130 usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
131 RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
132 (unsigned long)addr, 0, &buf, sizeof(buf), HZ / 2);
135 static inline void rtl818x_iowrite32(struct rtl8187_priv *priv,
136 __le32 *addr, u32 val)
138 __le32 buf = cpu_to_le32(val);
140 usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
141 RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
142 (unsigned long)addr, 0, &buf, sizeof(buf), HZ / 2);
145 #endif /* RTL8187_H */