[ARM] 3340/1: Fix the PCI setup for direct master access to SDRAM
[pv_ops_mirror.git] / arch / arm / plat-omap / cpu-omap.c
blob98edc9fdd6d10df39ee8d360b5108397f78112fe
1 /*
2 * linux/arch/arm/plat-omap/cpu-omap.c
4 * CPU frequency scaling for OMAP
6 * Copyright (C) 2005 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com>
9 * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
15 #include <linux/types.h>
16 #include <linux/kernel.h>
17 #include <linux/sched.h>
18 #include <linux/cpufreq.h>
19 #include <linux/delay.h>
20 #include <linux/init.h>
21 #include <linux/err.h>
22 #include <linux/clk.h>
24 #include <asm/hardware.h>
25 #include <asm/io.h>
26 #include <asm/system.h>
28 /* TODO: Add support for SDRAM timing changes */
30 int omap_verify_speed(struct cpufreq_policy *policy)
32 struct clk * mpu_clk;
34 if (policy->cpu)
35 return -EINVAL;
37 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
38 policy->cpuinfo.max_freq);
39 mpu_clk = clk_get(NULL, "mpu");
40 if (IS_ERR(mpu_clk))
41 return PTR_ERR(mpu_clk);
42 policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000;
43 policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000;
44 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq,
45 policy->cpuinfo.max_freq);
46 clk_put(mpu_clk);
48 return 0;
51 unsigned int omap_getspeed(unsigned int cpu)
53 struct clk * mpu_clk;
54 unsigned long rate;
56 if (cpu)
57 return 0;
59 mpu_clk = clk_get(NULL, "mpu");
60 if (IS_ERR(mpu_clk))
61 return 0;
62 rate = clk_get_rate(mpu_clk) / 1000;
63 clk_put(mpu_clk);
65 return rate;
68 static int omap_target(struct cpufreq_policy *policy,
69 unsigned int target_freq,
70 unsigned int relation)
72 struct clk * mpu_clk;
73 struct cpufreq_freqs freqs;
74 int ret = 0;
76 mpu_clk = clk_get(NULL, "mpu");
77 if (IS_ERR(mpu_clk))
78 return PTR_ERR(mpu_clk);
80 freqs.old = omap_getspeed(0);
81 freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000;
82 freqs.cpu = 0;
84 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
85 ret = clk_set_rate(mpu_clk, target_freq * 1000);
86 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
87 clk_put(mpu_clk);
89 return ret;
92 static int __init omap_cpu_init(struct cpufreq_policy *policy)
94 struct clk * mpu_clk;
96 mpu_clk = clk_get(NULL, "mpu");
97 if (IS_ERR(mpu_clk))
98 return PTR_ERR(mpu_clk);
100 if (policy->cpu != 0)
101 return -EINVAL;
102 policy->cur = policy->min = policy->max = omap_getspeed(0);
103 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
104 policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000;
105 policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, 216000000) / 1000;
106 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
107 clk_put(mpu_clk);
109 return 0;
112 static struct cpufreq_driver omap_driver = {
113 .flags = CPUFREQ_STICKY,
114 .verify = omap_verify_speed,
115 .target = omap_target,
116 .get = omap_getspeed,
117 .init = omap_cpu_init,
118 .name = "omap",
121 static int __init omap_cpufreq_init(void)
123 return cpufreq_register_driver(&omap_driver);
126 arch_initcall(omap_cpufreq_init);