[ARM] 3340/1: Fix the PCI setup for direct master access to SDRAM
[pv_ops_mirror.git] / arch / sh / boards / snapgear / rtc.c
blobb71e009da35cb265dfbcb208527451bff2dbc69f
1 /****************************************************************************/
2 /*
3 * linux/arch/sh/boards/snapgear/rtc.c -- Secureedge5410 RTC code
5 * Copyright (C) 2002 David McCullough <davidm@snapgear.com>
6 * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org>
8 * The SecureEdge5410 can have one of 2 real time clocks, the SH
9 * built in version or the preferred external DS1302. Here we work out
10 * each to see what we have and then run with it.
12 /****************************************************************************/
14 #include <linux/init.h>
15 #include <linux/kernel.h>
16 #include <linux/sched.h>
17 #include <linux/time.h>
18 #include <linux/rtc.h>
19 #include <linux/mc146818rtc.h>
21 #include <asm/io.h>
22 #include <asm/rtc.h>
23 #include <asm/mc146818rtc.h>
25 /****************************************************************************/
27 static int use_ds1302 = 0;
29 /****************************************************************************/
31 * we need to implement a DS1302 driver here that can operate in
32 * conjunction with the builtin rtc driver which is already quite friendly
34 /*****************************************************************************/
36 #define RTC_CMD_READ 0x81 /* Read command */
37 #define RTC_CMD_WRITE 0x80 /* Write command */
39 #define RTC_ADDR_YEAR 0x06 /* Address of year register */
40 #define RTC_ADDR_DAY 0x05 /* Address of day of week register */
41 #define RTC_ADDR_MON 0x04 /* Address of month register */
42 #define RTC_ADDR_DATE 0x03 /* Address of day of month register */
43 #define RTC_ADDR_HOUR 0x02 /* Address of hour register */
44 #define RTC_ADDR_MIN 0x01 /* Address of minute register */
45 #define RTC_ADDR_SEC 0x00 /* Address of second register */
47 #define RTC_RESET 0x1000
48 #define RTC_IODATA 0x0800
49 #define RTC_SCLK 0x0400
51 #define set_dirp(x)
52 #define get_dirp(x) 0
53 #define set_dp(x) SECUREEDGE_WRITE_IOPORT(x, 0x1c00)
54 #define get_dp(x) SECUREEDGE_READ_IOPORT()
56 static void ds1302_sendbits(unsigned int val)
58 int i;
60 for (i = 8; (i); i--, val >>= 1) {
61 set_dp((get_dp() & ~RTC_IODATA) | ((val & 0x1) ? RTC_IODATA : 0));
62 set_dp(get_dp() | RTC_SCLK); // clock high
63 set_dp(get_dp() & ~RTC_SCLK); // clock low
67 static unsigned int ds1302_recvbits(void)
69 unsigned int val;
70 int i;
72 for (i = 0, val = 0; (i < 8); i++) {
73 val |= (((get_dp() & RTC_IODATA) ? 1 : 0) << i);
74 set_dp(get_dp() | RTC_SCLK); // clock high
75 set_dp(get_dp() & ~RTC_SCLK); // clock low
77 return(val);
80 static unsigned int ds1302_readbyte(unsigned int addr)
82 unsigned int val;
83 unsigned long flags;
85 #if 0
86 printk("SnapGear RTC: ds1302_readbyte(addr=%x)\n", addr);
87 #endif
89 local_irq_save(flags);
90 set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
91 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
93 set_dp(get_dp() | RTC_RESET);
94 ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_READ);
95 set_dirp(get_dirp() & ~RTC_IODATA);
96 val = ds1302_recvbits();
97 set_dp(get_dp() & ~RTC_RESET);
98 local_irq_restore(flags);
100 return(val);
103 static void ds1302_writebyte(unsigned int addr, unsigned int val)
105 unsigned long flags;
107 #if 0
108 printk("SnapGear RTC: ds1302_writebyte(addr=%x)\n", addr);
109 #endif
111 local_irq_save(flags);
112 set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
113 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
114 set_dp(get_dp() | RTC_RESET);
115 ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_WRITE);
116 ds1302_sendbits(val);
117 set_dp(get_dp() & ~RTC_RESET);
118 local_irq_restore(flags);
121 static void ds1302_reset(void)
123 unsigned long flags;
124 /* Hardware dependant reset/init */
125 local_irq_save(flags);
126 set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
127 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
128 local_irq_restore(flags);
131 /*****************************************************************************/
133 static inline int bcd2int(int val)
135 return((((val & 0xf0) >> 4) * 10) + (val & 0xf));
138 static inline int int2bcd(int val)
140 return(((val / 10) << 4) + (val % 10));
143 /*****************************************************************************/
145 * Write and Read some RAM in the DS1302, if it works assume it's there
146 * Otherwise use the SH4 internal RTC
149 void snapgear_rtc_gettimeofday(struct timespec *);
150 int snapgear_rtc_settimeofday(const time_t);
152 void __init secureedge5410_rtc_init(void)
154 unsigned char *test = "snapgear";
155 int i;
157 ds1302_reset();
159 use_ds1302 = 1;
161 for (i = 0; test[i]; i++)
162 ds1302_writebyte(32 + i, test[i]);
164 for (i = 0; test[i]; i++)
165 if (ds1302_readbyte(32 + i) != test[i]) {
166 use_ds1302 = 0;
167 break;
170 if (use_ds1302) {
171 rtc_get_time = snapgear_rtc_gettimeofday;
172 rtc_set_time = snapgear_rtc_settimeofday;
173 } else {
174 rtc_get_time = sh_rtc_gettimeofday;
175 rtc_set_time = sh_rtc_settimeofday;
178 printk("SnapGear RTC: using %s rtc.\n", use_ds1302 ? "ds1302" : "internal");
181 /****************************************************************************/
183 * our generic interface that chooses the correct code to use
186 void snapgear_rtc_gettimeofday(struct timespec *ts)
188 unsigned int sec, min, hr, day, mon, yr;
190 if (!use_ds1302) {
191 sh_rtc_gettimeofday(ts);
192 return;
195 sec = bcd2int(ds1302_readbyte(RTC_ADDR_SEC));
196 min = bcd2int(ds1302_readbyte(RTC_ADDR_MIN));
197 hr = bcd2int(ds1302_readbyte(RTC_ADDR_HOUR));
198 day = bcd2int(ds1302_readbyte(RTC_ADDR_DATE));
199 mon = bcd2int(ds1302_readbyte(RTC_ADDR_MON));
200 yr = bcd2int(ds1302_readbyte(RTC_ADDR_YEAR));
202 bad_time:
203 if (yr > 99 || mon < 1 || mon > 12 || day > 31 || day < 1 ||
204 hr > 23 || min > 59 || sec > 59) {
205 printk(KERN_ERR
206 "SnapGear RTC: invalid value, resetting to 1 Jan 2000\n");
207 ds1302_writebyte(RTC_ADDR_MIN, min = 0);
208 ds1302_writebyte(RTC_ADDR_HOUR, hr = 0);
209 ds1302_writebyte(RTC_ADDR_DAY, 7);
210 ds1302_writebyte(RTC_ADDR_DATE, day = 1);
211 ds1302_writebyte(RTC_ADDR_MON, mon = 1);
212 ds1302_writebyte(RTC_ADDR_YEAR, yr = 0);
213 ds1302_writebyte(RTC_ADDR_SEC, sec = 0);
216 ts->tv_sec = mktime(2000 + yr, mon, day, hr, min, sec);
217 if (ts->tv_sec < 0) {
218 #if 0
219 printk("BAD TIME %d %d %d %d %d %d\n", yr, mon, day, hr, min, sec);
220 #endif
221 yr = 100;
222 goto bad_time;
224 ts->tv_nsec = 0;
227 int snapgear_rtc_settimeofday(const time_t secs)
229 int retval = 0;
230 int real_seconds, real_minutes, cmos_minutes;
231 unsigned long nowtime;
233 if (!use_ds1302)
234 return sh_rtc_settimeofday(secs);
237 * This is called direct from the kernel timer handling code.
238 * It is supposed to synchronize the kernel clock to the RTC.
241 nowtime = secs;
243 #if 1
244 printk("SnapGear RTC: snapgear_rtc_settimeofday(nowtime=%ld)\n", nowtime);
245 #endif
247 /* STOP RTC */
248 ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80);
250 cmos_minutes = bcd2int(ds1302_readbyte(RTC_ADDR_MIN));
253 * since we're only adjusting minutes and seconds,
254 * don't interfere with hour overflow. This avoids
255 * messing with unknown time zones but requires your
256 * RTC not to be off by more than 15 minutes
258 real_seconds = nowtime % 60;
259 real_minutes = nowtime / 60;
260 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
261 real_minutes += 30; /* correct for half hour time zone */
262 real_minutes %= 60;
264 if (abs(real_minutes - cmos_minutes) < 30) {
265 ds1302_writebyte(RTC_ADDR_MIN, int2bcd(real_minutes));
266 ds1302_writebyte(RTC_ADDR_SEC, int2bcd(real_seconds));
267 } else {
268 printk(KERN_WARNING
269 "SnapGear RTC: can't update from %d to %d\n",
270 cmos_minutes, real_minutes);
271 retval = -1;
274 /* START RTC */
275 ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80);
276 return(0);
279 unsigned char secureedge5410_cmos_read(int addr)
281 unsigned char val = 0;
283 if (!use_ds1302)
284 return(__CMOS_READ(addr, w));
286 switch(addr) {
287 case RTC_SECONDS: val = ds1302_readbyte(RTC_ADDR_SEC); break;
288 case RTC_SECONDS_ALARM: break;
289 case RTC_MINUTES: val = ds1302_readbyte(RTC_ADDR_MIN); break;
290 case RTC_MINUTES_ALARM: break;
291 case RTC_HOURS: val = ds1302_readbyte(RTC_ADDR_HOUR); break;
292 case RTC_HOURS_ALARM: break;
293 case RTC_DAY_OF_WEEK: val = ds1302_readbyte(RTC_ADDR_DAY); break;
294 case RTC_DAY_OF_MONTH: val = ds1302_readbyte(RTC_ADDR_DATE); break;
295 case RTC_MONTH: val = ds1302_readbyte(RTC_ADDR_MON); break;
296 case RTC_YEAR: val = ds1302_readbyte(RTC_ADDR_YEAR); break;
297 case RTC_REG_A: /* RTC_FREQ_SELECT */ break;
298 case RTC_REG_B: /* RTC_CONTROL */ break;
299 case RTC_REG_C: /* RTC_INTR_FLAGS */ break;
300 case RTC_REG_D: val = RTC_VRT /* RTC_VALID */; break;
301 default: break;
304 return(val);
307 void secureedge5410_cmos_write(unsigned char val, int addr)
309 if (!use_ds1302) {
310 __CMOS_WRITE(val, addr, w);
311 return;
314 switch(addr) {
315 case RTC_SECONDS: ds1302_writebyte(RTC_ADDR_SEC, val); break;
316 case RTC_SECONDS_ALARM: break;
317 case RTC_MINUTES: ds1302_writebyte(RTC_ADDR_MIN, val); break;
318 case RTC_MINUTES_ALARM: break;
319 case RTC_HOURS: ds1302_writebyte(RTC_ADDR_HOUR, val); break;
320 case RTC_HOURS_ALARM: break;
321 case RTC_DAY_OF_WEEK: ds1302_writebyte(RTC_ADDR_DAY, val); break;
322 case RTC_DAY_OF_MONTH: ds1302_writebyte(RTC_ADDR_DATE, val); break;
323 case RTC_MONTH: ds1302_writebyte(RTC_ADDR_MON, val); break;
324 case RTC_YEAR: ds1302_writebyte(RTC_ADDR_YEAR, val); break;
325 case RTC_REG_A: /* RTC_FREQ_SELECT */ break;
326 case RTC_REG_B: /* RTC_CONTROL */ break;
327 case RTC_REG_C: /* RTC_INTR_FLAGS */ break;
328 case RTC_REG_D: /* RTC_VALID */ break;
329 default: break;
333 /****************************************************************************/