[POWERPC] QEIC: Implement pluggable handlers, fix MPIC cascading
[pv_ops_mirror.git] / include / asm-s390 / ipl.h
blob2c40fd3a137f304afd985a58c8155abadd7dcf70
1 /*
2 * s390 (re)ipl support
4 * Copyright IBM Corp. 2007
5 */
7 #ifndef _ASM_S390_IPL_H
8 #define _ASM_S390_IPL_H
10 #include <asm/types.h>
11 #include <asm/cio.h>
12 #include <asm/setup.h>
14 #define IPL_PARMBLOCK_ORIGIN 0x2000
16 #define IPL_PARM_BLK_FCP_LEN (sizeof(struct ipl_list_hdr) + \
17 sizeof(struct ipl_block_fcp))
19 #define IPL_PARM_BLK0_FCP_LEN (sizeof(struct ipl_block_fcp) + 8)
21 #define IPL_PARM_BLK_CCW_LEN (sizeof(struct ipl_list_hdr) + \
22 sizeof(struct ipl_block_ccw))
24 #define IPL_PARM_BLK0_CCW_LEN (sizeof(struct ipl_block_ccw) + 8)
26 #define IPL_MAX_SUPPORTED_VERSION (0)
28 #define IPL_PARMBLOCK_START ((struct ipl_parameter_block *) \
29 IPL_PARMBLOCK_ORIGIN)
30 #define IPL_PARMBLOCK_SIZE (IPL_PARMBLOCK_START->hdr.len)
32 struct ipl_list_hdr {
33 u32 len;
34 u8 reserved1[3];
35 u8 version;
36 u32 blk0_len;
37 u8 pbt;
38 u8 flags;
39 u16 reserved2;
40 } __attribute__((packed));
42 struct ipl_block_fcp {
43 u8 reserved1[313-1];
44 u8 opt;
45 u8 reserved2[3];
46 u16 reserved3;
47 u16 devno;
48 u8 reserved4[4];
49 u64 wwpn;
50 u64 lun;
51 u32 bootprog;
52 u8 reserved5[12];
53 u64 br_lba;
54 u32 scp_data_len;
55 u8 reserved6[260];
56 u8 scp_data[];
57 } __attribute__((packed));
59 struct ipl_block_ccw {
60 u8 load_param[8];
61 u8 reserved1[84];
62 u8 reserved2[2];
63 u16 devno;
64 u8 vm_flags;
65 u8 reserved3[3];
66 u32 vm_parm_len;
67 u8 reserved4[80];
68 } __attribute__((packed));
70 struct ipl_parameter_block {
71 struct ipl_list_hdr hdr;
72 union {
73 struct ipl_block_fcp fcp;
74 struct ipl_block_ccw ccw;
75 } ipl_info;
76 } __attribute__((packed));
79 * IPL validity flags
81 extern u32 ipl_flags;
82 extern u32 dump_prefix_page;
83 extern unsigned int zfcpdump_prefix_array[];
85 extern void do_reipl(void);
86 extern void ipl_save_parameters(void);
88 enum {
89 IPL_DEVNO_VALID = 1,
90 IPL_PARMBLOCK_VALID = 2,
91 IPL_NSS_VALID = 4,
94 enum ipl_type {
95 IPL_TYPE_UNKNOWN = 1,
96 IPL_TYPE_CCW = 2,
97 IPL_TYPE_FCP = 4,
98 IPL_TYPE_FCP_DUMP = 8,
99 IPL_TYPE_NSS = 16,
102 struct ipl_info
104 enum ipl_type type;
105 union {
106 struct {
107 struct ccw_dev_id dev_id;
108 } ccw;
109 struct {
110 struct ccw_dev_id dev_id;
111 u64 wwpn;
112 u64 lun;
113 } fcp;
114 struct {
115 char name[NSS_NAME_SIZE + 1];
116 } nss;
117 } data;
120 extern struct ipl_info ipl_info;
121 extern void setup_ipl_info(void);
124 * DIAG 308 support
126 enum diag308_subcode {
127 DIAG308_REL_HSA = 2,
128 DIAG308_IPL = 3,
129 DIAG308_DUMP = 4,
130 DIAG308_SET = 5,
131 DIAG308_STORE = 6,
134 enum diag308_ipl_type {
135 DIAG308_IPL_TYPE_FCP = 0,
136 DIAG308_IPL_TYPE_CCW = 2,
139 enum diag308_opt {
140 DIAG308_IPL_OPT_IPL = 0x10,
141 DIAG308_IPL_OPT_DUMP = 0x20,
144 enum diag308_rc {
145 DIAG308_RC_OK = 1,
148 extern int diag308(unsigned long subcode, void *addr);
150 #endif /* _ASM_S390_IPL_H */