drivers/usb/host/ehci-mem.c

   1 /*
   2  * Copyright (c) 2001 by David Brownell
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License as published by the
   6  * Free Software Foundation; either version 2 of the License, or (at your
   7  * option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful, but
  10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software Foundation,
  16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  */
  18
  19 /* this file is part of ehci-hcd.c */
  20
  21 /*-------------------------------------------------------------------------*/
  22
  23 /*
  24  * There's basically three types of memory:
  25  *      - data used only by the HCD ... kmalloc is fine
  26  *      - async and periodic schedules, shared by HC and HCD ... these
  27  *        need to use dma_pool or dma_alloc_coherent
  28  *      - driver buffers, read/written by HC ... single shot DMA mapped
  29  *
  30  * There's also "register" data (e.g. PCI or SOC), which is memory mapped.
  31  * No memory seen by this driver is pageable.
  32  */
  33
  34 /*-------------------------------------------------------------------------*/
  35
  36 /* Allocate the key transfer structures from the previously allocated pool */
  37
  38 static inline void ehci_qtd_init(struct ehci_hcd *ehci, struct ehci_qtd *qtd,
  39                                   dma_addr_t dma)
  40 {
  41         memset (qtd, 0, sizeof *qtd);
  42         qtd->qtd_dma = dma;
  43         qtd->hw_token = cpu_to_le32 (QTD_STS_HALT);
  44         qtd->hw_next = EHCI_LIST_END(ehci);
  45         qtd->hw_alt_next = EHCI_LIST_END(ehci);
  46         INIT_LIST_HEAD (&qtd->qtd_list);
  47 }
  48
  49 static struct ehci_qtd *ehci_qtd_alloc (struct ehci_hcd *ehci, gfp_t flags)
  50 {
  51         struct ehci_qtd         *qtd;
  52         dma_addr_t              dma;
  53
  54         qtd = dma_pool_alloc (ehci->qtd_pool, flags, &dma);
  55         if (qtd != NULL) {
  56                 ehci_qtd_init(ehci, qtd, dma);
  57         }
  58         return qtd;
  59 }
  60
  61 static inline void ehci_qtd_free (struct ehci_hcd *ehci, struct ehci_qtd *qtd)
  62 {
  63         dma_pool_free (ehci->qtd_pool, qtd, qtd->qtd_dma);
  64 }
  65
  66
  67 static void qh_destroy(struct ehci_qh *qh)
  68 {
  69         struct ehci_hcd *ehci = qh->ehci;
  70
  71         /* clean qtds first, and know this is not linked */
  72         if (!list_empty (&qh->qtd_list) || qh->qh_next.ptr) {
  73                 ehci_dbg (ehci, "unused qh not empty!\n");
  74                 BUG ();
  75         }
  76         if (qh->dummy)
  77                 ehci_qtd_free (ehci, qh->dummy);
  78         dma_pool_free (ehci->qh_pool, qh, qh->qh_dma);
  79 }
  80
  81 static struct ehci_qh *ehci_qh_alloc (struct ehci_hcd *ehci, gfp_t flags)
  82 {
  83         struct ehci_qh          *qh;
  84         dma_addr_t              dma;
  85
  86         qh = (struct ehci_qh *)
  87                 dma_pool_alloc (ehci->qh_pool, flags, &dma);
  88         if (!qh)
  89                 return qh;
  90
  91         memset (qh, 0, sizeof *qh);
  92         qh->refcount = 1;
  93         qh->ehci = ehci;
  94         qh->qh_dma = dma;
  95         // INIT_LIST_HEAD (&qh->qh_list);
  96         INIT_LIST_HEAD (&qh->qtd_list);
  97 #ifdef CONFIG_CPU_FREQ
  98         INIT_LIST_HEAD (&qh->split_intr_qhs);
  99 #endif
 100
 101         /* dummy td enables safe urb queuing */
 102         qh->dummy = ehci_qtd_alloc (ehci, flags);
 103         if (qh->dummy == NULL) {
 104                 ehci_dbg (ehci, "no dummy td\n");
 105                 dma_pool_free (ehci->qh_pool, qh, qh->qh_dma);
 106                 qh = NULL;
 107         }
 108         return qh;
 109 }
 110
 111 /* to share a qh (cpu threads, or hc) */
 112 static inline struct ehci_qh *qh_get (struct ehci_qh *qh)
 113 {
 114         WARN_ON(!qh->refcount);
 115         qh->refcount++;
 116         return qh;
 117 }
 118
 119 static inline void qh_put (struct ehci_qh *qh)
 120 {
 121         if (!--qh->refcount)
 122                 qh_destroy(qh);
 123 }
 124
 125 /*-------------------------------------------------------------------------*/
 126
 127 /* The queue heads and transfer descriptors are managed from pools tied
 128  * to each of the "per device" structures.
 129  * This is the initialisation and cleanup code.
 130  */
 131
 132 static void ehci_mem_cleanup (struct ehci_hcd *ehci)
 133 {
 134         if (ehci->async)
 135                 qh_put (ehci->async);
 136         ehci->async = NULL;
 137
 138         /* DMA consistent memory and pools */
 139         if (ehci->qtd_pool)
 140                 dma_pool_destroy (ehci->qtd_pool);
 141         ehci->qtd_pool = NULL;
 142
 143         if (ehci->qh_pool) {
 144                 dma_pool_destroy (ehci->qh_pool);
 145                 ehci->qh_pool = NULL;
 146         }
 147
 148         if (ehci->itd_pool)
 149                 dma_pool_destroy (ehci->itd_pool);
 150         ehci->itd_pool = NULL;
 151
 152         if (ehci->sitd_pool)
 153                 dma_pool_destroy (ehci->sitd_pool);
 154         ehci->sitd_pool = NULL;
 155
 156         if (ehci->periodic)
 157                 dma_free_coherent (ehci_to_hcd(ehci)->self.controller,
 158                         ehci->periodic_size * sizeof (u32),
 159                         ehci->periodic, ehci->periodic_dma);
 160         ehci->periodic = NULL;
 161
 162         /* shadow periodic table */
 163         kfree(ehci->pshadow);
 164         ehci->pshadow = NULL;
 165 }
 166
 167 /* remember to add cleanup code (above) if you add anything here */
 168 static int ehci_mem_init (struct ehci_hcd *ehci, gfp_t flags)
 169 {
 170         int i;
 171
 172         /* QTDs for control/bulk/intr transfers */
 173         ehci->qtd_pool = dma_pool_create ("ehci_qtd",
 174                         ehci_to_hcd(ehci)->self.controller,
 175                         sizeof (struct ehci_qtd),
 176                         32 /* byte alignment (for hw parts) */,
 177                         4096 /* can't cross 4K */);
 178         if (!ehci->qtd_pool) {
 179                 goto fail;
 180         }
 181
 182         /* QHs for control/bulk/intr transfers */
 183         ehci->qh_pool = dma_pool_create ("ehci_qh",
 184                         ehci_to_hcd(ehci)->self.controller,
 185                         sizeof (struct ehci_qh),
 186                         32 /* byte alignment (for hw parts) */,
 187                         4096 /* can't cross 4K */);
 188         if (!ehci->qh_pool) {
 189                 goto fail;
 190         }
 191         ehci->async = ehci_qh_alloc (ehci, flags);
 192         if (!ehci->async) {
 193                 goto fail;
 194         }
 195
 196         /* ITD for high speed ISO transfers */
 197         ehci->itd_pool = dma_pool_create ("ehci_itd",
 198                         ehci_to_hcd(ehci)->self.controller,
 199                         sizeof (struct ehci_itd),
 200                         32 /* byte alignment (for hw parts) */,
 201                         4096 /* can't cross 4K */);
 202         if (!ehci->itd_pool) {
 203                 goto fail;
 204         }
 205
 206         /* SITD for full/low speed split ISO transfers */
 207         ehci->sitd_pool = dma_pool_create ("ehci_sitd",
 208                         ehci_to_hcd(ehci)->self.controller,
 209                         sizeof (struct ehci_sitd),
 210                         32 /* byte alignment (for hw parts) */,
 211                         4096 /* can't cross 4K */);
 212         if (!ehci->sitd_pool) {
 213                 goto fail;
 214         }
 215
 216         /* Hardware periodic table */
 217         ehci->periodic = (__le32 *)
 218                 dma_alloc_coherent (ehci_to_hcd(ehci)->self.controller,
 219                         ehci->periodic_size * sizeof(__le32),
 220                         &ehci->periodic_dma, 0);
 221         if (ehci->periodic == NULL) {
 222                 goto fail;
 223         }
 224         for (i = 0; i < ehci->periodic_size; i++)
 225                 ehci->periodic [i] = EHCI_LIST_END(ehci);
 226
 227         /* software shadow of hardware table */
 228         ehci->pshadow = kcalloc(ehci->periodic_size, sizeof(void *), flags);
 229         if (ehci->pshadow != NULL)
 230                 return 0;
 231
 232 fail:
 233         ehci_dbg (ehci, "couldn't init memory\n");
 234         ehci_mem_cleanup (ehci);
 235         return -ENOMEM;
 236 }