1 /* linux/include/asm-arm/plat-s3c24xx/dma.h
3 * Copyright (C) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * Samsung S3C24XX DMA support
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 extern struct sysdev_class dma_sysclass
;
14 extern struct s3c2410_dma_chan s3c2410_chans
[S3C2410_DMA_CHANNELS
];
16 #define DMA_CH_VALID (1<<31)
17 #define DMA_CH_NEVER (1<<30)
19 struct s3c24xx_dma_addr
{
24 /* struct s3c24xx_dma_map
26 * this holds the mapping information for the channel selected
27 * to be connected to the specified device
30 struct s3c24xx_dma_map
{
32 struct s3c24xx_dma_addr hw_addr
;
34 unsigned long channels
[S3C2410_DMA_CHANNELS
];
37 struct s3c24xx_dma_selection
{
38 struct s3c24xx_dma_map
*map
;
39 unsigned long map_size
;
40 unsigned long dcon_mask
;
42 void (*select
)(struct s3c2410_dma_chan
*chan
,
43 struct s3c24xx_dma_map
*map
);
46 extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection
*sel
);
48 /* struct s3c24xx_dma_order_ch
50 * channel map for one of the `enum dma_ch` dma channels. the list
51 * entry contains a set of low-level channel numbers, orred with
52 * DMA_CH_VALID, which are checked in the order in the array.
55 struct s3c24xx_dma_order_ch
{
56 unsigned int list
[S3C2410_DMA_CHANNELS
]; /* list of channels */
57 unsigned int flags
; /* flags */
60 /* struct s3c24xx_dma_order
62 * information provided by either the core or the board to give the
63 * dma system a hint on how to allocate channels
66 struct s3c24xx_dma_order
{
67 struct s3c24xx_dma_order_ch channels
[DMACH_MAX
];
70 extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order
*map
);
72 /* DMA init code, called from the cpu support code */
74 extern int s3c2410_dma_init(void);
76 extern int s3c24xx_dma_init(unsigned int channels
, unsigned int irq
,