arch/ppc/platforms/spruce.c

   1 /*
   2  * Board and PCI setup routines for IBM Spruce
   3  *
   4  * Author: MontaVista Software <source@mvista.com>
   5  *
   6  * 2000-2004 (c) MontaVista, Software, Inc.  This file is licensed under
   7  * the terms of the GNU General Public License version 2.  This program
   8  * is licensed "as is" without any warranty of any kind, whether express
   9  * or implied.
  10  */
  11
  12 #include <linux/stddef.h>
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/errno.h>
  16 #include <linux/reboot.h>
  17 #include <linux/pci.h>
  18 #include <linux/kdev_t.h>
  19 #include <linux/types.h>
  20 #include <linux/major.h>
  21 #include <linux/initrd.h>
  22 #include <linux/console.h>
  23 #include <linux/delay.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/ide.h>
  26 #include <linux/root_dev.h>
  27 #include <linux/serial.h>
  28 #include <linux/tty.h>
  29 #include <linux/serial_core.h>
  30
  31 #include <asm/system.h>
  32 #include <asm/pgtable.h>
  33 #include <asm/page.h>
  34 #include <asm/dma.h>
  35 #include <asm/io.h>
  36 #include <asm/machdep.h>
  37 #include <asm/time.h>
  38 #include <asm/todc.h>
  39 #include <asm/bootinfo.h>
  40 #include <asm/kgdb.h>
  41
  42 #include <syslib/cpc700.h>
  43
  44 #include "spruce.h"
  45
  46 static inline int
  47 spruce_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
  48 {
  49         static char pci_irq_table[][4] =
  50                 /*
  51                  *      PCI IDSEL/INTPIN->INTLINE
  52                  *      A       B       C       D
  53                  */
  54         {
  55                 {23, 24, 25, 26},       /* IDSEL 1 - PCI slot 3 */
  56                 {24, 25, 26, 23},       /* IDSEL 2 - PCI slot 2 */
  57                 {25, 26, 23, 24},       /* IDSEL 3 - PCI slot 1 */
  58                 {26, 23, 24, 25},       /* IDSEL 4 - PCI slot 0 */
  59         };
  60
  61         const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
  62         return PCI_IRQ_TABLE_LOOKUP;
  63 }
  64
  65 static void __init
  66 spruce_setup_hose(void)
  67 {
  68         struct pci_controller *hose;
  69
  70         /* Setup hose */
  71         hose = pcibios_alloc_controller();
  72         if (!hose)
  73                 return;
  74
  75         hose->first_busno = 0;
  76         hose->last_busno = 0xff;
  77
  78         pci_init_resource(&hose->io_resource,
  79                         SPRUCE_PCI_LOWER_IO,
  80                         SPRUCE_PCI_UPPER_IO,
  81                         IORESOURCE_IO,
  82                         "PCI host bridge");
  83
  84         pci_init_resource(&hose->mem_resources[0],
  85                         SPRUCE_PCI_LOWER_MEM,
  86                         SPRUCE_PCI_UPPER_MEM,
  87                         IORESOURCE_MEM,
  88                         "PCI host bridge");
  89
  90         hose->io_space.start = SPRUCE_PCI_LOWER_IO;
  91         hose->io_space.end = SPRUCE_PCI_UPPER_IO;
  92         hose->mem_space.start = SPRUCE_PCI_LOWER_MEM;
  93         hose->mem_space.end = SPRUCE_PCI_UPPER_MEM;
  94         hose->io_base_virt = (void *)SPRUCE_ISA_IO_BASE;
  95
  96         setup_indirect_pci(hose,
  97                         SPRUCE_PCI_CONFIG_ADDR,
  98                         SPRUCE_PCI_CONFIG_DATA);
  99
 100         hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
 101
 102         ppc_md.pci_swizzle = common_swizzle;
 103         ppc_md.pci_map_irq = spruce_map_irq;
 104 }
 105
 106 /*
 107  * CPC700 PIC interrupt programming table
 108  *
 109  * First entry is the sensitivity (level/edge), second is the polarity.
 110  */
 111 unsigned int cpc700_irq_assigns[32][2] = {
 112         { 1, 1 },       /* IRQ  0: ECC Correctable Error - rising edge */
 113         { 1, 1 },       /* IRQ  1: PCI Write Mem Range   - rising edge */
 114         { 0, 1 },       /* IRQ  2: PCI Write Command Reg - active high */
 115         { 0, 1 },       /* IRQ  3: UART 0                - active high */
 116         { 0, 1 },       /* IRQ  4: UART 1                - active high */
 117         { 0, 1 },       /* IRQ  5: ICC 0                 - active high */
 118         { 0, 1 },       /* IRQ  6: ICC 1                 - active high */
 119         { 0, 1 },       /* IRQ  7: GPT Compare 0         - active high */
 120         { 0, 1 },       /* IRQ  8: GPT Compare 1         - active high */
 121         { 0, 1 },       /* IRQ  9: GPT Compare 2         - active high */
 122         { 0, 1 },       /* IRQ 10: GPT Compare 3         - active high */
 123         { 0, 1 },       /* IRQ 11: GPT Compare 4         - active high */
 124         { 0, 1 },       /* IRQ 12: GPT Capture 0         - active high */
 125         { 0, 1 },       /* IRQ 13: GPT Capture 1         - active high */
 126         { 0, 1 },       /* IRQ 14: GPT Capture 2         - active high */
 127         { 0, 1 },       /* IRQ 15: GPT Capture 3         - active high */
 128         { 0, 1 },       /* IRQ 16: GPT Capture 4         - active high */
 129         { 0, 0 },       /* IRQ 17: Reserved */
 130         { 0, 0 },       /* IRQ 18: Reserved */
 131         { 0, 0 },       /* IRQ 19: Reserved */
 132         { 0, 1 },       /* IRQ 20: FPGA EXT_IRQ0         - active high */
 133         { 1, 1 },       /* IRQ 21: Mouse                 - rising edge */
 134         { 1, 1 },       /* IRQ 22: Keyboard              - rising edge */
 135         { 0, 0 },       /* IRQ 23: PCI Slot 3            - active low */
 136         { 0, 0 },       /* IRQ 24: PCI Slot 2            - active low */
 137         { 0, 0 },       /* IRQ 25: PCI Slot 1            - active low */
 138         { 0, 0 },       /* IRQ 26: PCI Slot 0            - active low */
 139 };
 140
 141 static void __init
 142 spruce_calibrate_decr(void)
 143 {
 144         int freq, divisor = 4;
 145
 146         /* determine processor bus speed */
 147         freq = SPRUCE_BUS_SPEED;
 148         tb_ticks_per_jiffy = freq / HZ / divisor;
 149         tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
 150 }
 151
 152 static int
 153 spruce_show_cpuinfo(struct seq_file *m)
 154 {
 155         seq_printf(m, "vendor\t\t: IBM\n");
 156         seq_printf(m, "machine\t\t: Spruce\n");
 157
 158         return 0;
 159 }
 160
 161 static void __init
 162 spruce_early_serial_map(void)
 163 {
 164         u32 uart_clk;
 165         struct uart_port serial_req;
 166
 167         if (SPRUCE_UARTCLK_IS_33M(readb(SPRUCE_FPGA_REG_A)))
 168                 uart_clk = SPRUCE_BAUD_33M * 16;
 169         else
 170                 uart_clk = SPRUCE_BAUD_30M * 16;
 171
 172         /* Setup serial port access */
 173         memset(&serial_req, 0, sizeof(serial_req));
 174         serial_req.uartclk = uart_clk;
 175         serial_req.irq = UART0_INT;
 176         serial_req.flags = UPF_BOOT_AUTOCONF;
 177         serial_req.iotype = UPIO_MEM;
 178         serial_req.membase = (u_char *)UART0_IO_BASE;
 179         serial_req.regshift = 0;
 180
 181 #if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG)
 182         gen550_init(0, &serial_req);
 183 #endif
 184 #ifdef CONFIG_SERIAL_8250
 185         if (early_serial_setup(&serial_req) != 0)
 186                 printk("Early serial init of port 0 failed\n");
 187 #endif
 188
 189         /* Assume early_serial_setup() doesn't modify serial_req */
 190         serial_req.line = 1;
 191         serial_req.irq = UART1_INT;
 192         serial_req.membase = (u_char *)UART1_IO_BASE;
 193
 194 #if defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG)
 195         gen550_init(1, &serial_req);
 196 #endif
 197 #ifdef CONFIG_SERIAL_8250
 198         if (early_serial_setup(&serial_req) != 0)
 199                 printk("Early serial init of port 1 failed\n");
 200 #endif
 201 }
 202
 203 TODC_ALLOC();
 204
 205 static void __init
 206 spruce_setup_arch(void)
 207 {
 208         /* Setup TODC access */
 209         TODC_INIT(TODC_TYPE_DS1643, 0, 0, SPRUCE_RTC_BASE_ADDR, 8);
 210
 211         /* init to some ~sane value until calibrate_delay() runs */
 212         loops_per_jiffy = 50000000 / HZ;
 213
 214         /* Setup PCI host bridge */
 215         spruce_setup_hose();
 216
 217 #ifdef CONFIG_BLK_DEV_INITRD
 218         if (initrd_start)
 219                 ROOT_DEV = Root_RAM0;
 220         else
 221 #endif
 222 #ifdef CONFIG_ROOT_NFS
 223                 ROOT_DEV = Root_NFS;
 224 #else
 225                 ROOT_DEV = Root_SDA1;
 226 #endif
 227
 228         /* Identify the system */
 229         printk(KERN_INFO "System Identification: IBM Spruce\n");
 230         printk(KERN_INFO "Port by MontaVista Software, Inc. (source@mvista.com)\n");
 231 }
 232
 233 static void
 234 spruce_restart(char *cmd)
 235 {
 236         local_irq_disable();
 237
 238         /* SRR0 has system reset vector, SRR1 has default MSR value */
 239         /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
 240         __asm__ __volatile__
 241         ("\n\
 242         lis     3,0xfff0        \n\
 243         ori     3,3,0x0100      \n\
 244         mtspr   26,3            \n\
 245         li      3,0             \n\
 246         mtspr   27,3            \n\
 247         rfi                     \n\
 248         ");
 249         for(;;);
 250 }
 251
 252 static void
 253 spruce_power_off(void)
 254 {
 255         for(;;);
 256 }
 257
 258 static void
 259 spruce_halt(void)
 260 {
 261         spruce_restart(NULL);
 262 }
 263
 264 static void __init
 265 spruce_map_io(void)
 266 {
 267         io_block_mapping(SPRUCE_PCI_IO_BASE, SPRUCE_PCI_PHY_IO_BASE,
 268                          0x08000000, _PAGE_IO);
 269 }
 270
 271 /*
 272  * Set BAT 3 to map 0xf8000000 to end of physical memory space 1-to-1.
 273  */
 274 static __inline__ void
 275 spruce_set_bat(void)
 276 {
 277         mb();
 278         mtspr(SPRN_DBAT1U, 0xf8000ffe);
 279         mtspr(SPRN_DBAT1L, 0xf800002a);
 280         mb();
 281 }
 282
 283 void __init
 284 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
 285               unsigned long r6, unsigned long r7)
 286 {
 287         parse_bootinfo(find_bootinfo());
 288
 289         /* Map in board regs, etc. */
 290         spruce_set_bat();
 291
 292         isa_io_base = SPRUCE_ISA_IO_BASE;
 293         pci_dram_offset = SPRUCE_PCI_SYS_MEM_BASE;
 294
 295         ppc_md.setup_arch = spruce_setup_arch;
 296         ppc_md.show_cpuinfo = spruce_show_cpuinfo;
 297         ppc_md.init_IRQ = cpc700_init_IRQ;
 298         ppc_md.get_irq = cpc700_get_irq;
 299
 300         ppc_md.setup_io_mappings = spruce_map_io;
 301
 302         ppc_md.restart = spruce_restart;
 303         ppc_md.power_off = spruce_power_off;
 304         ppc_md.halt = spruce_halt;
 305
 306         ppc_md.time_init = todc_time_init;
 307         ppc_md.set_rtc_time = todc_set_rtc_time;
 308         ppc_md.get_rtc_time = todc_get_rtc_time;
 309         ppc_md.calibrate_decr = spruce_calibrate_decr;
 310
 311         ppc_md.nvram_read_val = todc_direct_read_val;
 312         ppc_md.nvram_write_val = todc_direct_write_val;
 313
 314         spruce_early_serial_map();
 315
 316 #ifdef CONFIG_SERIAL_TEXT_DEBUG
 317         ppc_md.progress = gen550_progress;
 318 #endif /* CONFIG_SERIAL_TEXT_DEBUG */
 319 #ifdef CONFIG_KGDB
 320         ppc_md.kgdb_map_scc = gen550_kgdb_map_scc;
 321 #endif
 322 }