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e1000: Add device IDs of blade version of the 82571 quad port
[pv_ops_mirror.git] / arch / arm / mach-at91 / at91sam9260_devices.c
blobffd3154c1e5404f2a305b4b4e8ece8b739ad8b02
1 /*
2 * arch/arm/mach-at91/at91sam9260_devices.c
3 *
4 * Copyright (C) 2006 Atmel
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
14
15 #include <linux/platform_device.h>
16
17 #include <asm/arch/board.h>
18 #include <asm/arch/gpio.h>
19 #include <asm/arch/at91sam9260.h>
20 #include <asm/arch/at91sam926x_mc.h>
21 #include <asm/arch/at91sam9260_matrix.h>
22
23 #include "generic.h"
24
25
26 /* --------------------------------------------------------------------
27 * USB Host
28 * -------------------------------------------------------------------- */
29
30 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
31 static u64 ohci_dmamask = 0xffffffffUL;
32 static struct at91_usbh_data usbh_data;
33
34 static struct resource usbh_resources[] = {
35 [0] = {
36 .start = AT91SAM9260_UHP_BASE,
37 .end = AT91SAM9260_UHP_BASE + SZ_1M - 1,
38 .flags = IORESOURCE_MEM,
39 },
40 [1] = {
41 .start = AT91SAM9260_ID_UHP,
42 .end = AT91SAM9260_ID_UHP,
43 .flags = IORESOURCE_IRQ,
44 },
45 };
46
47 static struct platform_device at91_usbh_device = {
48 .name = "at91_ohci",
49 .id = -1,
50 .dev = {
51 .dma_mask = &ohci_dmamask,
52 .coherent_dma_mask = 0xffffffff,
53 .platform_data = &usbh_data,
54 },
55 .resource = usbh_resources,
56 .num_resources = ARRAY_SIZE(usbh_resources),
57 };
58
59 void __init at91_add_device_usbh(struct at91_usbh_data *data)
60 {
61 if (!data)
62 return;
63
64 usbh_data = *data;
65 platform_device_register(&at91_usbh_device);
66 }
67 #else
68 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
69 #endif
70
71
72 /* --------------------------------------------------------------------
73 * USB Device (Gadget)
74 * -------------------------------------------------------------------- */
75
76 #ifdef CONFIG_USB_GADGET_AT91
77 static struct at91_udc_data udc_data;
78
79 static struct resource udc_resources[] = {
80 [0] = {
81 .start = AT91SAM9260_BASE_UDP,
82 .end = AT91SAM9260_BASE_UDP + SZ_16K - 1,
83 .flags = IORESOURCE_MEM,
84 },
85 [1] = {
86 .start = AT91SAM9260_ID_UDP,
87 .end = AT91SAM9260_ID_UDP,
88 .flags = IORESOURCE_IRQ,
89 },
90 };
91
92 static struct platform_device at91_udc_device = {
93 .name = "at91_udc",
94 .id = -1,
95 .dev = {
96 .platform_data = &udc_data,
97 },
98 .resource = udc_resources,
99 .num_resources = ARRAY_SIZE(udc_resources),
100 };
101
102 void __init at91_add_device_udc(struct at91_udc_data *data)
103 {
104 if (!data)
105 return;
106
107 if (data->vbus_pin) {
108 at91_set_gpio_input(data->vbus_pin, 0);
109 at91_set_deglitch(data->vbus_pin, 1);
110 }
111
112 /* Pullup pin is handled internally by USB device peripheral */
113
114 udc_data = *data;
115 platform_device_register(&at91_udc_device);
116 }
117 #else
118 void __init at91_add_device_udc(struct at91_udc_data *data) {}
119 #endif
120
121
122 /* --------------------------------------------------------------------
123 * Ethernet
124 * -------------------------------------------------------------------- */
125
126 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
127 static u64 eth_dmamask = 0xffffffffUL;
128 static struct at91_eth_data eth_data;
129
130 static struct resource eth_resources[] = {
131 [0] = {
132 .start = AT91SAM9260_BASE_EMAC,
133 .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
134 .flags = IORESOURCE_MEM,
135 },
136 [1] = {
137 .start = AT91SAM9260_ID_EMAC,
138 .end = AT91SAM9260_ID_EMAC,
139 .flags = IORESOURCE_IRQ,
140 },
141 };
142
143 static struct platform_device at91sam9260_eth_device = {
144 .name = "macb",
145 .id = -1,
146 .dev = {
147 .dma_mask = &eth_dmamask,
148 .coherent_dma_mask = 0xffffffff,
149 .platform_data = &eth_data,
150 },
151 .resource = eth_resources,
152 .num_resources = ARRAY_SIZE(eth_resources),
153 };
154
155 void __init at91_add_device_eth(struct at91_eth_data *data)
156 {
157 if (!data)
158 return;
159
160 if (data->phy_irq_pin) {
161 at91_set_gpio_input(data->phy_irq_pin, 0);
162 at91_set_deglitch(data->phy_irq_pin, 1);
163 }
164
165 /* Pins used for MII and RMII */
166 at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
167 at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
168 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
169 at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
170 at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
171 at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
172 at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
173 at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
174 at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
175 at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
176
177 if (!data->is_rmii) {
178 at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
179 at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
180 at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
181 at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
182 at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
183 at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
184 at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
185 at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
186 }
187
188 eth_data = *data;
189 platform_device_register(&at91sam9260_eth_device);
190 }
191 #else
192 void __init at91_add_device_eth(struct at91_eth_data *data) {}
193 #endif
194
195
196 /* --------------------------------------------------------------------
197 * MMC / SD
198 * -------------------------------------------------------------------- */
199
200 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
201 static u64 mmc_dmamask = 0xffffffffUL;
202 static struct at91_mmc_data mmc_data;
203
204 static struct resource mmc_resources[] = {
205 [0] = {
206 .start = AT91SAM9260_BASE_MCI,
207 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
208 .flags = IORESOURCE_MEM,
209 },
210 [1] = {
211 .start = AT91SAM9260_ID_MCI,
212 .end = AT91SAM9260_ID_MCI,
213 .flags = IORESOURCE_IRQ,
214 },
215 };
216
217 static struct platform_device at91sam9260_mmc_device = {
218 .name = "at91_mci",
219 .id = -1,
220 .dev = {
221 .dma_mask = &mmc_dmamask,
222 .coherent_dma_mask = 0xffffffff,
223 .platform_data = &mmc_data,
224 },
225 .resource = mmc_resources,
226 .num_resources = ARRAY_SIZE(mmc_resources),
227 };
228
229 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
230 {
231 if (!data)
232 return;
233
234 /* input/irq */
235 if (data->det_pin) {
236 at91_set_gpio_input(data->det_pin, 1);
237 at91_set_deglitch(data->det_pin, 1);
238 }
239 if (data->wp_pin)
240 at91_set_gpio_input(data->wp_pin, 1);
241 if (data->vcc_pin)
242 at91_set_gpio_output(data->vcc_pin, 0);
243
244 /* CLK */
245 at91_set_A_periph(AT91_PIN_PA8, 0);
246
247 if (data->slot_b) {
248 /* CMD */
249 at91_set_B_periph(AT91_PIN_PA1, 1);
250
251 /* DAT0, maybe DAT1..DAT3 */
252 at91_set_B_periph(AT91_PIN_PA0, 1);
253 if (data->wire4) {
254 at91_set_B_periph(AT91_PIN_PA5, 1);
255 at91_set_B_periph(AT91_PIN_PA4, 1);
256 at91_set_B_periph(AT91_PIN_PA3, 1);
257 }
258 } else {
259 /* CMD */
260 at91_set_A_periph(AT91_PIN_PA7, 1);
261
262 /* DAT0, maybe DAT1..DAT3 */
263 at91_set_A_periph(AT91_PIN_PA6, 1);
264 if (data->wire4) {
265 at91_set_A_periph(AT91_PIN_PA9, 1);
266 at91_set_A_periph(AT91_PIN_PA10, 1);
267 at91_set_A_periph(AT91_PIN_PA11, 1);
268 }
269 }
270
271 mmc_data = *data;
272 platform_device_register(&at91sam9260_mmc_device);
273 }
274 #else
275 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
276 #endif
277
278
279 /* --------------------------------------------------------------------
280 * NAND / SmartMedia
281 * -------------------------------------------------------------------- */
282
283 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
284 static struct at91_nand_data nand_data;
285
286 #define NAND_BASE AT91_CHIPSELECT_3
287
288 static struct resource nand_resources[] = {
289 {
290 .start = NAND_BASE,
291 .end = NAND_BASE + SZ_8M - 1,
292 .flags = IORESOURCE_MEM,
293 }
294 };
295
296 static struct platform_device at91sam9260_nand_device = {
297 .name = "at91_nand",
298 .id = -1,
299 .dev = {
300 .platform_data = &nand_data,
301 },
302 .resource = nand_resources,
303 .num_resources = ARRAY_SIZE(nand_resources),
304 };
305
306 void __init at91_add_device_nand(struct at91_nand_data *data)
307 {
308 unsigned long csa, mode;
309
310 if (!data)
311 return;
312
313 csa = at91_sys_read(AT91_MATRIX_EBICSA);
314 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
315
316 /* set the bus interface characteristics */
317 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
318 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
319
320 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
321 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
322
323 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
324
325 if (data->bus_width_16)
326 mode = AT91_SMC_DBW_16;
327 else
328 mode = AT91_SMC_DBW_8;
329 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
330
331 /* enable pin */
332 if (data->enable_pin)
333 at91_set_gpio_output(data->enable_pin, 1);
334
335 /* ready/busy pin */
336 if (data->rdy_pin)
337 at91_set_gpio_input(data->rdy_pin, 1);
338
339 /* card detect pin */
340 if (data->det_pin)
341 at91_set_gpio_input(data->det_pin, 1);
342
343 nand_data = *data;
344 platform_device_register(&at91sam9260_nand_device);
345 }
346 #else
347 void __init at91_add_device_nand(struct at91_nand_data *data) {}
348 #endif
349
350
351 /* --------------------------------------------------------------------
352 * TWI (i2c)
353 * -------------------------------------------------------------------- */
354
355 #if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
356
357 static struct resource twi_resources[] = {
358 [0] = {
359 .start = AT91SAM9260_BASE_TWI,
360 .end = AT91SAM9260_BASE_TWI + SZ_16K - 1,
361 .flags = IORESOURCE_MEM,
362 },
363 [1] = {
364 .start = AT91SAM9260_ID_TWI,
365 .end = AT91SAM9260_ID_TWI,
366 .flags = IORESOURCE_IRQ,
367 },
368 };
369
370 static struct platform_device at91sam9260_twi_device = {
371 .name = "at91_i2c",
372 .id = -1,
373 .resource = twi_resources,
374 .num_resources = ARRAY_SIZE(twi_resources),
375 };
376
377 void __init at91_add_device_i2c(void)
378 {
379 /* pins used for TWI interface */
380 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
381 at91_set_multi_drive(AT91_PIN_PA23, 1);
382
383 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
384 at91_set_multi_drive(AT91_PIN_PA24, 1);
385
386 platform_device_register(&at91sam9260_twi_device);
387 }
388 #else
389 void __init at91_add_device_i2c(void) {}
390 #endif
391
392
393 /* --------------------------------------------------------------------
394 * SPI
395 * -------------------------------------------------------------------- */
396
397 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
398 static u64 spi_dmamask = 0xffffffffUL;
399
400 static struct resource spi0_resources[] = {
401 [0] = {
402 .start = AT91SAM9260_BASE_SPI0,
403 .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
404 .flags = IORESOURCE_MEM,
405 },
406 [1] = {
407 .start = AT91SAM9260_ID_SPI0,
408 .end = AT91SAM9260_ID_SPI0,
409 .flags = IORESOURCE_IRQ,
410 },
411 };
412
413 static struct platform_device at91sam9260_spi0_device = {
414 .name = "atmel_spi",
415 .id = 0,
416 .dev = {
417 .dma_mask = &spi_dmamask,
418 .coherent_dma_mask = 0xffffffff,
419 },
420 .resource = spi0_resources,
421 .num_resources = ARRAY_SIZE(spi0_resources),
422 };
423
424 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
425
426 static struct resource spi1_resources[] = {
427 [0] = {
428 .start = AT91SAM9260_BASE_SPI1,
429 .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
430 .flags = IORESOURCE_MEM,
431 },
432 [1] = {
433 .start = AT91SAM9260_ID_SPI1,
434 .end = AT91SAM9260_ID_SPI1,
435 .flags = IORESOURCE_IRQ,
436 },
437 };
438
439 static struct platform_device at91sam9260_spi1_device = {
440 .name = "atmel_spi",
441 .id = 1,
442 .dev = {
443 .dma_mask = &spi_dmamask,
444 .coherent_dma_mask = 0xffffffff,
445 },
446 .resource = spi1_resources,
447 .num_resources = ARRAY_SIZE(spi1_resources),
448 };
449
450 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
451
452 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
453 {
454 int i;
455 unsigned long cs_pin;
456 short enable_spi0 = 0;
457 short enable_spi1 = 0;
458
459 /* Choose SPI chip-selects */
460 for (i = 0; i < nr_devices; i++) {
461 if (devices[i].controller_data)
462 cs_pin = (unsigned long) devices[i].controller_data;
463 else if (devices[i].bus_num == 0)
464 cs_pin = spi0_standard_cs[devices[i].chip_select];
465 else
466 cs_pin = spi1_standard_cs[devices[i].chip_select];
467
468 if (devices[i].bus_num == 0)
469 enable_spi0 = 1;
470 else
471 enable_spi1 = 1;
472
473 /* enable chip-select pin */
474 at91_set_gpio_output(cs_pin, 1);
475
476 /* pass chip-select pin to driver */
477 devices[i].controller_data = (void *) cs_pin;
478 }
479
480 spi_register_board_info(devices, nr_devices);
481
482 /* Configure SPI bus(es) */
483 if (enable_spi0) {
484 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
485 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
486 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
487
488 at91_clock_associate("spi0_clk", &at91sam9260_spi0_device.dev, "spi_clk");
489 platform_device_register(&at91sam9260_spi0_device);
490 }
491 if (enable_spi1) {
492 at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
493 at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
494 at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
495
496 at91_clock_associate("spi1_clk", &at91sam9260_spi1_device.dev, "spi_clk");
497 platform_device_register(&at91sam9260_spi1_device);
498 }
499 }
500 #else
501 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
502 #endif
503
504
505 /* --------------------------------------------------------------------
506 * LEDs
507 * -------------------------------------------------------------------- */
508
509 #if defined(CONFIG_LEDS)
510 u8 at91_leds_cpu;
511 u8 at91_leds_timer;
512
513 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
514 {
515 /* Enable GPIO to access the LEDs */
516 at91_set_gpio_output(cpu_led, 1);
517 at91_set_gpio_output(timer_led, 1);
518
519 at91_leds_cpu = cpu_led;
520 at91_leds_timer = timer_led;
521 }
522 #else
523 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
524 #endif
525
526
527 /* --------------------------------------------------------------------
528 * UART
529 * -------------------------------------------------------------------- */
530 #if defined(CONFIG_SERIAL_ATMEL)
531 static struct resource dbgu_resources[] = {
532 [0] = {
533 .start = AT91_VA_BASE_SYS + AT91_DBGU,
534 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
535 .flags = IORESOURCE_MEM,
536 },
537 [1] = {
538 .start = AT91_ID_SYS,
539 .end = AT91_ID_SYS,
540 .flags = IORESOURCE_IRQ,
541 },
542 };
543
544 static struct atmel_uart_data dbgu_data = {
545 .use_dma_tx = 0,
546 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
547 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
548 };
549
550 static struct platform_device at91sam9260_dbgu_device = {
551 .name = "atmel_usart",
552 .id = 0,
553 .dev = {
554 .platform_data = &dbgu_data,
555 .coherent_dma_mask = 0xffffffff,
556 },
557 .resource = dbgu_resources,
558 .num_resources = ARRAY_SIZE(dbgu_resources),
559 };
560
561 static inline void configure_dbgu_pins(void)
562 {
563 at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
564 at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
565 }
566
567 static struct resource uart0_resources[] = {
568 [0] = {
569 .start = AT91SAM9260_BASE_US0,
570 .end = AT91SAM9260_BASE_US0 + SZ_16K - 1,
571 .flags = IORESOURCE_MEM,
572 },
573 [1] = {
574 .start = AT91SAM9260_ID_US0,
575 .end = AT91SAM9260_ID_US0,
576 .flags = IORESOURCE_IRQ,
577 },
578 };
579
580 static struct atmel_uart_data uart0_data = {
581 .use_dma_tx = 1,
582 .use_dma_rx = 1,
583 };
584
585 static struct platform_device at91sam9260_uart0_device = {
586 .name = "atmel_usart",
587 .id = 1,
588 .dev = {
589 .platform_data = &uart0_data,
590 .coherent_dma_mask = 0xffffffff,
591 },
592 .resource = uart0_resources,
593 .num_resources = ARRAY_SIZE(uart0_resources),
594 };
595
596 static inline void configure_usart0_pins(void)
597 {
598 at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
599 at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
600 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */
601 at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */
602 at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */
603 at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */
604 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */
605 at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */
606 }
607
608 static struct resource uart1_resources[] = {
609 [0] = {
610 .start = AT91SAM9260_BASE_US1,
611 .end = AT91SAM9260_BASE_US1 + SZ_16K - 1,
612 .flags = IORESOURCE_MEM,
613 },
614 [1] = {
615 .start = AT91SAM9260_ID_US1,
616 .end = AT91SAM9260_ID_US1,
617 .flags = IORESOURCE_IRQ,
618 },
619 };
620
621 static struct atmel_uart_data uart1_data = {
622 .use_dma_tx = 1,
623 .use_dma_rx = 1,
624 };
625
626 static struct platform_device at91sam9260_uart1_device = {
627 .name = "atmel_usart",
628 .id = 2,
629 .dev = {
630 .platform_data = &uart1_data,
631 .coherent_dma_mask = 0xffffffff,
632 },
633 .resource = uart1_resources,
634 .num_resources = ARRAY_SIZE(uart1_resources),
635 };
636
637 static inline void configure_usart1_pins(void)
638 {
639 at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
640 at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
641 at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */
642 at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */
643 }
644
645 static struct resource uart2_resources[] = {
646 [0] = {
647 .start = AT91SAM9260_BASE_US2,
648 .end = AT91SAM9260_BASE_US2 + SZ_16K - 1,
649 .flags = IORESOURCE_MEM,
650 },
651 [1] = {
652 .start = AT91SAM9260_ID_US2,
653 .end = AT91SAM9260_ID_US2,
654 .flags = IORESOURCE_IRQ,
655 },
656 };
657
658 static struct atmel_uart_data uart2_data = {
659 .use_dma_tx = 1,
660 .use_dma_rx = 1,
661 };
662
663 static struct platform_device at91sam9260_uart2_device = {
664 .name = "atmel_usart",
665 .id = 3,
666 .dev = {
667 .platform_data = &uart2_data,
668 .coherent_dma_mask = 0xffffffff,
669 },
670 .resource = uart2_resources,
671 .num_resources = ARRAY_SIZE(uart2_resources),
672 };
673
674 static inline void configure_usart2_pins(void)
675 {
676 at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
677 at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
678 }
679
680 static struct resource uart3_resources[] = {
681 [0] = {
682 .start = AT91SAM9260_BASE_US3,
683 .end = AT91SAM9260_BASE_US3 + SZ_16K - 1,
684 .flags = IORESOURCE_MEM,
685 },
686 [1] = {
687 .start = AT91SAM9260_ID_US3,
688 .end = AT91SAM9260_ID_US3,
689 .flags = IORESOURCE_IRQ,
690 },
691 };
692
693 static struct atmel_uart_data uart3_data = {
694 .use_dma_tx = 1,
695 .use_dma_rx = 1,
696 };
697
698 static struct platform_device at91sam9260_uart3_device = {
699 .name = "atmel_usart",
700 .id = 4,
701 .dev = {
702 .platform_data = &uart3_data,
703 .coherent_dma_mask = 0xffffffff,
704 },
705 .resource = uart3_resources,
706 .num_resources = ARRAY_SIZE(uart3_resources),
707 };
708
709 static inline void configure_usart3_pins(void)
710 {
711 at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */
712 at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */
713 }
714
715 static struct resource uart4_resources[] = {
716 [0] = {
717 .start = AT91SAM9260_BASE_US4,
718 .end = AT91SAM9260_BASE_US4 + SZ_16K - 1,
719 .flags = IORESOURCE_MEM,
720 },
721 [1] = {
722 .start = AT91SAM9260_ID_US4,
723 .end = AT91SAM9260_ID_US4,
724 .flags = IORESOURCE_IRQ,
725 },
726 };
727
728 static struct atmel_uart_data uart4_data = {
729 .use_dma_tx = 1,
730 .use_dma_rx = 1,
731 };
732
733 static struct platform_device at91sam9260_uart4_device = {
734 .name = "atmel_usart",
735 .id = 5,
736 .dev = {
737 .platform_data = &uart4_data,
738 .coherent_dma_mask = 0xffffffff,
739 },
740 .resource = uart4_resources,
741 .num_resources = ARRAY_SIZE(uart4_resources),
742 };
743
744 static inline void configure_usart4_pins(void)
745 {
746 at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */
747 at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */
748 }
749
750 static struct resource uart5_resources[] = {
751 [0] = {
752 .start = AT91SAM9260_BASE_US5,
753 .end = AT91SAM9260_BASE_US5 + SZ_16K - 1,
754 .flags = IORESOURCE_MEM,
755 },
756 [1] = {
757 .start = AT91SAM9260_ID_US5,
758 .end = AT91SAM9260_ID_US5,
759 .flags = IORESOURCE_IRQ,
760 },
761 };
762
763 static struct atmel_uart_data uart5_data = {
764 .use_dma_tx = 1,
765 .use_dma_rx = 1,
766 };
767
768 static struct platform_device at91sam9260_uart5_device = {
769 .name = "atmel_usart",
770 .id = 6,
771 .dev = {
772 .platform_data = &uart5_data,
773 .coherent_dma_mask = 0xffffffff,
774 },
775 .resource = uart5_resources,
776 .num_resources = ARRAY_SIZE(uart5_resources),
777 };
778
779 static inline void configure_usart5_pins(void)
780 {
781 at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */
782 at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
783 }
784
785 struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
786 struct platform_device *atmel_default_console_device; /* the serial console device */
787
788 void __init at91_init_serial(struct at91_uart_config *config)
789 {
790 int i;
791
792 /* Fill in list of supported UARTs */
793 for (i = 0; i < config->nr_tty; i++) {
794 switch (config->tty_map[i]) {
795 case 0:
796 configure_usart0_pins();
797 at91_uarts[i] = &at91sam9260_uart0_device;
798 at91_clock_associate("usart0_clk", &at91sam9260_uart0_device.dev, "usart");
799 break;
800 case 1:
801 configure_usart1_pins();
802 at91_uarts[i] = &at91sam9260_uart1_device;
803 at91_clock_associate("usart1_clk", &at91sam9260_uart1_device.dev, "usart");
804 break;
805 case 2:
806 configure_usart2_pins();
807 at91_uarts[i] = &at91sam9260_uart2_device;
808 at91_clock_associate("usart2_clk", &at91sam9260_uart2_device.dev, "usart");
809 break;
810 case 3:
811 configure_usart3_pins();
812 at91_uarts[i] = &at91sam9260_uart3_device;
813 at91_clock_associate("usart3_clk", &at91sam9260_uart3_device.dev, "usart");
814 break;
815 case 4:
816 configure_usart4_pins();
817 at91_uarts[i] = &at91sam9260_uart4_device;
818 at91_clock_associate("usart4_clk", &at91sam9260_uart4_device.dev, "usart");
819 break;
820 case 5:
821 configure_usart5_pins();
822 at91_uarts[i] = &at91sam9260_uart5_device;
823 at91_clock_associate("usart5_clk", &at91sam9260_uart5_device.dev, "usart");
824 break;
825 case 6:
826 configure_dbgu_pins();
827 at91_uarts[i] = &at91sam9260_dbgu_device;
828 at91_clock_associate("mck", &at91sam9260_dbgu_device.dev, "usart");
829 break;
830 default:
831 continue;
832 }
833 at91_uarts[i]->id = i; /* update ID number to mapped ID */
834 }
835
836 /* Set serial console device */
837 if (config->console_tty < ATMEL_MAX_UART)
838 atmel_default_console_device = at91_uarts[config->console_tty];
839 if (!atmel_default_console_device)
840 printk(KERN_INFO "AT91: No default serial console defined.\n");
841 }
842
843 void __init at91_add_device_serial(void)
844 {
845 int i;
846
847 for (i = 0; i < ATMEL_MAX_UART; i++) {
848 if (at91_uarts[i])
849 platform_device_register(at91_uarts[i]);
850 }
851 }
852 #else
853 void __init at91_init_serial(struct at91_uart_config *config) {}
854 void __init at91_add_device_serial(void) {}
855 #endif
856
857
858 /* -------------------------------------------------------------------- */
859 /*
860 * These devices are always present and don't need any board-specific
861 * setup.
862 */
863 static int __init at91_add_standard_devices(void)
864 {
865 return 0;
866 }
867
868 arch_initcall(at91_add_standard_devices);
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