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e1000: Add device IDs of blade version of the 82571 quad port
[pv_ops_mirror.git] / arch / arm / mach-at91 / at91sam9261_devices.c
blob3576595b4941b7ecefcf75b0ab1ec0128f1bc261
1 /*
2 * arch/arm/mach-at91/at91sam9261_devices.c
3 *
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
15
16 #include <linux/platform_device.h>
17
18 #include <video/atmel_lcdc.h>
19
20 #include <asm/arch/board.h>
21 #include <asm/arch/gpio.h>
22 #include <asm/arch/at91sam9261.h>
23 #include <asm/arch/at91sam9261_matrix.h>
24 #include <asm/arch/at91sam926x_mc.h>
25
26 #include "generic.h"
27
28
29 /* --------------------------------------------------------------------
30 * USB Host
31 * -------------------------------------------------------------------- */
32
33 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
34 static u64 ohci_dmamask = 0xffffffffUL;
35 static struct at91_usbh_data usbh_data;
36
37 static struct resource usbh_resources[] = {
38 [0] = {
39 .start = AT91SAM9261_UHP_BASE,
40 .end = AT91SAM9261_UHP_BASE + SZ_1M - 1,
41 .flags = IORESOURCE_MEM,
42 },
43 [1] = {
44 .start = AT91SAM9261_ID_UHP,
45 .end = AT91SAM9261_ID_UHP,
46 .flags = IORESOURCE_IRQ,
47 },
48 };
49
50 static struct platform_device at91sam9261_usbh_device = {
51 .name = "at91_ohci",
52 .id = -1,
53 .dev = {
54 .dma_mask = &ohci_dmamask,
55 .coherent_dma_mask = 0xffffffff,
56 .platform_data = &usbh_data,
57 },
58 .resource = usbh_resources,
59 .num_resources = ARRAY_SIZE(usbh_resources),
60 };
61
62 void __init at91_add_device_usbh(struct at91_usbh_data *data)
63 {
64 if (!data)
65 return;
66
67 usbh_data = *data;
68 platform_device_register(&at91sam9261_usbh_device);
69 }
70 #else
71 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
72 #endif
73
74
75 /* --------------------------------------------------------------------
76 * USB Device (Gadget)
77 * -------------------------------------------------------------------- */
78
79 #ifdef CONFIG_USB_GADGET_AT91
80 static struct at91_udc_data udc_data;
81
82 static struct resource udc_resources[] = {
83 [0] = {
84 .start = AT91SAM9261_BASE_UDP,
85 .end = AT91SAM9261_BASE_UDP + SZ_16K - 1,
86 .flags = IORESOURCE_MEM,
87 },
88 [1] = {
89 .start = AT91SAM9261_ID_UDP,
90 .end = AT91SAM9261_ID_UDP,
91 .flags = IORESOURCE_IRQ,
92 },
93 };
94
95 static struct platform_device at91sam9261_udc_device = {
96 .name = "at91_udc",
97 .id = -1,
98 .dev = {
99 .platform_data = &udc_data,
100 },
101 .resource = udc_resources,
102 .num_resources = ARRAY_SIZE(udc_resources),
103 };
104
105 void __init at91_add_device_udc(struct at91_udc_data *data)
106 {
107 unsigned long x;
108
109 if (!data)
110 return;
111
112 if (data->vbus_pin) {
113 at91_set_gpio_input(data->vbus_pin, 0);
114 at91_set_deglitch(data->vbus_pin, 1);
115 }
116
117 /* Pullup pin is handled internally */
118 x = at91_sys_read(AT91_MATRIX_USBPUCR);
119 at91_sys_write(AT91_MATRIX_USBPUCR, x | AT91_MATRIX_USBPUCR_PUON);
120
121 udc_data = *data;
122 platform_device_register(&at91sam9261_udc_device);
123 }
124 #else
125 void __init at91_add_device_udc(struct at91_udc_data *data) {}
126 #endif
127
128 /* --------------------------------------------------------------------
129 * MMC / SD
130 * -------------------------------------------------------------------- */
131
132 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
133 static u64 mmc_dmamask = 0xffffffffUL;
134 static struct at91_mmc_data mmc_data;
135
136 static struct resource mmc_resources[] = {
137 [0] = {
138 .start = AT91SAM9261_BASE_MCI,
139 .end = AT91SAM9261_BASE_MCI + SZ_16K - 1,
140 .flags = IORESOURCE_MEM,
141 },
142 [1] = {
143 .start = AT91SAM9261_ID_MCI,
144 .end = AT91SAM9261_ID_MCI,
145 .flags = IORESOURCE_IRQ,
146 },
147 };
148
149 static struct platform_device at91sam9261_mmc_device = {
150 .name = "at91_mci",
151 .id = -1,
152 .dev = {
153 .dma_mask = &mmc_dmamask,
154 .coherent_dma_mask = 0xffffffff,
155 .platform_data = &mmc_data,
156 },
157 .resource = mmc_resources,
158 .num_resources = ARRAY_SIZE(mmc_resources),
159 };
160
161 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
162 {
163 if (!data)
164 return;
165
166 /* input/irq */
167 if (data->det_pin) {
168 at91_set_gpio_input(data->det_pin, 1);
169 at91_set_deglitch(data->det_pin, 1);
170 }
171 if (data->wp_pin)
172 at91_set_gpio_input(data->wp_pin, 1);
173 if (data->vcc_pin)
174 at91_set_gpio_output(data->vcc_pin, 0);
175
176 /* CLK */
177 at91_set_B_periph(AT91_PIN_PA2, 0);
178
179 /* CMD */
180 at91_set_B_periph(AT91_PIN_PA1, 1);
181
182 /* DAT0, maybe DAT1..DAT3 */
183 at91_set_B_periph(AT91_PIN_PA0, 1);
184 if (data->wire4) {
185 at91_set_B_periph(AT91_PIN_PA4, 1);
186 at91_set_B_periph(AT91_PIN_PA5, 1);
187 at91_set_B_periph(AT91_PIN_PA6, 1);
188 }
189
190 mmc_data = *data;
191 platform_device_register(&at91sam9261_mmc_device);
192 }
193 #else
194 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
195 #endif
196
197
198 /* --------------------------------------------------------------------
199 * NAND / SmartMedia
200 * -------------------------------------------------------------------- */
201
202 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
203 static struct at91_nand_data nand_data;
204
205 #define NAND_BASE AT91_CHIPSELECT_3
206
207 static struct resource nand_resources[] = {
208 {
209 .start = NAND_BASE,
210 .end = NAND_BASE + SZ_256M - 1,
211 .flags = IORESOURCE_MEM,
212 }
213 };
214
215 static struct platform_device at91_nand_device = {
216 .name = "at91_nand",
217 .id = -1,
218 .dev = {
219 .platform_data = &nand_data,
220 },
221 .resource = nand_resources,
222 .num_resources = ARRAY_SIZE(nand_resources),
223 };
224
225 void __init at91_add_device_nand(struct at91_nand_data *data)
226 {
227 unsigned long csa, mode;
228
229 if (!data)
230 return;
231
232 csa = at91_sys_read(AT91_MATRIX_EBICSA);
233 at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC);
234
235 /* set the bus interface characteristics */
236 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
237 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
238
239 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
240 | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
241
242 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
243
244 if (data->bus_width_16)
245 mode = AT91_SMC_DBW_16;
246 else
247 mode = AT91_SMC_DBW_8;
248 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
249
250 /* enable pin */
251 if (data->enable_pin)
252 at91_set_gpio_output(data->enable_pin, 1);
253
254 /* ready/busy pin */
255 if (data->rdy_pin)
256 at91_set_gpio_input(data->rdy_pin, 1);
257
258 /* card detect pin */
259 if (data->det_pin)
260 at91_set_gpio_input(data->det_pin, 1);
261
262 at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
263 at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
264
265 nand_data = *data;
266 platform_device_register(&at91_nand_device);
267 }
268
269 #else
270 void __init at91_add_device_nand(struct at91_nand_data *data) {}
271 #endif
272
273
274 /* --------------------------------------------------------------------
275 * TWI (i2c)
276 * -------------------------------------------------------------------- */
277
278 #if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
279
280 static struct resource twi_resources[] = {
281 [0] = {
282 .start = AT91SAM9261_BASE_TWI,
283 .end = AT91SAM9261_BASE_TWI + SZ_16K - 1,
284 .flags = IORESOURCE_MEM,
285 },
286 [1] = {
287 .start = AT91SAM9261_ID_TWI,
288 .end = AT91SAM9261_ID_TWI,
289 .flags = IORESOURCE_IRQ,
290 },
291 };
292
293 static struct platform_device at91sam9261_twi_device = {
294 .name = "at91_i2c",
295 .id = -1,
296 .resource = twi_resources,
297 .num_resources = ARRAY_SIZE(twi_resources),
298 };
299
300 void __init at91_add_device_i2c(void)
301 {
302 /* pins used for TWI interface */
303 at91_set_A_periph(AT91_PIN_PA7, 0); /* TWD */
304 at91_set_multi_drive(AT91_PIN_PA7, 1);
305
306 at91_set_A_periph(AT91_PIN_PA8, 0); /* TWCK */
307 at91_set_multi_drive(AT91_PIN_PA8, 1);
308
309 platform_device_register(&at91sam9261_twi_device);
310 }
311 #else
312 void __init at91_add_device_i2c(void) {}
313 #endif
314
315
316 /* --------------------------------------------------------------------
317 * SPI
318 * -------------------------------------------------------------------- */
319
320 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
321 static u64 spi_dmamask = 0xffffffffUL;
322
323 static struct resource spi0_resources[] = {
324 [0] = {
325 .start = AT91SAM9261_BASE_SPI0,
326 .end = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
327 .flags = IORESOURCE_MEM,
328 },
329 [1] = {
330 .start = AT91SAM9261_ID_SPI0,
331 .end = AT91SAM9261_ID_SPI0,
332 .flags = IORESOURCE_IRQ,
333 },
334 };
335
336 static struct platform_device at91sam9261_spi0_device = {
337 .name = "atmel_spi",
338 .id = 0,
339 .dev = {
340 .dma_mask = &spi_dmamask,
341 .coherent_dma_mask = 0xffffffff,
342 },
343 .resource = spi0_resources,
344 .num_resources = ARRAY_SIZE(spi0_resources),
345 };
346
347 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
348
349 static struct resource spi1_resources[] = {
350 [0] = {
351 .start = AT91SAM9261_BASE_SPI1,
352 .end = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
353 .flags = IORESOURCE_MEM,
354 },
355 [1] = {
356 .start = AT91SAM9261_ID_SPI1,
357 .end = AT91SAM9261_ID_SPI1,
358 .flags = IORESOURCE_IRQ,
359 },
360 };
361
362 static struct platform_device at91sam9261_spi1_device = {
363 .name = "atmel_spi",
364 .id = 1,
365 .dev = {
366 .dma_mask = &spi_dmamask,
367 .coherent_dma_mask = 0xffffffff,
368 },
369 .resource = spi1_resources,
370 .num_resources = ARRAY_SIZE(spi1_resources),
371 };
372
373 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
374
375 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
376 {
377 int i;
378 unsigned long cs_pin;
379 short enable_spi0 = 0;
380 short enable_spi1 = 0;
381
382 /* Choose SPI chip-selects */
383 for (i = 0; i < nr_devices; i++) {
384 if (devices[i].controller_data)
385 cs_pin = (unsigned long) devices[i].controller_data;
386 else if (devices[i].bus_num == 0)
387 cs_pin = spi0_standard_cs[devices[i].chip_select];
388 else
389 cs_pin = spi1_standard_cs[devices[i].chip_select];
390
391 if (devices[i].bus_num == 0)
392 enable_spi0 = 1;
393 else
394 enable_spi1 = 1;
395
396 /* enable chip-select pin */
397 at91_set_gpio_output(cs_pin, 1);
398
399 /* pass chip-select pin to driver */
400 devices[i].controller_data = (void *) cs_pin;
401 }
402
403 spi_register_board_info(devices, nr_devices);
404
405 /* Configure SPI bus(es) */
406 if (enable_spi0) {
407 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
408 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
409 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
410
411 at91_clock_associate("spi0_clk", &at91sam9261_spi0_device.dev, "spi_clk");
412 platform_device_register(&at91sam9261_spi0_device);
413 }
414 if (enable_spi1) {
415 at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
416 at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
417 at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
418
419 at91_clock_associate("spi1_clk", &at91sam9261_spi1_device.dev, "spi_clk");
420 platform_device_register(&at91sam9261_spi1_device);
421 }
422 }
423 #else
424 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
425 #endif
426
427
428 /* --------------------------------------------------------------------
429 * LCD Controller
430 * -------------------------------------------------------------------- */
431
432 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
433 static u64 lcdc_dmamask = 0xffffffffUL;
434 static struct atmel_lcdfb_info lcdc_data;
435
436 static struct resource lcdc_resources[] = {
437 [0] = {
438 .start = AT91SAM9261_LCDC_BASE,
439 .end = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
440 .flags = IORESOURCE_MEM,
441 },
442 [1] = {
443 .start = AT91SAM9261_ID_LCDC,
444 .end = AT91SAM9261_ID_LCDC,
445 .flags = IORESOURCE_IRQ,
446 },
447 #if defined(CONFIG_FB_INTSRAM)
448 [2] = {
449 .start = AT91SAM9261_SRAM_BASE,
450 .end = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
451 .flags = IORESOURCE_MEM,
452 },
453 #endif
454 };
455
456 static struct platform_device at91_lcdc_device = {
457 .name = "atmel_lcdfb",
458 .id = 0,
459 .dev = {
460 .dma_mask = &lcdc_dmamask,
461 .coherent_dma_mask = 0xffffffff,
462 .platform_data = &lcdc_data,
463 },
464 .resource = lcdc_resources,
465 .num_resources = ARRAY_SIZE(lcdc_resources),
466 };
467
468 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
469 {
470 if (!data) {
471 return;
472 }
473
474 at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
475 at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
476 at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
477 at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
478 at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
479 at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
480 at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
481 at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
482 at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
483 at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
484 at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
485 at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
486 at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
487 at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
488 at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
489 at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
490 at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
491 at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
492 at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
493 at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
494 at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
495 at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
496
497 lcdc_data = *data;
498 platform_device_register(&at91_lcdc_device);
499 }
500 #else
501 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
502 #endif
503
504
505 /* --------------------------------------------------------------------
506 * LEDs
507 * -------------------------------------------------------------------- */
508
509 #if defined(CONFIG_LEDS)
510 u8 at91_leds_cpu;
511 u8 at91_leds_timer;
512
513 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
514 {
515 /* Enable GPIO to access the LEDs */
516 at91_set_gpio_output(cpu_led, 1);
517 at91_set_gpio_output(timer_led, 1);
518
519 at91_leds_cpu = cpu_led;
520 at91_leds_timer = timer_led;
521 }
522 #else
523 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
524 #endif
525
526
527 /* --------------------------------------------------------------------
528 * UART
529 * -------------------------------------------------------------------- */
530
531 #if defined(CONFIG_SERIAL_ATMEL)
532 static struct resource dbgu_resources[] = {
533 [0] = {
534 .start = AT91_VA_BASE_SYS + AT91_DBGU,
535 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
536 .flags = IORESOURCE_MEM,
537 },
538 [1] = {
539 .start = AT91_ID_SYS,
540 .end = AT91_ID_SYS,
541 .flags = IORESOURCE_IRQ,
542 },
543 };
544
545 static struct atmel_uart_data dbgu_data = {
546 .use_dma_tx = 0,
547 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
548 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
549 };
550
551 static struct platform_device at91sam9261_dbgu_device = {
552 .name = "atmel_usart",
553 .id = 0,
554 .dev = {
555 .platform_data = &dbgu_data,
556 .coherent_dma_mask = 0xffffffff,
557 },
558 .resource = dbgu_resources,
559 .num_resources = ARRAY_SIZE(dbgu_resources),
560 };
561
562 static inline void configure_dbgu_pins(void)
563 {
564 at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
565 at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
566 }
567
568 static struct resource uart0_resources[] = {
569 [0] = {
570 .start = AT91SAM9261_BASE_US0,
571 .end = AT91SAM9261_BASE_US0 + SZ_16K - 1,
572 .flags = IORESOURCE_MEM,
573 },
574 [1] = {
575 .start = AT91SAM9261_ID_US0,
576 .end = AT91SAM9261_ID_US0,
577 .flags = IORESOURCE_IRQ,
578 },
579 };
580
581 static struct atmel_uart_data uart0_data = {
582 .use_dma_tx = 1,
583 .use_dma_rx = 1,
584 };
585
586 static struct platform_device at91sam9261_uart0_device = {
587 .name = "atmel_usart",
588 .id = 1,
589 .dev = {
590 .platform_data = &uart0_data,
591 .coherent_dma_mask = 0xffffffff,
592 },
593 .resource = uart0_resources,
594 .num_resources = ARRAY_SIZE(uart0_resources),
595 };
596
597 static inline void configure_usart0_pins(void)
598 {
599 at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
600 at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
601 at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */
602 at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */
603 }
604
605 static struct resource uart1_resources[] = {
606 [0] = {
607 .start = AT91SAM9261_BASE_US1,
608 .end = AT91SAM9261_BASE_US1 + SZ_16K - 1,
609 .flags = IORESOURCE_MEM,
610 },
611 [1] = {
612 .start = AT91SAM9261_ID_US1,
613 .end = AT91SAM9261_ID_US1,
614 .flags = IORESOURCE_IRQ,
615 },
616 };
617
618 static struct atmel_uart_data uart1_data = {
619 .use_dma_tx = 1,
620 .use_dma_rx = 1,
621 };
622
623 static struct platform_device at91sam9261_uart1_device = {
624 .name = "atmel_usart",
625 .id = 2,
626 .dev = {
627 .platform_data = &uart1_data,
628 .coherent_dma_mask = 0xffffffff,
629 },
630 .resource = uart1_resources,
631 .num_resources = ARRAY_SIZE(uart1_resources),
632 };
633
634 static inline void configure_usart1_pins(void)
635 {
636 at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
637 at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
638 }
639
640 static struct resource uart2_resources[] = {
641 [0] = {
642 .start = AT91SAM9261_BASE_US2,
643 .end = AT91SAM9261_BASE_US2 + SZ_16K - 1,
644 .flags = IORESOURCE_MEM,
645 },
646 [1] = {
647 .start = AT91SAM9261_ID_US2,
648 .end = AT91SAM9261_ID_US2,
649 .flags = IORESOURCE_IRQ,
650 },
651 };
652
653 static struct atmel_uart_data uart2_data = {
654 .use_dma_tx = 1,
655 .use_dma_rx = 1,
656 };
657
658 static struct platform_device at91sam9261_uart2_device = {
659 .name = "atmel_usart",
660 .id = 3,
661 .dev = {
662 .platform_data = &uart2_data,
663 .coherent_dma_mask = 0xffffffff,
664 },
665 .resource = uart2_resources,
666 .num_resources = ARRAY_SIZE(uart2_resources),
667 };
668
669 static inline void configure_usart2_pins(void)
670 {
671 at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
672 at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
673 }
674
675 struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
676 struct platform_device *atmel_default_console_device; /* the serial console device */
677
678 void __init at91_init_serial(struct at91_uart_config *config)
679 {
680 int i;
681
682 /* Fill in list of supported UARTs */
683 for (i = 0; i < config->nr_tty; i++) {
684 switch (config->tty_map[i]) {
685 case 0:
686 configure_usart0_pins();
687 at91_uarts[i] = &at91sam9261_uart0_device;
688 at91_clock_associate("usart0_clk", &at91sam9261_uart0_device.dev, "usart");
689 break;
690 case 1:
691 configure_usart1_pins();
692 at91_uarts[i] = &at91sam9261_uart1_device;
693 at91_clock_associate("usart1_clk", &at91sam9261_uart1_device.dev, "usart");
694 break;
695 case 2:
696 configure_usart2_pins();
697 at91_uarts[i] = &at91sam9261_uart2_device;
698 at91_clock_associate("usart2_clk", &at91sam9261_uart2_device.dev, "usart");
699 break;
700 case 3:
701 configure_dbgu_pins();
702 at91_uarts[i] = &at91sam9261_dbgu_device;
703 at91_clock_associate("mck", &at91sam9261_dbgu_device.dev, "usart");
704 break;
705 default:
706 continue;
707 }
708 at91_uarts[i]->id = i; /* update ID number to mapped ID */
709 }
710
711 /* Set serial console device */
712 if (config->console_tty < ATMEL_MAX_UART)
713 atmel_default_console_device = at91_uarts[config->console_tty];
714 if (!atmel_default_console_device)
715 printk(KERN_INFO "AT91: No default serial console defined.\n");
716 }
717
718 void __init at91_add_device_serial(void)
719 {
720 int i;
721
722 for (i = 0; i < ATMEL_MAX_UART; i++) {
723 if (at91_uarts[i])
724 platform_device_register(at91_uarts[i]);
725 }
726 }
727 #else
728 void __init at91_init_serial(struct at91_uart_config *config) {}
729 void __init at91_add_device_serial(void) {}
730 #endif
731
732
733 /* -------------------------------------------------------------------- */
734
735 /*
736 * These devices are always present and don't need any board-specific
737 * setup.
738 */
739 static int __init at91_add_standard_devices(void)
740 {
741 return 0;
742 }
743
744 arch_initcall(at91_add_standard_devices);
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