?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
e1000: Add device IDs of blade version of the 82571 quad port
[pv_ops_mirror.git] / arch / arm / mach-at91 / at91sam9263_devices.c
blobf924bd5017de19ef1efac43b5dc125fdcc65ee13
1 /*
2 * arch/arm/mach-at91/at91sam9263_devices.c
3 *
4 * Copyright (C) 2007 Atmel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
14
15 #include <linux/platform_device.h>
16
17 #include <video/atmel_lcdc.h>
18
19 #include <asm/arch/board.h>
20 #include <asm/arch/gpio.h>
21 #include <asm/arch/at91sam9263.h>
22 #include <asm/arch/at91sam926x_mc.h>
23 #include <asm/arch/at91sam9263_matrix.h>
24
25 #include "generic.h"
26
27
28 /* --------------------------------------------------------------------
29 * USB Host
30 * -------------------------------------------------------------------- */
31
32 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
33 static u64 ohci_dmamask = 0xffffffffUL;
34 static struct at91_usbh_data usbh_data;
35
36 static struct resource usbh_resources[] = {
37 [0] = {
38 .start = AT91SAM9263_UHP_BASE,
39 .end = AT91SAM9263_UHP_BASE + SZ_1M - 1,
40 .flags = IORESOURCE_MEM,
41 },
42 [1] = {
43 .start = AT91SAM9263_ID_UHP,
44 .end = AT91SAM9263_ID_UHP,
45 .flags = IORESOURCE_IRQ,
46 },
47 };
48
49 static struct platform_device at91_usbh_device = {
50 .name = "at91_ohci",
51 .id = -1,
52 .dev = {
53 .dma_mask = &ohci_dmamask,
54 .coherent_dma_mask = 0xffffffff,
55 .platform_data = &usbh_data,
56 },
57 .resource = usbh_resources,
58 .num_resources = ARRAY_SIZE(usbh_resources),
59 };
60
61 void __init at91_add_device_usbh(struct at91_usbh_data *data)
62 {
63 int i;
64
65 if (!data)
66 return;
67
68 /* Enable VBus control for UHP ports */
69 for (i = 0; i < data->ports; i++) {
70 if (data->vbus_pin[i])
71 at91_set_gpio_output(data->vbus_pin[i], 0);
72 }
73
74 usbh_data = *data;
75 platform_device_register(&at91_usbh_device);
76 }
77 #else
78 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
79 #endif
80
81
82 /* --------------------------------------------------------------------
83 * USB Device (Gadget)
84 * -------------------------------------------------------------------- */
85
86 #ifdef CONFIG_USB_GADGET_AT91
87 static struct at91_udc_data udc_data;
88
89 static struct resource udc_resources[] = {
90 [0] = {
91 .start = AT91SAM9263_BASE_UDP,
92 .end = AT91SAM9263_BASE_UDP + SZ_16K - 1,
93 .flags = IORESOURCE_MEM,
94 },
95 [1] = {
96 .start = AT91SAM9263_ID_UDP,
97 .end = AT91SAM9263_ID_UDP,
98 .flags = IORESOURCE_IRQ,
99 },
100 };
101
102 static struct platform_device at91_udc_device = {
103 .name = "at91_udc",
104 .id = -1,
105 .dev = {
106 .platform_data = &udc_data,
107 },
108 .resource = udc_resources,
109 .num_resources = ARRAY_SIZE(udc_resources),
110 };
111
112 void __init at91_add_device_udc(struct at91_udc_data *data)
113 {
114 if (!data)
115 return;
116
117 if (data->vbus_pin) {
118 at91_set_gpio_input(data->vbus_pin, 0);
119 at91_set_deglitch(data->vbus_pin, 1);
120 }
121
122 /* Pullup pin is handled internally by USB device peripheral */
123
124 udc_data = *data;
125 platform_device_register(&at91_udc_device);
126 }
127 #else
128 void __init at91_add_device_udc(struct at91_udc_data *data) {}
129 #endif
130
131
132 /* --------------------------------------------------------------------
133 * Ethernet
134 * -------------------------------------------------------------------- */
135
136 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
137 static u64 eth_dmamask = 0xffffffffUL;
138 static struct at91_eth_data eth_data;
139
140 static struct resource eth_resources[] = {
141 [0] = {
142 .start = AT91SAM9263_BASE_EMAC,
143 .end = AT91SAM9263_BASE_EMAC + SZ_16K - 1,
144 .flags = IORESOURCE_MEM,
145 },
146 [1] = {
147 .start = AT91SAM9263_ID_EMAC,
148 .end = AT91SAM9263_ID_EMAC,
149 .flags = IORESOURCE_IRQ,
150 },
151 };
152
153 static struct platform_device at91sam9263_eth_device = {
154 .name = "macb",
155 .id = -1,
156 .dev = {
157 .dma_mask = &eth_dmamask,
158 .coherent_dma_mask = 0xffffffff,
159 .platform_data = &eth_data,
160 },
161 .resource = eth_resources,
162 .num_resources = ARRAY_SIZE(eth_resources),
163 };
164
165 void __init at91_add_device_eth(struct at91_eth_data *data)
166 {
167 if (!data)
168 return;
169
170 if (data->phy_irq_pin) {
171 at91_set_gpio_input(data->phy_irq_pin, 0);
172 at91_set_deglitch(data->phy_irq_pin, 1);
173 }
174
175 /* Pins used for MII and RMII */
176 at91_set_A_periph(AT91_PIN_PE21, 0); /* ETXCK_EREFCK */
177 at91_set_B_periph(AT91_PIN_PC25, 0); /* ERXDV */
178 at91_set_A_periph(AT91_PIN_PE25, 0); /* ERX0 */
179 at91_set_A_periph(AT91_PIN_PE26, 0); /* ERX1 */
180 at91_set_A_periph(AT91_PIN_PE27, 0); /* ERXER */
181 at91_set_A_periph(AT91_PIN_PE28, 0); /* ETXEN */
182 at91_set_A_periph(AT91_PIN_PE23, 0); /* ETX0 */
183 at91_set_A_periph(AT91_PIN_PE24, 0); /* ETX1 */
184 at91_set_A_periph(AT91_PIN_PE30, 0); /* EMDIO */
185 at91_set_A_periph(AT91_PIN_PE29, 0); /* EMDC */
186
187 if (!data->is_rmii) {
188 at91_set_A_periph(AT91_PIN_PE22, 0); /* ECRS */
189 at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */
190 at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */
191 at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */
192 at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */
193 at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */
194 at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */
195 at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */
196 }
197
198 eth_data = *data;
199 platform_device_register(&at91sam9263_eth_device);
200 }
201 #else
202 void __init at91_add_device_eth(struct at91_eth_data *data) {}
203 #endif
204
205
206 /* --------------------------------------------------------------------
207 * MMC / SD
208 * -------------------------------------------------------------------- */
209
210 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
211 static u64 mmc_dmamask = 0xffffffffUL;
212 static struct at91_mmc_data mmc0_data, mmc1_data;
213
214 static struct resource mmc0_resources[] = {
215 [0] = {
216 .start = AT91SAM9263_BASE_MCI0,
217 .end = AT91SAM9263_BASE_MCI0 + SZ_16K - 1,
218 .flags = IORESOURCE_MEM,
219 },
220 [1] = {
221 .start = AT91SAM9263_ID_MCI0,
222 .end = AT91SAM9263_ID_MCI0,
223 .flags = IORESOURCE_IRQ,
224 },
225 };
226
227 static struct platform_device at91sam9263_mmc0_device = {
228 .name = "at91_mci",
229 .id = 0,
230 .dev = {
231 .dma_mask = &mmc_dmamask,
232 .coherent_dma_mask = 0xffffffff,
233 .platform_data = &mmc0_data,
234 },
235 .resource = mmc0_resources,
236 .num_resources = ARRAY_SIZE(mmc0_resources),
237 };
238
239 static struct resource mmc1_resources[] = {
240 [0] = {
241 .start = AT91SAM9263_BASE_MCI1,
242 .end = AT91SAM9263_BASE_MCI1 + SZ_16K - 1,
243 .flags = IORESOURCE_MEM,
244 },
245 [1] = {
246 .start = AT91SAM9263_ID_MCI1,
247 .end = AT91SAM9263_ID_MCI1,
248 .flags = IORESOURCE_IRQ,
249 },
250 };
251
252 static struct platform_device at91sam9263_mmc1_device = {
253 .name = "at91_mci",
254 .id = 1,
255 .dev = {
256 .dma_mask = &mmc_dmamask,
257 .coherent_dma_mask = 0xffffffff,
258 .platform_data = &mmc1_data,
259 },
260 .resource = mmc1_resources,
261 .num_resources = ARRAY_SIZE(mmc1_resources),
262 };
263
264 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
265 {
266 if (!data)
267 return;
268
269 /* input/irq */
270 if (data->det_pin) {
271 at91_set_gpio_input(data->det_pin, 1);
272 at91_set_deglitch(data->det_pin, 1);
273 }
274 if (data->wp_pin)
275 at91_set_gpio_input(data->wp_pin, 1);
276 if (data->vcc_pin)
277 at91_set_gpio_output(data->vcc_pin, 0);
278
279 if (mmc_id == 0) { /* MCI0 */
280 /* CLK */
281 at91_set_A_periph(AT91_PIN_PA12, 0);
282
283 if (data->slot_b) {
284 /* CMD */
285 at91_set_A_periph(AT91_PIN_PA16, 1);
286
287 /* DAT0, maybe DAT1..DAT3 */
288 at91_set_A_periph(AT91_PIN_PA17, 1);
289 if (data->wire4) {
290 at91_set_A_periph(AT91_PIN_PA18, 1);
291 at91_set_A_periph(AT91_PIN_PA19, 1);
292 at91_set_A_periph(AT91_PIN_PA20, 1);
293 }
294 } else {
295 /* CMD */
296 at91_set_A_periph(AT91_PIN_PA1, 1);
297
298 /* DAT0, maybe DAT1..DAT3 */
299 at91_set_A_periph(AT91_PIN_PA0, 1);
300 if (data->wire4) {
301 at91_set_A_periph(AT91_PIN_PA3, 1);
302 at91_set_A_periph(AT91_PIN_PA4, 1);
303 at91_set_A_periph(AT91_PIN_PA5, 1);
304 }
305 }
306
307 mmc0_data = *data;
308 at91_clock_associate("mci0_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
309 platform_device_register(&at91sam9263_mmc0_device);
310 } else { /* MCI1 */
311 /* CLK */
312 at91_set_A_periph(AT91_PIN_PA6, 0);
313
314 if (data->slot_b) {
315 /* CMD */
316 at91_set_A_periph(AT91_PIN_PA21, 1);
317
318 /* DAT0, maybe DAT1..DAT3 */
319 at91_set_A_periph(AT91_PIN_PA22, 1);
320 if (data->wire4) {
321 at91_set_A_periph(AT91_PIN_PA23, 1);
322 at91_set_A_periph(AT91_PIN_PA24, 1);
323 at91_set_A_periph(AT91_PIN_PA25, 1);
324 }
325 } else {
326 /* CMD */
327 at91_set_A_periph(AT91_PIN_PA7, 1);
328
329 /* DAT0, maybe DAT1..DAT3 */
330 at91_set_A_periph(AT91_PIN_PA8, 1);
331 if (data->wire4) {
332 at91_set_A_periph(AT91_PIN_PA9, 1);
333 at91_set_A_periph(AT91_PIN_PA10, 1);
334 at91_set_A_periph(AT91_PIN_PA11, 1);
335 }
336 }
337
338 mmc1_data = *data;
339 at91_clock_associate("mci1_clk", &at91sam9263_mmc1_device.dev, "mci_clk");
340 platform_device_register(&at91sam9263_mmc1_device);
341 }
342 }
343 #else
344 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
345 #endif
346
347
348 /* --------------------------------------------------------------------
349 * NAND / SmartMedia
350 * -------------------------------------------------------------------- */
351
352 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
353 static struct at91_nand_data nand_data;
354
355 #define NAND_BASE AT91_CHIPSELECT_3
356
357 static struct resource nand_resources[] = {
358 {
359 .start = NAND_BASE,
360 .end = NAND_BASE + SZ_256M - 1,
361 .flags = IORESOURCE_MEM,
362 }
363 };
364
365 static struct platform_device at91sam9263_nand_device = {
366 .name = "at91_nand",
367 .id = -1,
368 .dev = {
369 .platform_data = &nand_data,
370 },
371 .resource = nand_resources,
372 .num_resources = ARRAY_SIZE(nand_resources),
373 };
374
375 void __init at91_add_device_nand(struct at91_nand_data *data)
376 {
377 unsigned long csa, mode;
378
379 if (!data)
380 return;
381
382 csa = at91_sys_read(AT91_MATRIX_EBI0CSA);
383 at91_sys_write(AT91_MATRIX_EBI0CSA, csa | AT91_MATRIX_EBI0_CS3A_SMC);
384
385 /* set the bus interface characteristics */
386 at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
387 | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
388
389 at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
390 | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
391
392 at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
393
394 if (data->bus_width_16)
395 mode = AT91_SMC_DBW_16;
396 else
397 mode = AT91_SMC_DBW_8;
398 at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
399
400 /* enable pin */
401 if (data->enable_pin)
402 at91_set_gpio_output(data->enable_pin, 1);
403
404 /* ready/busy pin */
405 if (data->rdy_pin)
406 at91_set_gpio_input(data->rdy_pin, 1);
407
408 /* card detect pin */
409 if (data->det_pin)
410 at91_set_gpio_input(data->det_pin, 1);
411
412 nand_data = *data;
413 platform_device_register(&at91sam9263_nand_device);
414 }
415 #else
416 void __init at91_add_device_nand(struct at91_nand_data *data) {}
417 #endif
418
419
420 /* --------------------------------------------------------------------
421 * TWI (i2c)
422 * -------------------------------------------------------------------- */
423
424 #if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
425
426 static struct resource twi_resources[] = {
427 [0] = {
428 .start = AT91SAM9263_BASE_TWI,
429 .end = AT91SAM9263_BASE_TWI + SZ_16K - 1,
430 .flags = IORESOURCE_MEM,
431 },
432 [1] = {
433 .start = AT91SAM9263_ID_TWI,
434 .end = AT91SAM9263_ID_TWI,
435 .flags = IORESOURCE_IRQ,
436 },
437 };
438
439 static struct platform_device at91sam9263_twi_device = {
440 .name = "at91_i2c",
441 .id = -1,
442 .resource = twi_resources,
443 .num_resources = ARRAY_SIZE(twi_resources),
444 };
445
446 void __init at91_add_device_i2c(void)
447 {
448 /* pins used for TWI interface */
449 at91_set_A_periph(AT91_PIN_PB4, 0); /* TWD */
450 at91_set_multi_drive(AT91_PIN_PB4, 1);
451
452 at91_set_A_periph(AT91_PIN_PB5, 0); /* TWCK */
453 at91_set_multi_drive(AT91_PIN_PB5, 1);
454
455 platform_device_register(&at91sam9263_twi_device);
456 }
457 #else
458 void __init at91_add_device_i2c(void) {}
459 #endif
460
461
462 /* --------------------------------------------------------------------
463 * SPI
464 * -------------------------------------------------------------------- */
465
466 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
467 static u64 spi_dmamask = 0xffffffffUL;
468
469 static struct resource spi0_resources[] = {
470 [0] = {
471 .start = AT91SAM9263_BASE_SPI0,
472 .end = AT91SAM9263_BASE_SPI0 + SZ_16K - 1,
473 .flags = IORESOURCE_MEM,
474 },
475 [1] = {
476 .start = AT91SAM9263_ID_SPI0,
477 .end = AT91SAM9263_ID_SPI0,
478 .flags = IORESOURCE_IRQ,
479 },
480 };
481
482 static struct platform_device at91sam9263_spi0_device = {
483 .name = "atmel_spi",
484 .id = 0,
485 .dev = {
486 .dma_mask = &spi_dmamask,
487 .coherent_dma_mask = 0xffffffff,
488 },
489 .resource = spi0_resources,
490 .num_resources = ARRAY_SIZE(spi0_resources),
491 };
492
493 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA5, AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PB11 };
494
495 static struct resource spi1_resources[] = {
496 [0] = {
497 .start = AT91SAM9263_BASE_SPI1,
498 .end = AT91SAM9263_BASE_SPI1 + SZ_16K - 1,
499 .flags = IORESOURCE_MEM,
500 },
501 [1] = {
502 .start = AT91SAM9263_ID_SPI1,
503 .end = AT91SAM9263_ID_SPI1,
504 .flags = IORESOURCE_IRQ,
505 },
506 };
507
508 static struct platform_device at91sam9263_spi1_device = {
509 .name = "atmel_spi",
510 .id = 1,
511 .dev = {
512 .dma_mask = &spi_dmamask,
513 .coherent_dma_mask = 0xffffffff,
514 },
515 .resource = spi1_resources,
516 .num_resources = ARRAY_SIZE(spi1_resources),
517 };
518
519 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB15, AT91_PIN_PB16, AT91_PIN_PB17, AT91_PIN_PB18 };
520
521 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
522 {
523 int i;
524 unsigned long cs_pin;
525 short enable_spi0 = 0;
526 short enable_spi1 = 0;
527
528 /* Choose SPI chip-selects */
529 for (i = 0; i < nr_devices; i++) {
530 if (devices[i].controller_data)
531 cs_pin = (unsigned long) devices[i].controller_data;
532 else if (devices[i].bus_num == 0)
533 cs_pin = spi0_standard_cs[devices[i].chip_select];
534 else
535 cs_pin = spi1_standard_cs[devices[i].chip_select];
536
537 if (devices[i].bus_num == 0)
538 enable_spi0 = 1;
539 else
540 enable_spi1 = 1;
541
542 /* enable chip-select pin */
543 at91_set_gpio_output(cs_pin, 1);
544
545 /* pass chip-select pin to driver */
546 devices[i].controller_data = (void *) cs_pin;
547 }
548
549 spi_register_board_info(devices, nr_devices);
550
551 /* Configure SPI bus(es) */
552 if (enable_spi0) {
553 at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
554 at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
555 at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
556
557 at91_clock_associate("spi0_clk", &at91sam9263_spi0_device.dev, "spi_clk");
558 platform_device_register(&at91sam9263_spi0_device);
559 }
560 if (enable_spi1) {
561 at91_set_A_periph(AT91_PIN_PB12, 0); /* SPI1_MISO */
562 at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */
563 at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */
564
565 at91_clock_associate("spi1_clk", &at91sam9263_spi1_device.dev, "spi_clk");
566 platform_device_register(&at91sam9263_spi1_device);
567 }
568 }
569 #else
570 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
571 #endif
572
573
574 /* --------------------------------------------------------------------
575 * AC97
576 * -------------------------------------------------------------------- */
577
578 #if defined(CONFIG_SND_AT91_AC97) || defined(CONFIG_SND_AT91_AC97_MODULE)
579 static u64 ac97_dmamask = 0xffffffffUL;
580 static struct atmel_ac97_data ac97_data;
581
582 static struct resource ac97_resources[] = {
583 [0] = {
584 .start = AT91SAM9263_BASE_AC97C,
585 .end = AT91SAM9263_BASE_AC97C + SZ_16K - 1,
586 .flags = IORESOURCE_MEM,
587 },
588 [1] = {
589 .start = AT91SAM9263_ID_AC97C,
590 .end = AT91SAM9263_ID_AC97C,
591 .flags = IORESOURCE_IRQ,
592 },
593 };
594
595 static struct platform_device at91sam9263_ac97_device = {
596 .name = "ac97c",
597 .id = 1,
598 .dev = {
599 .dma_mask = &ac97_dmamask,
600 .coherent_dma_mask = 0xffffffff,
601 .platform_data = &ac97_data,
602 },
603 .resource = ac97_resources,
604 .num_resources = ARRAY_SIZE(ac97_resources),
605 };
606
607 void __init at91_add_device_ac97(struct atmel_ac97_data *data)
608 {
609 if (!data)
610 return;
611
612 at91_set_A_periph(AT91_PIN_PB0, 0); /* AC97FS */
613 at91_set_A_periph(AT91_PIN_PB1, 0); /* AC97CK */
614 at91_set_A_periph(AT91_PIN_PB2, 0); /* AC97TX */
615 at91_set_A_periph(AT91_PIN_PB3, 0); /* AC97RX */
616
617 /* reset */
618 if (data->reset_pin)
619 at91_set_gpio_output(data->reset_pin, 0);
620
621 ac97_data = *ek_data;
622 platform_device_register(&at91sam9263_ac97_device);
623 }
624 #else
625 void __init at91_add_device_ac97(struct atmel_ac97_data *data) {}
626 #endif
627
628
629 /* --------------------------------------------------------------------
630 * LCD Controller
631 * -------------------------------------------------------------------- */
632
633 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
634 static u64 lcdc_dmamask = 0xffffffffUL;
635 static struct atmel_lcdfb_info lcdc_data;
636
637 static struct resource lcdc_resources[] = {
638 [0] = {
639 .start = AT91SAM9263_LCDC_BASE,
640 .end = AT91SAM9263_LCDC_BASE + SZ_4K - 1,
641 .flags = IORESOURCE_MEM,
642 },
643 [1] = {
644 .start = AT91SAM9263_ID_LCDC,
645 .end = AT91SAM9263_ID_LCDC,
646 .flags = IORESOURCE_IRQ,
647 },
648 };
649
650 static struct platform_device at91_lcdc_device = {
651 .name = "atmel_lcdfb",
652 .id = 0,
653 .dev = {
654 .dma_mask = &lcdc_dmamask,
655 .coherent_dma_mask = 0xffffffff,
656 .platform_data = &lcdc_data,
657 },
658 .resource = lcdc_resources,
659 .num_resources = ARRAY_SIZE(lcdc_resources),
660 };
661
662 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
663 {
664 if (!data)
665 return;
666
667 at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */
668 at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */
669 at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */
670 at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */
671 at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */
672 at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */
673 at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */
674 at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */
675 at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */
676 at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */
677 at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */
678 at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */
679 at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */
680 at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */
681 at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */
682 at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */
683 at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */
684 at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */
685 at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */
686 at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */
687 at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */
688 at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */
689
690 lcdc_data = *data;
691 platform_device_register(&at91_lcdc_device);
692 }
693 #else
694 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
695 #endif
696
697
698 /* --------------------------------------------------------------------
699 * LEDs
700 * -------------------------------------------------------------------- */
701
702 #if defined(CONFIG_LEDS)
703 u8 at91_leds_cpu;
704 u8 at91_leds_timer;
705
706 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
707 {
708 /* Enable GPIO to access the LEDs */
709 at91_set_gpio_output(cpu_led, 1);
710 at91_set_gpio_output(timer_led, 1);
711
712 at91_leds_cpu = cpu_led;
713 at91_leds_timer = timer_led;
714 }
715 #else
716 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
717 #endif
718
719
720 /* --------------------------------------------------------------------
721 * UART
722 * -------------------------------------------------------------------- */
723
724 #if defined(CONFIG_SERIAL_ATMEL)
725
726 static struct resource dbgu_resources[] = {
727 [0] = {
728 .start = AT91_VA_BASE_SYS + AT91_DBGU,
729 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
730 .flags = IORESOURCE_MEM,
731 },
732 [1] = {
733 .start = AT91_ID_SYS,
734 .end = AT91_ID_SYS,
735 .flags = IORESOURCE_IRQ,
736 },
737 };
738
739 static struct atmel_uart_data dbgu_data = {
740 .use_dma_tx = 0,
741 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
742 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
743 };
744
745 static struct platform_device at91sam9263_dbgu_device = {
746 .name = "atmel_usart",
747 .id = 0,
748 .dev = {
749 .platform_data = &dbgu_data,
750 .coherent_dma_mask = 0xffffffff,
751 },
752 .resource = dbgu_resources,
753 .num_resources = ARRAY_SIZE(dbgu_resources),
754 };
755
756 static inline void configure_dbgu_pins(void)
757 {
758 at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */
759 at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */
760 }
761
762 static struct resource uart0_resources[] = {
763 [0] = {
764 .start = AT91SAM9263_BASE_US0,
765 .end = AT91SAM9263_BASE_US0 + SZ_16K - 1,
766 .flags = IORESOURCE_MEM,
767 },
768 [1] = {
769 .start = AT91SAM9263_ID_US0,
770 .end = AT91SAM9263_ID_US0,
771 .flags = IORESOURCE_IRQ,
772 },
773 };
774
775 static struct atmel_uart_data uart0_data = {
776 .use_dma_tx = 1,
777 .use_dma_rx = 1,
778 };
779
780 static struct platform_device at91sam9263_uart0_device = {
781 .name = "atmel_usart",
782 .id = 1,
783 .dev = {
784 .platform_data = &uart0_data,
785 .coherent_dma_mask = 0xffffffff,
786 },
787 .resource = uart0_resources,
788 .num_resources = ARRAY_SIZE(uart0_resources),
789 };
790
791 static inline void configure_usart0_pins(void)
792 {
793 at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */
794 at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */
795 at91_set_A_periph(AT91_PIN_PA28, 0); /* RTS0 */
796 at91_set_A_periph(AT91_PIN_PA29, 0); /* CTS0 */
797 }
798
799 static struct resource uart1_resources[] = {
800 [0] = {
801 .start = AT91SAM9263_BASE_US1,
802 .end = AT91SAM9263_BASE_US1 + SZ_16K - 1,
803 .flags = IORESOURCE_MEM,
804 },
805 [1] = {
806 .start = AT91SAM9263_ID_US1,
807 .end = AT91SAM9263_ID_US1,
808 .flags = IORESOURCE_IRQ,
809 },
810 };
811
812 static struct atmel_uart_data uart1_data = {
813 .use_dma_tx = 1,
814 .use_dma_rx = 1,
815 };
816
817 static struct platform_device at91sam9263_uart1_device = {
818 .name = "atmel_usart",
819 .id = 2,
820 .dev = {
821 .platform_data = &uart1_data,
822 .coherent_dma_mask = 0xffffffff,
823 },
824 .resource = uart1_resources,
825 .num_resources = ARRAY_SIZE(uart1_resources),
826 };
827
828 static inline void configure_usart1_pins(void)
829 {
830 at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */
831 at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */
832 at91_set_B_periph(AT91_PIN_PD7, 0); /* RTS1 */
833 at91_set_B_periph(AT91_PIN_PD8, 0); /* CTS1 */
834 }
835
836 static struct resource uart2_resources[] = {
837 [0] = {
838 .start = AT91SAM9263_BASE_US2,
839 .end = AT91SAM9263_BASE_US2 + SZ_16K - 1,
840 .flags = IORESOURCE_MEM,
841 },
842 [1] = {
843 .start = AT91SAM9263_ID_US2,
844 .end = AT91SAM9263_ID_US2,
845 .flags = IORESOURCE_IRQ,
846 },
847 };
848
849 static struct atmel_uart_data uart2_data = {
850 .use_dma_tx = 1,
851 .use_dma_rx = 1,
852 };
853
854 static struct platform_device at91sam9263_uart2_device = {
855 .name = "atmel_usart",
856 .id = 3,
857 .dev = {
858 .platform_data = &uart2_data,
859 .coherent_dma_mask = 0xffffffff,
860 },
861 .resource = uart2_resources,
862 .num_resources = ARRAY_SIZE(uart2_resources),
863 };
864
865 static inline void configure_usart2_pins(void)
866 {
867 at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */
868 at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */
869 at91_set_B_periph(AT91_PIN_PD5, 0); /* RTS2 */
870 at91_set_B_periph(AT91_PIN_PD6, 0); /* CTS2 */
871 }
872
873 struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
874 struct platform_device *atmel_default_console_device; /* the serial console device */
875
876 void __init at91_init_serial(struct at91_uart_config *config)
877 {
878 int i;
879
880 /* Fill in list of supported UARTs */
881 for (i = 0; i < config->nr_tty; i++) {
882 switch (config->tty_map[i]) {
883 case 0:
884 configure_usart0_pins();
885 at91_uarts[i] = &at91sam9263_uart0_device;
886 at91_clock_associate("usart0_clk", &at91sam9263_uart0_device.dev, "usart");
887 break;
888 case 1:
889 configure_usart1_pins();
890 at91_uarts[i] = &at91sam9263_uart1_device;
891 at91_clock_associate("usart1_clk", &at91sam9263_uart1_device.dev, "usart");
892 break;
893 case 2:
894 configure_usart2_pins();
895 at91_uarts[i] = &at91sam9263_uart2_device;
896 at91_clock_associate("usart2_clk", &at91sam9263_uart2_device.dev, "usart");
897 break;
898 case 3:
899 configure_dbgu_pins();
900 at91_uarts[i] = &at91sam9263_dbgu_device;
901 at91_clock_associate("mck", &at91sam9263_dbgu_device.dev, "usart");
902 break;
903 default:
904 continue;
905 }
906 at91_uarts[i]->id = i; /* update ID number to mapped ID */
907 }
908
909 /* Set serial console device */
910 if (config->console_tty < ATMEL_MAX_UART)
911 atmel_default_console_device = at91_uarts[config->console_tty];
912 if (!atmel_default_console_device)
913 printk(KERN_INFO "AT91: No default serial console defined.\n");
914 }
915
916 void __init at91_add_device_serial(void)
917 {
918 int i;
919
920 for (i = 0; i < ATMEL_MAX_UART; i++) {
921 if (at91_uarts[i])
922 platform_device_register(at91_uarts[i]);
923 }
924 }
925 #else
926 void __init at91_init_serial(struct at91_uart_config *config) {}
927 void __init at91_add_device_serial(void) {}
928 #endif
929
930
931 /* -------------------------------------------------------------------- */
932 /*
933 * These devices are always present and don't need any board-specific
934 * setup.
935 */
936 static int __init at91_add_standard_devices(void)
937 {
938 return 0;
939 }
940
941 arch_initcall(at91_add_standard_devices);
Mirror for ia64_pv_ops.git