arch/arm/mach-at91/at91sam9rl_devices.c

   1 /*
   2  *  Copyright (C) 2007 Atmel Corporation
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file COPYING in the main directory of this archive for
   6  * more details.
   7  */
   8
   9 #include <asm/mach/arch.h>
  10 #include <asm/mach/map.h>
  11
  12 #include <linux/platform_device.h>
  13 #include <linux/fb.h>
  14
  15 #include <video/atmel_lcdc.h>
  16
  17 #include <asm/arch/board.h>
  18 #include <asm/arch/gpio.h>
  19 #include <asm/arch/at91sam9rl.h>
  20 #include <asm/arch/at91sam9rl_matrix.h>
  21 #include <asm/arch/at91sam926x_mc.h>
  22
  23 #include "generic.h"
  24
  25
  26 /* --------------------------------------------------------------------
  27  *  MMC / SD
  28  * -------------------------------------------------------------------- */
  29
  30 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
  31 static u64 mmc_dmamask = 0xffffffffUL;
  32 static struct at91_mmc_data mmc_data;
  33
  34 static struct resource mmc_resources[] = {
  35         [0] = {
  36                 .start  = AT91SAM9RL_BASE_MCI,
  37                 .end    = AT91SAM9RL_BASE_MCI + SZ_16K - 1,
  38                 .flags  = IORESOURCE_MEM,
  39         },
  40         [1] = {
  41                 .start  = AT91SAM9RL_ID_MCI,
  42                 .end    = AT91SAM9RL_ID_MCI,
  43                 .flags  = IORESOURCE_IRQ,
  44         },
  45 };
  46
  47 static struct platform_device at91sam9rl_mmc_device = {
  48         .name           = "at91_mci",
  49         .id             = -1,
  50         .dev            = {
  51                                 .dma_mask               = &mmc_dmamask,
  52                                 .coherent_dma_mask      = 0xffffffff,
  53                                 .platform_data          = &mmc_data,
  54         },
  55         .resource       = mmc_resources,
  56         .num_resources  = ARRAY_SIZE(mmc_resources),
  57 };
  58
  59 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
  60 {
  61         if (!data)
  62                 return;
  63
  64         /* input/irq */
  65         if (data->det_pin) {
  66                 at91_set_gpio_input(data->det_pin, 1);
  67                 at91_set_deglitch(data->det_pin, 1);
  68         }
  69         if (data->wp_pin)
  70                 at91_set_gpio_input(data->wp_pin, 1);
  71         if (data->vcc_pin)
  72                 at91_set_gpio_output(data->vcc_pin, 0);
  73
  74         /* CLK */
  75         at91_set_A_periph(AT91_PIN_PA2, 0);
  76
  77         /* CMD */
  78         at91_set_A_periph(AT91_PIN_PA1, 1);
  79
  80         /* DAT0, maybe DAT1..DAT3 */
  81         at91_set_A_periph(AT91_PIN_PA0, 1);
  82         if (data->wire4) {
  83                 at91_set_A_periph(AT91_PIN_PA3, 1);
  84                 at91_set_A_periph(AT91_PIN_PA4, 1);
  85                 at91_set_A_periph(AT91_PIN_PA5, 1);
  86         }
  87
  88         mmc_data = *data;
  89         platform_device_register(&at91sam9rl_mmc_device);
  90 }
  91 #else
  92 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
  93 #endif
  94
  95
  96 /* --------------------------------------------------------------------
  97  *  NAND / SmartMedia
  98  * -------------------------------------------------------------------- */
  99
 100 #if defined(CONFIG_MTD_NAND_AT91) || defined(CONFIG_MTD_NAND_AT91_MODULE)
 101 static struct at91_nand_data nand_data;
 102
 103 #define NAND_BASE       AT91_CHIPSELECT_3
 104
 105 static struct resource nand_resources[] = {
 106         {
 107                 .start  = NAND_BASE,
 108                 .end    = NAND_BASE + SZ_256M - 1,
 109                 .flags  = IORESOURCE_MEM,
 110         }
 111 };
 112
 113 static struct platform_device at91_nand_device = {
 114         .name           = "at91_nand",
 115         .id             = -1,
 116         .dev            = {
 117                                 .platform_data  = &nand_data,
 118         },
 119         .resource       = nand_resources,
 120         .num_resources  = ARRAY_SIZE(nand_resources),
 121 };
 122
 123 void __init at91_add_device_nand(struct at91_nand_data *data)
 124 {
 125         unsigned long csa;
 126
 127         if (!data)
 128                 return;
 129
 130         csa = at91_sys_read(AT91_MATRIX_EBICSA);
 131         at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 132
 133         /* set the bus interface characteristics */
 134         at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
 135                         | AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
 136
 137         at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
 138                         | AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
 139
 140         at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
 141
 142         at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_DBW_8 | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
 143
 144         /* enable pin */
 145         if (data->enable_pin)
 146                 at91_set_gpio_output(data->enable_pin, 1);
 147
 148         /* ready/busy pin */
 149         if (data->rdy_pin)
 150                 at91_set_gpio_input(data->rdy_pin, 1);
 151
 152         /* card detect pin */
 153         if (data->det_pin)
 154                 at91_set_gpio_input(data->det_pin, 1);
 155
 156         at91_set_A_periph(AT91_PIN_PB4, 0);             /* NANDOE */
 157         at91_set_A_periph(AT91_PIN_PB5, 0);             /* NANDWE */
 158
 159         nand_data = *data;
 160         platform_device_register(&at91_nand_device);
 161 }
 162
 163 #else
 164 void __init at91_add_device_nand(struct at91_nand_data *data) {}
 165 #endif
 166
 167
 168 /* --------------------------------------------------------------------
 169  *  TWI (i2c)
 170  * -------------------------------------------------------------------- */
 171
 172 #if defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 173
 174 static struct resource twi_resources[] = {
 175         [0] = {
 176                 .start  = AT91SAM9RL_BASE_TWI0,
 177                 .end    = AT91SAM9RL_BASE_TWI0 + SZ_16K - 1,
 178                 .flags  = IORESOURCE_MEM,
 179         },
 180         [1] = {
 181                 .start  = AT91SAM9RL_ID_TWI0,
 182                 .end    = AT91SAM9RL_ID_TWI0,
 183                 .flags  = IORESOURCE_IRQ,
 184         },
 185 };
 186
 187 static struct platform_device at91sam9rl_twi_device = {
 188         .name           = "at91_i2c",
 189         .id             = -1,
 190         .resource       = twi_resources,
 191         .num_resources  = ARRAY_SIZE(twi_resources),
 192 };
 193
 194 void __init at91_add_device_i2c(void)
 195 {
 196         /* pins used for TWI interface */
 197         at91_set_A_periph(AT91_PIN_PA23, 0);            /* TWD */
 198         at91_set_multi_drive(AT91_PIN_PA23, 1);
 199
 200         at91_set_A_periph(AT91_PIN_PA24, 0);            /* TWCK */
 201         at91_set_multi_drive(AT91_PIN_PA24, 1);
 202
 203         platform_device_register(&at91sam9rl_twi_device);
 204 }
 205 #else
 206 void __init at91_add_device_i2c(void) {}
 207 #endif
 208
 209
 210 /* --------------------------------------------------------------------
 211  *  SPI
 212  * -------------------------------------------------------------------- */
 213
 214 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 215 static u64 spi_dmamask = 0xffffffffUL;
 216
 217 static struct resource spi_resources[] = {
 218         [0] = {
 219                 .start  = AT91SAM9RL_BASE_SPI,
 220                 .end    = AT91SAM9RL_BASE_SPI + SZ_16K - 1,
 221                 .flags  = IORESOURCE_MEM,
 222         },
 223         [1] = {
 224                 .start  = AT91SAM9RL_ID_SPI,
 225                 .end    = AT91SAM9RL_ID_SPI,
 226                 .flags  = IORESOURCE_IRQ,
 227         },
 228 };
 229
 230 static struct platform_device at91sam9rl_spi_device = {
 231         .name           = "atmel_spi",
 232         .id             = 0,
 233         .dev            = {
 234                                 .dma_mask               = &spi_dmamask,
 235                                 .coherent_dma_mask      = 0xffffffff,
 236         },
 237         .resource       = spi_resources,
 238         .num_resources  = ARRAY_SIZE(spi_resources),
 239 };
 240
 241 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA28, AT91_PIN_PB7, AT91_PIN_PD8, AT91_PIN_PD9 };
 242
 243
 244 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 245 {
 246         int i;
 247         unsigned long cs_pin;
 248
 249         at91_set_A_periph(AT91_PIN_PA25, 0);    /* MISO */
 250         at91_set_A_periph(AT91_PIN_PA26, 0);    /* MOSI */
 251         at91_set_A_periph(AT91_PIN_PA27, 0);    /* SPCK */
 252
 253         /* Enable SPI chip-selects */
 254         for (i = 0; i < nr_devices; i++) {
 255                 if (devices[i].controller_data)
 256                         cs_pin = (unsigned long) devices[i].controller_data;
 257                 else
 258                         cs_pin = spi_standard_cs[devices[i].chip_select];
 259
 260                 /* enable chip-select pin */
 261                 at91_set_gpio_output(cs_pin, 1);
 262
 263                 /* pass chip-select pin to driver */
 264                 devices[i].controller_data = (void *) cs_pin;
 265         }
 266
 267         spi_register_board_info(devices, nr_devices);
 268         platform_device_register(&at91sam9rl_spi_device);
 269 }
 270 #else
 271 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 272 #endif
 273
 274
 275 /* --------------------------------------------------------------------
 276  *  LCD Controller
 277  * -------------------------------------------------------------------- */
 278
 279 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
 280 static u64 lcdc_dmamask = 0xffffffffUL;
 281 static struct atmel_lcdfb_info lcdc_data;
 282
 283 static struct resource lcdc_resources[] = {
 284         [0] = {
 285                 .start  = AT91SAM9RL_LCDC_BASE,
 286                 .end    = AT91SAM9RL_LCDC_BASE + SZ_4K - 1,
 287                 .flags  = IORESOURCE_MEM,
 288         },
 289         [1] = {
 290                 .start  = AT91SAM9RL_ID_LCDC,
 291                 .end    = AT91SAM9RL_ID_LCDC,
 292                 .flags  = IORESOURCE_IRQ,
 293         },
 294 #if defined(CONFIG_FB_INTSRAM)
 295         [2] = {
 296                 .start  = AT91SAM9RL_SRAM_BASE,
 297                 .end    = AT91SAM9RL_SRAM_BASE + AT91SAM9RL_SRAM_SIZE - 1,
 298                 .flags  = IORESOURCE_MEM,
 299         },
 300 #endif
 301 };
 302
 303 static struct platform_device at91_lcdc_device = {
 304         .name           = "atmel_lcdfb",
 305         .id             = 0,
 306         .dev            = {
 307                                 .dma_mask               = &lcdc_dmamask,
 308                                 .coherent_dma_mask      = 0xffffffff,
 309                                 .platform_data          = &lcdc_data,
 310         },
 311         .resource       = lcdc_resources,
 312         .num_resources  = ARRAY_SIZE(lcdc_resources),
 313 };
 314
 315 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
 316 {
 317         if (!data) {
 318                 return;
 319         }
 320
 321         at91_set_B_periph(AT91_PIN_PC1, 0);     /* LCDPWR */
 322         at91_set_A_periph(AT91_PIN_PC5, 0);     /* LCDHSYNC */
 323         at91_set_A_periph(AT91_PIN_PC6, 0);     /* LCDDOTCK */
 324         at91_set_A_periph(AT91_PIN_PC7, 0);     /* LCDDEN */
 325         at91_set_A_periph(AT91_PIN_PC3, 0);     /* LCDCC */
 326         at91_set_B_periph(AT91_PIN_PC9, 0);     /* LCDD3 */
 327         at91_set_B_periph(AT91_PIN_PC10, 0);    /* LCDD4 */
 328         at91_set_B_periph(AT91_PIN_PC11, 0);    /* LCDD5 */
 329         at91_set_B_periph(AT91_PIN_PC12, 0);    /* LCDD6 */
 330         at91_set_B_periph(AT91_PIN_PC13, 0);    /* LCDD7 */
 331         at91_set_B_periph(AT91_PIN_PC15, 0);    /* LCDD11 */
 332         at91_set_B_periph(AT91_PIN_PC16, 0);    /* LCDD12 */
 333         at91_set_B_periph(AT91_PIN_PC17, 0);    /* LCDD13 */
 334         at91_set_B_periph(AT91_PIN_PC18, 0);    /* LCDD14 */
 335         at91_set_B_periph(AT91_PIN_PC19, 0);    /* LCDD15 */
 336         at91_set_B_periph(AT91_PIN_PC20, 0);    /* LCDD18 */
 337         at91_set_B_periph(AT91_PIN_PC21, 0);    /* LCDD19 */
 338         at91_set_B_periph(AT91_PIN_PC22, 0);    /* LCDD20 */
 339         at91_set_B_periph(AT91_PIN_PC23, 0);    /* LCDD21 */
 340         at91_set_B_periph(AT91_PIN_PC24, 0);    /* LCDD22 */
 341         at91_set_B_periph(AT91_PIN_PC25, 0);    /* LCDD23 */
 342
 343         lcdc_data = *data;
 344         platform_device_register(&at91_lcdc_device);
 345 }
 346 #else
 347 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 348 #endif
 349
 350
 351 /* --------------------------------------------------------------------
 352  *  LEDs
 353  * -------------------------------------------------------------------- */
 354
 355 #if defined(CONFIG_LEDS)
 356 u8 at91_leds_cpu;
 357 u8 at91_leds_timer;
 358
 359 void __init at91_init_leds(u8 cpu_led, u8 timer_led)
 360 {
 361         /* Enable GPIO to access the LEDs */
 362         at91_set_gpio_output(cpu_led, 1);
 363         at91_set_gpio_output(timer_led, 1);
 364
 365         at91_leds_cpu   = cpu_led;
 366         at91_leds_timer = timer_led;
 367 }
 368 #else
 369 void __init at91_init_leds(u8 cpu_led, u8 timer_led) {}
 370 #endif
 371
 372
 373 /* --------------------------------------------------------------------
 374  *  UART
 375  * -------------------------------------------------------------------- */
 376
 377 #if defined(CONFIG_SERIAL_ATMEL)
 378 static struct resource dbgu_resources[] = {
 379         [0] = {
 380                 .start  = AT91_VA_BASE_SYS + AT91_DBGU,
 381                 .end    = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
 382                 .flags  = IORESOURCE_MEM,
 383         },
 384         [1] = {
 385                 .start  = AT91_ID_SYS,
 386                 .end    = AT91_ID_SYS,
 387                 .flags  = IORESOURCE_IRQ,
 388         },
 389 };
 390
 391 static struct atmel_uart_data dbgu_data = {
 392         .use_dma_tx     = 0,
 393         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
 394         .regs           = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
 395 };
 396
 397 static struct platform_device at91sam9rl_dbgu_device = {
 398         .name           = "atmel_usart",
 399         .id             = 0,
 400         .dev            = {
 401                                 .platform_data  = &dbgu_data,
 402                                 .coherent_dma_mask = 0xffffffff,
 403         },
 404         .resource       = dbgu_resources,
 405         .num_resources  = ARRAY_SIZE(dbgu_resources),
 406 };
 407
 408 static inline void configure_dbgu_pins(void)
 409 {
 410         at91_set_A_periph(AT91_PIN_PA21, 0);            /* DRXD */
 411         at91_set_A_periph(AT91_PIN_PA22, 1);            /* DTXD */
 412 }
 413
 414 static struct resource uart0_resources[] = {
 415         [0] = {
 416                 .start  = AT91SAM9RL_BASE_US0,
 417                 .end    = AT91SAM9RL_BASE_US0 + SZ_16K - 1,
 418                 .flags  = IORESOURCE_MEM,
 419         },
 420         [1] = {
 421                 .start  = AT91SAM9RL_ID_US0,
 422                 .end    = AT91SAM9RL_ID_US0,
 423                 .flags  = IORESOURCE_IRQ,
 424         },
 425 };
 426
 427 static struct atmel_uart_data uart0_data = {
 428         .use_dma_tx     = 1,
 429         .use_dma_rx     = 1,
 430 };
 431
 432 static struct platform_device at91sam9rl_uart0_device = {
 433         .name           = "atmel_usart",
 434         .id             = 1,
 435         .dev            = {
 436                                 .platform_data  = &uart0_data,
 437                                 .coherent_dma_mask = 0xffffffff,
 438         },
 439         .resource       = uart0_resources,
 440         .num_resources  = ARRAY_SIZE(uart0_resources),
 441 };
 442
 443 static inline void configure_usart0_pins(void)
 444 {
 445         at91_set_A_periph(AT91_PIN_PA6, 1);             /* TXD0 */
 446         at91_set_A_periph(AT91_PIN_PA7, 0);             /* RXD0 */
 447         at91_set_A_periph(AT91_PIN_PA9, 0);             /* RTS0 */
 448         at91_set_A_periph(AT91_PIN_PA10, 0);            /* CTS0 */
 449 }
 450
 451 static struct resource uart1_resources[] = {
 452         [0] = {
 453                 .start  = AT91SAM9RL_BASE_US1,
 454                 .end    = AT91SAM9RL_BASE_US1 + SZ_16K - 1,
 455                 .flags  = IORESOURCE_MEM,
 456         },
 457         [1] = {
 458                 .start  = AT91SAM9RL_ID_US1,
 459                 .end    = AT91SAM9RL_ID_US1,
 460                 .flags  = IORESOURCE_IRQ,
 461         },
 462 };
 463
 464 static struct atmel_uart_data uart1_data = {
 465         .use_dma_tx     = 1,
 466         .use_dma_rx     = 1,
 467 };
 468
 469 static struct platform_device at91sam9rl_uart1_device = {
 470         .name           = "atmel_usart",
 471         .id             = 2,
 472         .dev            = {
 473                                 .platform_data  = &uart1_data,
 474                                 .coherent_dma_mask = 0xffffffff,
 475         },
 476         .resource       = uart1_resources,
 477         .num_resources  = ARRAY_SIZE(uart1_resources),
 478 };
 479
 480 static inline void configure_usart1_pins(void)
 481 {
 482         at91_set_A_periph(AT91_PIN_PA11, 1);            /* TXD1 */
 483         at91_set_A_periph(AT91_PIN_PA12, 0);            /* RXD1 */
 484 }
 485
 486 static struct resource uart2_resources[] = {
 487         [0] = {
 488                 .start  = AT91SAM9RL_BASE_US2,
 489                 .end    = AT91SAM9RL_BASE_US2 + SZ_16K - 1,
 490                 .flags  = IORESOURCE_MEM,
 491         },
 492         [1] = {
 493                 .start  = AT91SAM9RL_ID_US2,
 494                 .end    = AT91SAM9RL_ID_US2,
 495                 .flags  = IORESOURCE_IRQ,
 496         },
 497 };
 498
 499 static struct atmel_uart_data uart2_data = {
 500         .use_dma_tx     = 1,
 501         .use_dma_rx     = 1,
 502 };
 503
 504 static struct platform_device at91sam9rl_uart2_device = {
 505         .name           = "atmel_usart",
 506         .id             = 3,
 507         .dev            = {
 508                                 .platform_data  = &uart2_data,
 509                                 .coherent_dma_mask = 0xffffffff,
 510         },
 511         .resource       = uart2_resources,
 512         .num_resources  = ARRAY_SIZE(uart2_resources),
 513 };
 514
 515 static inline void configure_usart2_pins(void)
 516 {
 517         at91_set_A_periph(AT91_PIN_PA13, 1);            /* TXD2 */
 518         at91_set_A_periph(AT91_PIN_PA14, 0);            /* RXD2 */
 519 }
 520
 521 static struct resource uart3_resources[] = {
 522         [0] = {
 523                 .start  = AT91SAM9RL_BASE_US3,
 524                 .end    = AT91SAM9RL_BASE_US3 + SZ_16K - 1,
 525                 .flags  = IORESOURCE_MEM,
 526         },
 527         [1] = {
 528                 .start  = AT91SAM9RL_ID_US3,
 529                 .end    = AT91SAM9RL_ID_US3,
 530                 .flags  = IORESOURCE_IRQ,
 531         },
 532 };
 533
 534 static struct atmel_uart_data uart3_data = {
 535         .use_dma_tx     = 1,
 536         .use_dma_rx     = 1,
 537 };
 538
 539 static struct platform_device at91sam9rl_uart3_device = {
 540         .name           = "atmel_usart",
 541         .id             = 4,
 542         .dev            = {
 543                                 .platform_data  = &uart3_data,
 544                                 .coherent_dma_mask = 0xffffffff,
 545         },
 546         .resource       = uart3_resources,
 547         .num_resources  = ARRAY_SIZE(uart3_resources),
 548 };
 549
 550 static inline void configure_usart3_pins(void)
 551 {
 552         at91_set_A_periph(AT91_PIN_PB0, 1);             /* TXD3 */
 553         at91_set_A_periph(AT91_PIN_PB1, 0);             /* RXD3 */
 554 }
 555
 556 struct platform_device *at91_uarts[ATMEL_MAX_UART];     /* the UARTs to use */
 557 struct platform_device *atmel_default_console_device;   /* the serial console device */
 558
 559 void __init at91_init_serial(struct at91_uart_config *config)
 560 {
 561         int i;
 562
 563         /* Fill in list of supported UARTs */
 564         for (i = 0; i < config->nr_tty; i++) {
 565                 switch (config->tty_map[i]) {
 566                         case 0:
 567                                 configure_usart0_pins();
 568                                 at91_uarts[i] = &at91sam9rl_uart0_device;
 569                                 at91_clock_associate("usart0_clk", &at91sam9rl_uart0_device.dev, "usart");
 570                                 break;
 571                         case 1:
 572                                 configure_usart1_pins();
 573                                 at91_uarts[i] = &at91sam9rl_uart1_device;
 574                                 at91_clock_associate("usart1_clk", &at91sam9rl_uart1_device.dev, "usart");
 575                                 break;
 576                         case 2:
 577                                 configure_usart2_pins();
 578                                 at91_uarts[i] = &at91sam9rl_uart2_device;
 579                                 at91_clock_associate("usart2_clk", &at91sam9rl_uart2_device.dev, "usart");
 580                                 break;
 581                         case 3:
 582                                 configure_usart3_pins();
 583                                 at91_uarts[i] = &at91sam9rl_uart3_device;
 584                                 at91_clock_associate("usart3_clk", &at91sam9rl_uart3_device.dev, "usart");
 585                                 break;
 586                         case 4:
 587                                 configure_dbgu_pins();
 588                                 at91_uarts[i] = &at91sam9rl_dbgu_device;
 589                                 at91_clock_associate("mck", &at91sam9rl_dbgu_device.dev, "usart");
 590                                 break;
 591                         default:
 592                                 continue;
 593                 }
 594                 at91_uarts[i]->id = i;          /* update ID number to mapped ID */
 595         }
 596
 597         /* Set serial console device */
 598         if (config->console_tty < ATMEL_MAX_UART)
 599                 atmel_default_console_device = at91_uarts[config->console_tty];
 600         if (!atmel_default_console_device)
 601                 printk(KERN_INFO "AT91: No default serial console defined.\n");
 602 }
 603
 604 void __init at91_add_device_serial(void)
 605 {
 606         int i;
 607
 608         for (i = 0; i < ATMEL_MAX_UART; i++) {
 609                 if (at91_uarts[i])
 610                         platform_device_register(at91_uarts[i]);
 611         }
 612 }
 613 #else
 614 void __init at91_init_serial(struct at91_uart_config *config) {}
 615 void __init at91_add_device_serial(void) {}
 616 #endif
 617
 618
 619 /* -------------------------------------------------------------------- */
 620
 621 /*
 622  * These devices are always present and don't need any board-specific
 623  * setup.
 624  */
 625 static int __init at91_add_standard_devices(void)
 626 {
 627         return 0;
 628 }
 629
 630 arch_initcall(at91_add_standard_devices);