arch/arm/mach-mx3/time.c

   1 /*
   2  * System Timer Interrupt reconfigured to run in free-run mode.
   3  * Author: Vitaly Wool
   4  * Copyright 2004 MontaVista Software Inc.
   5  * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
   6  */
   7
   8 /*
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 /*!
  15  * @file time.c
  16  * @brief This file contains OS tick and wdog timer implementations.
  17  *
  18  * This file contains OS tick and wdog timer implementations.
  19  *
  20  * @ingroup Timers
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/init.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/irq.h>
  27 #include <asm/hardware.h>
  28 #include <asm/mach/time.h>
  29 #include <asm/io.h>
  30 #include <asm/arch/common.h>
  31
  32 /*!
  33  * This is the timer interrupt service routine to do required tasks.
  34  * It also services the WDOG timer at the frequency of twice per WDOG
  35  * timeout value. For example, if the WDOG's timeout value is 4 (2
  36  * seconds since the WDOG runs at 0.5Hz), it will be serviced once
  37  * every 2/2=1 second.
  38  *
  39  * @param  irq          GPT interrupt source number (not used)
  40  * @param  dev_id       this parameter is not used
  41  * @return always returns \b IRQ_HANDLED as defined in
  42  *         include/linux/interrupt.h.
  43  */
  44 static irqreturn_t mxc_timer_interrupt(int irq, void *dev_id)
  45 {
  46         unsigned int next_match;
  47
  48         write_seqlock(&xtime_lock);
  49
  50         if (__raw_readl(MXC_GPT_GPTSR) & GPTSR_OF1) {
  51                 do {
  52                         timer_tick();
  53                         next_match = __raw_readl(MXC_GPT_GPTOCR1) + LATCH;
  54                         __raw_writel(GPTSR_OF1, MXC_GPT_GPTSR);
  55                         __raw_writel(next_match, MXC_GPT_GPTOCR1);
  56                 } while ((signed long)(next_match -
  57                                        __raw_readl(MXC_GPT_GPTCNT)) <= 0);
  58         }
  59
  60         write_sequnlock(&xtime_lock);
  61
  62         return IRQ_HANDLED;
  63 }
  64
  65 /*!
  66  * This function is used to obtain the number of microseconds since the last
  67  * timer interrupt. Note that interrupts is disabled by do_gettimeofday().
  68  *
  69  * @return the number of microseconds since the last timer interrupt.
  70  */
  71 static unsigned long mxc_gettimeoffset(void)
  72 {
  73         unsigned long ticks_to_match, elapsed, usec, tick_usec, i;
  74
  75         /* Get ticks before next timer match */
  76         ticks_to_match =
  77             __raw_readl(MXC_GPT_GPTOCR1) - __raw_readl(MXC_GPT_GPTCNT);
  78
  79         /* We need elapsed ticks since last match */
  80         elapsed = LATCH - ticks_to_match;
  81
  82         /* Now convert them to usec */
  83         /* Insure no overflow when calculating the usec below */
  84         for (i = 1, tick_usec = tick_nsec / 1000;; i *= 2) {
  85                 tick_usec /= i;
  86                 if ((0xFFFFFFFF / tick_usec) > elapsed)
  87                         break;
  88         }
  89         usec = (unsigned long)(elapsed * tick_usec) / (LATCH / i);
  90
  91         return usec;
  92 }
  93
  94 /*!
  95  * The OS tick timer interrupt structure.
  96  */
  97 static struct irqaction timer_irq = {
  98         .name = "MXC Timer Tick",
  99         .flags = IRQF_DISABLED | IRQF_TIMER,
 100         .handler = mxc_timer_interrupt
 101 };
 102
 103 /*!
 104  * This function is used to initialize the GPT to produce an interrupt
 105  * based on HZ.  It is called by start_kernel() during system startup.
 106  */
 107 void __init mxc_init_time(void)
 108 {
 109         u32 reg, v;
 110         reg = __raw_readl(MXC_GPT_GPTCR);
 111         reg &= ~GPTCR_ENABLE;
 112         __raw_writel(reg, MXC_GPT_GPTCR);
 113         reg |= GPTCR_SWR;
 114         __raw_writel(reg, MXC_GPT_GPTCR);
 115
 116         while ((__raw_readl(MXC_GPT_GPTCR) & GPTCR_SWR) != 0)
 117                 cpu_relax();
 118
 119         reg = GPTCR_FRR | GPTCR_CLKSRC_HIGHFREQ;
 120         __raw_writel(reg, MXC_GPT_GPTCR);
 121
 122         /* TODO: get timer rate from clk driver */
 123         v = 66500000;
 124
 125         __raw_writel((v / CLOCK_TICK_RATE) - 1, MXC_GPT_GPTPR);
 126
 127         if ((v % CLOCK_TICK_RATE) != 0) {
 128                 pr_info("\nWARNING: Can't generate CLOCK_TICK_RATE at %d Hz\n",
 129                         CLOCK_TICK_RATE);
 130         }
 131         pr_info("Actual CLOCK_TICK_RATE is %d Hz\n",
 132                 v / ((__raw_readl(MXC_GPT_GPTPR) & 0xFFF) + 1));
 133
 134         reg = __raw_readl(MXC_GPT_GPTCNT);
 135         reg += LATCH;
 136         __raw_writel(reg, MXC_GPT_GPTOCR1);
 137
 138         setup_irq(MXC_INT_GPT, &timer_irq);
 139
 140         reg = __raw_readl(MXC_GPT_GPTCR);
 141         reg =
 142             GPTCR_FRR | GPTCR_CLKSRC_HIGHFREQ | GPTCR_STOPEN | GPTCR_DOZEN |
 143             GPTCR_WAITEN | GPTCR_ENMOD | GPTCR_ENABLE;
 144         __raw_writel(reg, MXC_GPT_GPTCR);
 145
 146         __raw_writel(GPTIR_OF1IE, MXC_GPT_GPTIR);
 147 }
 148
 149 struct sys_timer mxc_timer = {
 150         .init = mxc_init_time,
 151         .offset = mxc_gettimeoffset,
 152 };