include/asm-m68k/io.h

   1 /*
   2  * linux/include/asm-m68k/io.h
   3  *
   4  * 4/1/00 RZ: - rewritten to avoid clashes between ISA/PCI and other
   5  *              IO access
   6  *            - added Q40 support
   7  *            - added skeleton for GG-II and Amiga PCMCIA
   8  * 2/3/01 RZ: - moved a few more defs into raw_io.h
   9  *
  10  * inX/outX/readX/writeX should not be used by any driver unless it does
  11  * ISA or PCI access. Other drivers should use function defined in raw_io.h
  12  * or define its own macros on top of these.
  13  *
  14  *    inX(),outX()              are for PCI and ISA I/O
  15  *    readX(),writeX()          are for PCI memory
  16  *    isa_readX(),isa_writeX()  are for ISA memory
  17  *
  18  * moved mem{cpy,set}_*io inside CONFIG_PCI
  19  */
  20
  21 #ifndef _IO_H
  22 #define _IO_H
  23
  24 #ifdef __KERNEL__
  25
  26 #include <linux/compiler.h>
  27 #include <asm/raw_io.h>
  28 #include <asm/virtconvert.h>
  29
  30 #include <asm-generic/iomap.h>
  31
  32 #ifdef CONFIG_ATARI
  33 #include <asm/atarihw.h>
  34 #endif
  35
  36
  37 /*
  38  * IO/MEM definitions for various ISA bridges
  39  */
  40
  41
  42 #ifdef CONFIG_Q40
  43
  44 #define q40_isa_io_base  0xff400000
  45 #define q40_isa_mem_base 0xff800000
  46
  47 #define Q40_ISA_IO_B(ioaddr) (q40_isa_io_base+1+4*((unsigned long)(ioaddr)))
  48 #define Q40_ISA_IO_W(ioaddr) (q40_isa_io_base+  4*((unsigned long)(ioaddr)))
  49 #define Q40_ISA_MEM_B(madr)  (q40_isa_mem_base+1+4*((unsigned long)(madr)))
  50 #define Q40_ISA_MEM_W(madr)  (q40_isa_mem_base+  4*((unsigned long)(madr)))
  51
  52 #define MULTI_ISA 0
  53 #endif /* Q40 */
  54
  55 /* GG-II Zorro to ISA bridge */
  56 #ifdef CONFIG_GG2
  57
  58 extern unsigned long gg2_isa_base;
  59 #define GG2_ISA_IO_B(ioaddr) (gg2_isa_base+1+((unsigned long)(ioaddr)*4))
  60 #define GG2_ISA_IO_W(ioaddr) (gg2_isa_base+  ((unsigned long)(ioaddr)*4))
  61 #define GG2_ISA_MEM_B(madr)  (gg2_isa_base+1+(((unsigned long)(madr)*4) & 0xfffff))
  62 #define GG2_ISA_MEM_W(madr)  (gg2_isa_base+  (((unsigned long)(madr)*4) & 0xfffff))
  63
  64 #ifndef MULTI_ISA
  65 #define MULTI_ISA 0
  66 #else
  67 #undef MULTI_ISA
  68 #define MULTI_ISA 1
  69 #endif
  70 #endif /* GG2 */
  71
  72 #ifdef CONFIG_AMIGA_PCMCIA
  73 #include <asm/amigayle.h>
  74
  75 #define AG_ISA_IO_B(ioaddr) ( GAYLE_IO+(ioaddr)+(((ioaddr)&1)*GAYLE_ODD) )
  76 #define AG_ISA_IO_W(ioaddr) ( GAYLE_IO+(ioaddr) )
  77
  78 #ifndef MULTI_ISA
  79 #define MULTI_ISA 0
  80 #else
  81 #undef MULTI_ISA
  82 #define MULTI_ISA 1
  83 #endif
  84 #endif /* AMIGA_PCMCIA */
  85
  86
  87
  88 #ifdef CONFIG_ISA
  89
  90 #if MULTI_ISA == 0
  91 #undef MULTI_ISA
  92 #endif
  93
  94 #define Q40_ISA (1)
  95 #define GG2_ISA (2)
  96 #define AG_ISA  (3)
  97
  98 #if defined(CONFIG_Q40) && !defined(MULTI_ISA)
  99 #define ISA_TYPE Q40_ISA
 100 #define ISA_SEX  0
 101 #endif
 102 #if defined(CONFIG_AMIGA_PCMCIA) && !defined(MULTI_ISA)
 103 #define ISA_TYPE AG_ISA
 104 #define ISA_SEX  1
 105 #endif
 106 #if defined(CONFIG_GG2) && !defined(MULTI_ISA)
 107 #define ISA_TYPE GG2_ISA
 108 #define ISA_SEX  0
 109 #endif
 110
 111 #ifdef MULTI_ISA
 112 extern int isa_type;
 113 extern int isa_sex;
 114
 115 #define ISA_TYPE isa_type
 116 #define ISA_SEX  isa_sex
 117 #endif
 118
 119 /*
 120  * define inline addr translation functions. Normally only one variant will
 121  * be compiled in so the case statement will be optimised away
 122  */
 123
 124 static inline u8 __iomem *isa_itb(unsigned long addr)
 125 {
 126   switch(ISA_TYPE)
 127     {
 128 #ifdef CONFIG_Q40
 129     case Q40_ISA: return (u8 __iomem *)Q40_ISA_IO_B(addr);
 130 #endif
 131 #ifdef CONFIG_GG2
 132     case GG2_ISA: return (u8 __iomem *)GG2_ISA_IO_B(addr);
 133 #endif
 134 #ifdef CONFIG_AMIGA_PCMCIA
 135     case AG_ISA: return (u8 __iomem *)AG_ISA_IO_B(addr);
 136 #endif
 137     default: return NULL; /* avoid warnings, just in case */
 138     }
 139 }
 140 static inline u16 __iomem *isa_itw(unsigned long addr)
 141 {
 142   switch(ISA_TYPE)
 143     {
 144 #ifdef CONFIG_Q40
 145     case Q40_ISA: return (u16 __iomem *)Q40_ISA_IO_W(addr);
 146 #endif
 147 #ifdef CONFIG_GG2
 148     case GG2_ISA: return (u16 __iomem *)GG2_ISA_IO_W(addr);
 149 #endif
 150 #ifdef CONFIG_AMIGA_PCMCIA
 151     case AG_ISA: return (u16 __iomem *)AG_ISA_IO_W(addr);
 152 #endif
 153     default: return NULL; /* avoid warnings, just in case */
 154     }
 155 }
 156 static inline u32 __iomem *isa_itl(unsigned long addr)
 157 {
 158   switch(ISA_TYPE)
 159     {
 160 #ifdef CONFIG_AMIGA_PCMCIA
 161     case AG_ISA: return (u32 __iomem *)AG_ISA_IO_W(addr);
 162 #endif
 163     default: return 0; /* avoid warnings, just in case */
 164     }
 165 }
 166 static inline u8 __iomem *isa_mtb(unsigned long addr)
 167 {
 168   switch(ISA_TYPE)
 169     {
 170 #ifdef CONFIG_Q40
 171     case Q40_ISA: return (u8 __iomem *)Q40_ISA_MEM_B(addr);
 172 #endif
 173 #ifdef CONFIG_GG2
 174     case GG2_ISA: return (u8 __iomem *)GG2_ISA_MEM_B(addr);
 175 #endif
 176 #ifdef CONFIG_AMIGA_PCMCIA
 177     case AG_ISA: return (u8 __iomem *)addr;
 178 #endif
 179     default: return NULL; /* avoid warnings, just in case */
 180     }
 181 }
 182 static inline u16 __iomem *isa_mtw(unsigned long addr)
 183 {
 184   switch(ISA_TYPE)
 185     {
 186 #ifdef CONFIG_Q40
 187     case Q40_ISA: return (u16 __iomem *)Q40_ISA_MEM_W(addr);
 188 #endif
 189 #ifdef CONFIG_GG2
 190     case GG2_ISA: return (u16 __iomem *)GG2_ISA_MEM_W(addr);
 191 #endif
 192 #ifdef CONFIG_AMIGA_PCMCIA
 193     case AG_ISA: return (u16 __iomem *)addr;
 194 #endif
 195     default: return NULL; /* avoid warnings, just in case */
 196     }
 197 }
 198
 199
 200 #define isa_inb(port)      in_8(isa_itb(port))
 201 #define isa_inw(port)      (ISA_SEX ? in_be16(isa_itw(port)) : in_le16(isa_itw(port)))
 202 #define isa_inl(port)      (ISA_SEX ? in_be32(isa_itl(port)) : in_le32(isa_itl(port)))
 203 #define isa_outb(val,port) out_8(isa_itb(port),(val))
 204 #define isa_outw(val,port) (ISA_SEX ? out_be16(isa_itw(port),(val)) : out_le16(isa_itw(port),(val)))
 205 #define isa_outl(val,port) (ISA_SEX ? out_be32(isa_itl(port),(val)) : out_le32(isa_itl(port),(val)))
 206
 207 #define isa_readb(p)       in_8(isa_mtb((unsigned long)(p)))
 208 #define isa_readw(p)       \
 209         (ISA_SEX ? in_be16(isa_mtw((unsigned long)(p))) \
 210                  : in_le16(isa_mtw((unsigned long)(p))))
 211 #define isa_writeb(val,p)  out_8(isa_mtb((unsigned long)(p)),(val))
 212 #define isa_writew(val,p)  \
 213         (ISA_SEX ? out_be16(isa_mtw((unsigned long)(p)),(val))  \
 214                  : out_le16(isa_mtw((unsigned long)(p)),(val)))
 215
 216 static inline void isa_delay(void)
 217 {
 218   switch(ISA_TYPE)
 219     {
 220 #ifdef CONFIG_Q40
 221     case Q40_ISA: isa_outb(0,0x80); break;
 222 #endif
 223 #ifdef CONFIG_GG2
 224     case GG2_ISA: break;
 225 #endif
 226 #ifdef CONFIG_AMIGA_PCMCIA
 227     case AG_ISA: break;
 228 #endif
 229     default: break; /* avoid warnings */
 230     }
 231 }
 232
 233 #define isa_inb_p(p)      ({u8 v=isa_inb(p);isa_delay();v;})
 234 #define isa_outb_p(v,p)   ({isa_outb((v),(p));isa_delay();})
 235 #define isa_inw_p(p)      ({u16 v=isa_inw(p);isa_delay();v;})
 236 #define isa_outw_p(v,p)   ({isa_outw((v),(p));isa_delay();})
 237 #define isa_inl_p(p)      ({u32 v=isa_inl(p);isa_delay();v;})
 238 #define isa_outl_p(v,p)   ({isa_outl((v),(p));isa_delay();})
 239
 240 #define isa_insb(port, buf, nr) raw_insb(isa_itb(port), (u8 *)(buf), (nr))
 241 #define isa_outsb(port, buf, nr) raw_outsb(isa_itb(port), (u8 *)(buf), (nr))
 242
 243 #define isa_insw(port, buf, nr)     \
 244        (ISA_SEX ? raw_insw(isa_itw(port), (u16 *)(buf), (nr)) :    \
 245                   raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
 246
 247 #define isa_outsw(port, buf, nr)    \
 248        (ISA_SEX ? raw_outsw(isa_itw(port), (u16 *)(buf), (nr)) :  \
 249                   raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
 250
 251 #define isa_insl(port, buf, nr)     \
 252        (ISA_SEX ? raw_insl(isa_itl(port), (u32 *)(buf), (nr)) :    \
 253                   raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1))
 254
 255 #define isa_outsl(port, buf, nr)    \
 256        (ISA_SEX ? raw_outsl(isa_itl(port), (u32 *)(buf), (nr)) :  \
 257                   raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1))
 258
 259 #endif  /* CONFIG_ISA */
 260
 261
 262 #if defined(CONFIG_ISA) && !defined(CONFIG_PCI)
 263 #define inb     isa_inb
 264 #define inb_p   isa_inb_p
 265 #define outb    isa_outb
 266 #define outb_p  isa_outb_p
 267 #define inw     isa_inw
 268 #define inw_p   isa_inw_p
 269 #define outw    isa_outw
 270 #define outw_p  isa_outw_p
 271 #define inl     isa_inl
 272 #define inl_p   isa_inl_p
 273 #define outl    isa_outl
 274 #define outl_p  isa_outl_p
 275 #define insb    isa_insb
 276 #define insw    isa_insw
 277 #define insl    isa_insl
 278 #define outsb   isa_outsb
 279 #define outsw   isa_outsw
 280 #define outsl   isa_outsl
 281 #define readb   isa_readb
 282 #define readw   isa_readw
 283 #define writeb  isa_writeb
 284 #define writew  isa_writew
 285 #endif /* CONFIG_ISA */
 286
 287 #if defined(CONFIG_PCI)
 288
 289 #define readl(addr)      in_le32(addr)
 290 #define writel(val,addr) out_le32((addr),(val))
 291
 292 /* those can be defined for both ISA and PCI - it won't work though */
 293 #define readb(addr)       in_8(addr)
 294 #define readw(addr)       in_le16(addr)
 295 #define writeb(val,addr)  out_8((addr),(val))
 296 #define writew(val,addr)  out_le16((addr),(val))
 297
 298 #define readb_relaxed(addr) readb(addr)
 299 #define readw_relaxed(addr) readw(addr)
 300 #define readl_relaxed(addr) readl(addr)
 301
 302 #ifndef CONFIG_ISA
 303 #define inb(port)      in_8(port)
 304 #define outb(val,port) out_8((port),(val))
 305 #define inw(port)      in_le16(port)
 306 #define outw(val,port) out_le16((port),(val))
 307 #define inl(port)      in_le32(port)
 308 #define outl(val,port) out_le32((port),(val))
 309
 310 #else
 311 /*
 312  * kernel with both ISA and PCI compiled in, those have
 313  * conflicting defs for in/out. Simply consider port < 1024
 314  * ISA and everything else PCI. read,write not defined
 315  * in this case
 316  */
 317 #define inb(port) ((port)<1024 ? isa_inb(port) : in_8(port))
 318 #define inb_p(port) ((port)<1024 ? isa_inb_p(port) : in_8(port))
 319 #define inw(port) ((port)<1024 ? isa_inw(port) : in_le16(port))
 320 #define inw_p(port) ((port)<1024 ? isa_inw_p(port) : in_le16(port))
 321 #define inl(port) ((port)<1024 ? isa_inl(port) : in_le32(port))
 322 #define inl_p(port) ((port)<1024 ? isa_inl_p(port) : in_le32(port))
 323
 324 #define outb(val,port) ((port)<1024 ? isa_outb((val),(port)) : out_8((port),(val)))
 325 #define outb_p(val,port) ((port)<1024 ? isa_outb_p((val),(port)) : out_8((port),(val)))
 326 #define outw(val,port) ((port)<1024 ? isa_outw((val),(port)) : out_le16((port),(val)))
 327 #define outw_p(val,port) ((port)<1024 ? isa_outw_p((val),(port)) : out_le16((port),(val)))
 328 #define outl(val,port) ((port)<1024 ? isa_outl((val),(port)) : out_le32((port),(val)))
 329 #define outl_p(val,port) ((port)<1024 ? isa_outl_p((val),(port)) : out_le32((port),(val)))
 330 #endif
 331 #endif /* CONFIG_PCI */
 332
 333 #if !defined(CONFIG_ISA) && !defined(CONFIG_PCI)
 334 /*
 335  * We need to define dummy functions for GENERIC_IOMAP support.
 336  */
 337 #define inb(port)          0xff
 338 #define inb_p(port)        0xff
 339 #define outb(val,port)     ((void)0)
 340 #define outb_p(val,port)   ((void)0)
 341 #define inw(port)          0xffff
 342 #define outw(val,port)     ((void)0)
 343 #define inl(port)          0xffffffffUL
 344 #define outl(val,port)     ((void)0)
 345
 346 #define insb(port,buf,nr)  ((void)0)
 347 #define outsb(port,buf,nr) ((void)0)
 348 #define insw(port,buf,nr)  ((void)0)
 349 #define outsw(port,buf,nr) ((void)0)
 350 #define insl(port,buf,nr)  ((void)0)
 351 #define outsl(port,buf,nr) ((void)0)
 352
 353 /*
 354  * These should be valid on any ioremap()ed region
 355  */
 356 #define readb(addr)      in_8(addr)
 357 #define writeb(val,addr) out_8((addr),(val))
 358 #define readw(addr)      in_le16(addr)
 359 #define writew(val,addr) out_le16((addr),(val))
 360 #endif
 361 #if !defined(CONFIG_PCI)
 362 #define readl(addr)      in_le32(addr)
 363 #define writel(val,addr) out_le32((addr),(val))
 364 #endif
 365
 366 #define mmiowb()
 367
 368 static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
 369 {
 370         return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
 371 }
 372 static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size)
 373 {
 374         return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
 375 }
 376 static inline void __iomem *ioremap_writethrough(unsigned long physaddr,
 377                                          unsigned long size)
 378 {
 379         return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
 380 }
 381 static inline void __iomem *ioremap_fullcache(unsigned long physaddr,
 382                                       unsigned long size)
 383 {
 384         return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
 385 }
 386
 387
 388 /* m68k caches aren't DMA coherent */
 389 extern void dma_cache_wback_inv(unsigned long start, unsigned long size);
 390 extern void dma_cache_wback(unsigned long start, unsigned long size);
 391 extern void dma_cache_inv(unsigned long start, unsigned long size);
 392
 393 static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
 394 {
 395         __builtin_memset((void __force *) addr, val, count);
 396 }
 397 static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
 398 {
 399         __builtin_memcpy(dst, (void __force *) src, count);
 400 }
 401 static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
 402 {
 403         __builtin_memcpy((void __force *) dst, src, count);
 404 }
 405
 406 #ifndef CONFIG_SUN3
 407 #define IO_SPACE_LIMIT 0xffff
 408 #else
 409 #define IO_SPACE_LIMIT 0x0fffffff
 410 #endif
 411
 412 #endif /* __KERNEL__ */
 413
 414 #define __ARCH_HAS_NO_PAGE_ZERO_MAPPED          1
 415
 416 /*
 417  * Convert a physical pointer to a virtual kernel pointer for /dev/mem
 418  * access
 419  */
 420 #define xlate_dev_mem_ptr(p)    __va(p)
 421
 422 /*
 423  * Convert a virtual cached pointer to an uncached pointer
 424  */
 425 #define xlate_dev_kmem_ptr(p)   p
 426
 427 #endif /* _IO_H */