2 * include/asm-sh/processor.h
4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
8 #ifndef __ASM_SH_PROCESSOR_32_H
9 #define __ASM_SH_PROCESSOR_32_H
12 #include <linux/compiler.h>
14 #include <asm/types.h>
15 #include <asm/cache.h>
16 #include <asm/ptrace.h>
19 * Default implementation of macro that returns current
20 * instruction pointer ("program counter").
22 #define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; })
24 /* Core Processor Version Register */
25 #define CCN_PVR 0xff000030
26 #define CCN_CVR 0xff000040
27 #define CCN_PRR 0xff000044
31 unsigned long loops_per_jiffy
;
32 unsigned long asid_cache
;
34 struct cache_info icache
; /* Primary I-cache */
35 struct cache_info dcache
; /* Primary D-cache */
36 struct cache_info scache
; /* Secondary cache */
39 } __attribute__ ((aligned(L1_CACHE_BYTES
)));
41 extern struct sh_cpuinfo cpu_data
[];
42 #define boot_cpu_data cpu_data[0]
43 #define current_cpu_data cpu_data[smp_processor_id()]
44 #define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
47 * User space process size: 2GB.
49 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
51 #define TASK_SIZE 0x7c000000UL
53 /* This decides where the kernel will search for a free chunk of vm
54 * space during mmap's.
56 #define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
62 * When it's set, it means the processor doesn't have right to use FPU,
63 * and it results exception when the floating operation is executed.
66 * Interrupt level mask
68 #define SR_DSP 0x00001000
69 #define SR_IMASK 0x000000f0
72 * FPU structure and data
75 struct sh_fpu_hard_struct
{
76 unsigned long fp_regs
[16];
77 unsigned long xfp_regs
[16];
81 long status
; /* software status information */
84 /* Dummy fpu emulator */
85 struct sh_fpu_soft_struct
{
86 unsigned long fp_regs
[16];
87 unsigned long xfp_regs
[16];
91 unsigned char lookahead
;
92 unsigned long entry_pc
;
96 struct sh_fpu_hard_struct hard
;
97 struct sh_fpu_soft_struct soft
;
100 struct thread_struct
{
101 /* Saved registers when thread is descheduled */
105 /* Hardware debugging registers */
106 unsigned long ubc_pc
;
108 /* floating point info */
109 union sh_fpu_union fpu
;
116 /* Count of active tasks with UBC settings */
117 extern int ubc_usercnt
;
119 #define INIT_THREAD { \
120 .sp = sizeof(init_stack) + (long) &init_stack, \
124 * Do necessary setup to start up a newly executed thread.
126 #define start_thread(regs, new_pc, new_sp) \
129 regs->sr = SR_FD; /* User mode. */ \
131 regs->regs[15] = new_sp
133 /* Forward declaration, a strange C thing */
137 /* Free all resources held by a thread. */
138 extern void release_thread(struct task_struct
*);
140 /* Prepare to copy thread state - unlazy all lazy status */
141 #define prepare_to_copy(tsk) do { } while (0)
144 * create a kernel thread without removing it from tasklists
146 extern int kernel_thread(int (*fn
)(void *), void * arg
, unsigned long flags
);
148 /* Copy and release all segment info associated with a VM */
149 #define copy_segments(p, mm) do { } while(0)
150 #define release_segments(mm) do { } while(0)
153 * FPU lazy state save handling.
156 static __inline__
void disable_fpu(void)
158 unsigned long __dummy
;
160 /* Set FD flag in SR */
161 __asm__
__volatile__("stc sr, %0\n\t"
168 static __inline__
void enable_fpu(void)
170 unsigned long __dummy
;
172 /* Clear out FD flag in SR */
173 __asm__
__volatile__("stc sr, %0\n\t"
180 /* Double presision, NANS as NANS, rounding to nearest, no exceptions */
181 #define FPSCR_INIT 0x00080000
183 #define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
184 #define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
187 * Return saved PC of a blocked thread.
189 #define thread_saved_pc(tsk) (tsk->thread.pc)
191 void show_trace(struct task_struct
*tsk
, unsigned long *sp
,
192 struct pt_regs
*regs
);
193 extern unsigned long get_wchan(struct task_struct
*p
);
195 #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
196 #define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
198 #define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
199 #define cpu_relax() barrier()
201 #if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
202 defined(CONFIG_CPU_SH4)
203 #define PREFETCH_STRIDE L1_CACHE_BYTES
204 #define ARCH_HAS_PREFETCH
205 #define ARCH_HAS_PREFETCHW
206 static inline void prefetch(void *x
)
208 __asm__
__volatile__ ("pref @%0\n\t" : : "r" (x
) : "memory");
211 #define prefetchw(x) prefetch(x)
214 #endif /* __KERNEL__ */
215 #endif /* __ASM_SH_PROCESSOR_32_H */