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argc does not leak its address argument
[qbe.git] / arm64 / emit.c
blob292dc79c4f37b82ab38d2cbdd42ff0574c03f51a
1 #include "all.h"
2
3 typedef struct E E;
4
5 struct E {
6 FILE *f;
7 Fn *fn;
8 uint64_t frame;
9 uint padding;
10 };
11
12 #define CMP(X) \
13 X(Cieq, "eq") \
14 X(Cine, "ne") \
15 X(Cisge, "ge") \
16 X(Cisgt, "gt") \
17 X(Cisle, "le") \
18 X(Cislt, "lt") \
19 X(Ciuge, "cs") \
20 X(Ciugt, "hi") \
21 X(Ciule, "ls") \
22 X(Ciult, "cc") \
23 X(NCmpI+Cfeq, "eq") \
24 X(NCmpI+Cfge, "ge") \
25 X(NCmpI+Cfgt, "gt") \
26 X(NCmpI+Cfle, "ls") \
27 X(NCmpI+Cflt, "mi") \
28 X(NCmpI+Cfne, "ne") \
29 X(NCmpI+Cfo, "vc") \
30 X(NCmpI+Cfuo, "vs")
31
32 enum {
33 Ki = -1, /* matches Kw and Kl */
34 Ka = -2, /* matches all classes */
35 };
36
37 static struct {
38 short op;
39 short cls;
40 char *asm;
41 } omap[] = {
42 { Oadd, Ki, "add %=, %0, %1" },
43 { Oadd, Ka, "fadd %=, %0, %1" },
44 { Osub, Ki, "sub %=, %0, %1" },
45 { Osub, Ka, "fsub %=, %0, %1" },
46 { Oneg, Ki, "neg %=, %0" },
47 { Oneg, Ka, "fneg %=, %0" },
48 { Oand, Ki, "and %=, %0, %1" },
49 { Oor, Ki, "orr %=, %0, %1" },
50 { Oxor, Ki, "eor %=, %0, %1" },
51 { Osar, Ki, "asr %=, %0, %1" },
52 { Oshr, Ki, "lsr %=, %0, %1" },
53 { Oshl, Ki, "lsl %=, %0, %1" },
54 { Omul, Ki, "mul %=, %0, %1" },
55 { Omul, Ka, "fmul %=, %0, %1" },
56 { Odiv, Ki, "sdiv %=, %0, %1" },
57 { Odiv, Ka, "fdiv %=, %0, %1" },
58 { Oudiv, Ki, "udiv %=, %0, %1" },
59 { Orem, Ki, "sdiv %?, %0, %1\n\tmsub\t%=, %?, %1, %0" },
60 { Ourem, Ki, "udiv %?, %0, %1\n\tmsub\t%=, %?, %1, %0" },
61 { Ocopy, Ki, "mov %=, %0" },
62 { Ocopy, Ka, "fmov %=, %0" },
63 { Oswap, Ki, "mov %?, %0\n\tmov\t%0, %1\n\tmov\t%1, %?" },
64 { Oswap, Ka, "fmov %?, %0\n\tfmov\t%0, %1\n\tfmov\t%1, %?" },
65 { Ostoreb, Kw, "strb %W0, %M1" },
66 { Ostoreh, Kw, "strh %W0, %M1" },
67 { Ostorew, Kw, "str %W0, %M1" },
68 { Ostorel, Kw, "str %L0, %M1" },
69 { Ostores, Kw, "str %S0, %M1" },
70 { Ostored, Kw, "str %D0, %M1" },
71 { Oloadsb, Ki, "ldrsb %=, %M0" },
72 { Oloadub, Ki, "ldrb %W=, %M0" },
73 { Oloadsh, Ki, "ldrsh %=, %M0" },
74 { Oloaduh, Ki, "ldrh %W=, %M0" },
75 { Oloadsw, Kw, "ldr %=, %M0" },
76 { Oloadsw, Kl, "ldrsw %=, %M0" },
77 { Oloaduw, Ki, "ldr %W=, %M0" },
78 { Oload, Ka, "ldr %=, %M0" },
79 { Oextsb, Ki, "sxtb %=, %W0" },
80 { Oextub, Ki, "uxtb %W=, %W0" },
81 { Oextsh, Ki, "sxth %=, %W0" },
82 { Oextuh, Ki, "uxth %W=, %W0" },
83 { Oextsw, Ki, "sxtw %L=, %W0" },
84 { Oextuw, Ki, "mov %W=, %W0" },
85 { Oexts, Kd, "fcvt %=, %S0" },
86 { Otruncd, Ks, "fcvt %=, %D0" },
87 { Ocast, Kw, "fmov %=, %S0" },
88 { Ocast, Kl, "fmov %=, %D0" },
89 { Ocast, Ks, "fmov %=, %W0" },
90 { Ocast, Kd, "fmov %=, %L0" },
91 { Ostosi, Ka, "fcvtzs %=, %S0" },
92 { Ostoui, Ka, "fcvtzu %=, %S0" },
93 { Odtosi, Ka, "fcvtzs %=, %D0" },
94 { Odtoui, Ka, "fcvtzu %=, %D0" },
95 { Oswtof, Ka, "scvtf %=, %W0" },
96 { Ouwtof, Ka, "ucvtf %=, %W0" },
97 { Osltof, Ka, "scvtf %=, %L0" },
98 { Oultof, Ka, "ucvtf %=, %L0" },
99 { Ocall, Kw, "blr %L0" },
100
101 { Oacmp, Ki, "cmp %0, %1" },
102 { Oacmn, Ki, "cmn %0, %1" },
103 { Oafcmp, Ka, "fcmpe %0, %1" },
104
105 #define X(c, str) \
106 { Oflag+c, Ki, "cset %=, " str },
107 CMP(X)
108 #undef X
109 { NOp, 0, 0 }
110 };
111
112 static char *
113 rname(int r, int k)
114 {
115 static char buf[4];
116
117 if (r == SP) {
118 assert(k == Kl);
119 sprintf(buf, "sp");
120 }
121 else if (R0 <= r && r <= LR)
122 switch (k) {
123 default: die("invalid class");
124 case Kw: sprintf(buf, "w%d", r-R0); break;
125 case Kx:
126 case Kl: sprintf(buf, "x%d", r-R0); break;
127 }
128 else if (V0 <= r && r <= V30)
129 switch (k) {
130 default: die("invalid class");
131 case Ks: sprintf(buf, "s%d", r-V0); break;
132 case Kx:
133 case Kd: sprintf(buf, "d%d", r-V0); break;
134 }
135 else
136 die("invalid register");
137 return buf;
138 }
139
140 static uint64_t
141 slot(int s, E *e)
142 {
143 s = ((int32_t)s << 3) >> 3;
144 if (s == -1)
145 return 16 + e->frame;
146 if (s < 0) {
147 if (e->fn->vararg && !T.apple)
148 return 16 + e->frame + 192 - (s+2);
149 else
150 return 16 + e->frame - (s+2);
151 } else
152 return 16 + e->padding + 4 * s;
153 }
154
155 static void
156 emitf(char *s, Ins *i, E *e)
157 {
158 Ref r;
159 int k, c;
160 Con *pc;
161 uint n, sp;
162
163 fputc('\t', e->f);
164
165 sp = 0;
166 for (;;) {
167 k = i->cls;
168 while ((c = *s++) != '%')
169 if (c == ' ' && !sp) {
170 fputc('\t', e->f);
171 sp = 1;
172 } else if ( !c) {
173 fputc('\n', e->f);
174 return;
175 } else
176 fputc(c, e->f);
177 Switch:
178 switch ((c = *s++)) {
179 default:
180 die("invalid escape");
181 case 'W':
182 k = Kw;
183 goto Switch;
184 case 'L':
185 k = Kl;
186 goto Switch;
187 case 'S':
188 k = Ks;
189 goto Switch;
190 case 'D':
191 k = Kd;
192 goto Switch;
193 case '?':
194 if (KBASE(k) == 0)
195 fputs(rname(R18, k), e->f);
196 else
197 fputs(k==Ks ? "s31" : "d31", e->f);
198 break;
199 case '=':
200 case '0':
201 r = c == '=' ? i->to : i->arg[0];
202 assert(isreg(r));
203 fputs(rname(r.val, k), e->f);
204 break;
205 case '1':
206 r = i->arg[1];
207 switch (rtype(r)) {
208 default:
209 die("invalid second argument");
210 case RTmp:
211 assert(isreg(r));
212 fputs(rname(r.val, k), e->f);
213 break;
214 case RCon:
215 pc = &e->fn->con[r.val];
216 n = pc->bits.i;
217 assert(pc->type == CBits);
218 if (n & 0xfff000)
219 fprintf(e->f, "#%u, lsl #12", n>>12);
220 else
221 fprintf(e->f, "#%u", n);
222 break;
223 }
224 break;
225 case 'M':
226 c = *s++;
227 assert(c == '0' || c == '1' || c == '=');
228 r = c == '=' ? i->to : i->arg[c - '0'];
229 switch (rtype(r)) {
230 default:
231 die("todo (arm emit): unhandled ref");
232 case RTmp:
233 assert(isreg(r));
234 fprintf(e->f, "[%s]", rname(r.val, Kl));
235 break;
236 case RSlot:
237 fprintf(e->f, "[x29, %"PRIu64"]", slot(r.val, e));
238 break;
239 }
240 break;
241 }
242 }
243 }
244
245 static void
246 loadaddr(Con *c, char *rn, E *e)
247 {
248 char *p, *l, *s;
249
250 switch (c->reloc) {
251 default:
252 die("unreachable");
253 case RelDef:
254 if (T.apple)
255 s = "\tadrp\tR, S@pageO\n"
256 "\tadd\tR, R, S@pageoffO\n";
257 else
258 s = "\tadrp\tR, SO\n"
259 "\tadd\tR, R, #:lo12:SO\n";
260 break;
261 case RelThr:
262 if (T.apple)
263 s = "\tadrp\tR, S@tlvppage\n"
264 "\tldr\tR, [R, S@tlvppageoff]\n";
265 else
266 s = "\tmrs\tR, tpidr_el0\n"
267 "\tadd\tR, R, #:tprel_hi12:SO, lsl #12\n"
268 "\tadd\tR, R, #:tprel_lo12_nc:SO\n";
269 break;
270 }
271
272 l = str(c->label);
273 p = l[0] == '"' ? "" : T.assym;
274 for (; *s; s++)
275 switch (*s) {
276 default:
277 fputc(*s, e->f);
278 break;
279 case 'R':
280 fputs(rn, e->f);
281 break;
282 case 'S':
283 fputs(p, e->f);
284 fputs(l, e->f);
285 break;
286 case 'O':
287 if (c->bits.i)
288 /* todo, handle large offsets */
289 fprintf(e->f, "+%"PRIi64, c->bits.i);
290 break;
291 }
292 }
293
294 static void
295 loadcon(Con *c, int r, int k, E *e)
296 {
297 char *rn;
298 int64_t n;
299 int w, sh;
300
301 w = KWIDE(k);
302 rn = rname(r, k);
303 n = c->bits.i;
304 if (c->type == CAddr) {
305 loadaddr(c, rn, e);
306 return;
307 }
308 assert(c->type == CBits);
309 if (!w)
310 n = (int32_t)n;
311 if ((n | 0xffff) == -1 || arm64_logimm(n, k)) {
312 fprintf(e->f, "\tmov\t%s, #%"PRIi64"\n", rn, n);
313 } else {
314 fprintf(e->f, "\tmov\t%s, #%d\n",
315 rn, (int)(n & 0xffff));
316 for (sh=16; n>>=16; sh+=16) {
317 if ((!w && sh == 32) || sh == 64)
318 break;
319 fprintf(e->f, "\tmovk\t%s, #0x%x, lsl #%d\n",
320 rn, (uint)(n & 0xffff), sh);
321 }
322 }
323 }
324
325 static void emitins(Ins *, E *);
326
327 static void
328 fixarg(Ref *pr, int sz, E *e)
329 {
330 Ins *i;
331 Ref r;
332 uint64_t s;
333
334 r = *pr;
335 if (rtype(r) == RSlot) {
336 s = slot(r.val, e);
337 if (s > sz * 4095u) {
338 i = &(Ins){Oaddr, Kl, TMP(IP0), {r}};
339 emitins(i, e);
340 *pr = TMP(IP0);
341 }
342 }
343 }
344
345 static void
346 emitins(Ins *i, E *e)
347 {
348 char *l, *p, *rn;
349 uint64_t s;
350 int o;
351 Ref r;
352 Con *c;
353
354 switch (i->op) {
355 default:
356 if (isload(i->op))
357 fixarg(&i->arg[0], loadsz(i), e);
358 if (isstore(i->op))
359 fixarg(&i->arg[1], storesz(i), e);
360 Table:
361 /* most instructions are just pulled out of
362 * the table omap[], some special cases are
363 * detailed below */
364 for (o=0;; o++) {
365 /* this linear search should really be a binary
366 * search */
367 if (omap[o].op == NOp)
368 die("no match for %s(%c)",
369 optab[i->op].name, "wlsd"[i->cls]);
370 if (omap[o].op == i->op)
371 if (omap[o].cls == i->cls || omap[o].cls == Ka
372 || (omap[o].cls == Ki && KBASE(i->cls) == 0))
373 break;
374 }
375 emitf(omap[o].asm, i, e);
376 break;
377 case Onop:
378 break;
379 case Ocopy:
380 if (req(i->to, i->arg[0]))
381 break;
382 if (rtype(i->to) == RSlot) {
383 r = i->to;
384 if (!isreg(i->arg[0])) {
385 i->to = TMP(R18);
386 emitins(i, e);
387 i->arg[0] = i->to;
388 }
389 i->op = Ostorew + i->cls;
390 i->cls = Kw;
391 i->arg[1] = r;
392 emitins(i, e);
393 break;
394 }
395 assert(isreg(i->to));
396 switch (rtype(i->arg[0])) {
397 case RCon:
398 c = &e->fn->con[i->arg[0].val];
399 loadcon(c, i->to.val, i->cls, e);
400 break;
401 case RSlot:
402 i->op = Oload;
403 emitins(i, e);
404 break;
405 default:
406 assert(i->to.val != R18);
407 goto Table;
408 }
409 break;
410 case Oaddr:
411 assert(rtype(i->arg[0]) == RSlot);
412 rn = rname(i->to.val, Kl);
413 s = slot(i->arg[0].val, e);
414 if (s <= 4095)
415 fprintf(e->f, "\tadd\t%s, x29, #%"PRIu64"\n", rn, s);
416 else if (s <= 65535)
417 fprintf(e->f,
418 "\tmov\t%s, #%"PRIu64"\n"
419 "\tadd\t%s, x29, %s\n",
420 rn, s, rn, rn
421 );
422 else
423 fprintf(e->f,
424 "\tmov\t%s, #%"PRIu64"\n"
425 "\tmovk\t%s, #%"PRIu64", lsl #16\n"
426 "\tadd\t%s, x29, %s\n",
427 rn, s & 0xFFFF, rn, s >> 16, rn, rn
428 );
429 break;
430 case Ocall:
431 if (rtype(i->arg[0]) != RCon)
432 goto Table;
433 c = &e->fn->con[i->arg[0].val];
434 if (c->type != CAddr || c->bits.i)
435 die("invalid call argument");
436 l = str(c->label);
437 p = l[0] == '"' ? "" : T.assym;
438 fprintf(e->f, "\tbl\t%s%s\n", p, l);
439 break;
440 case Osalloc:
441 emitf("sub sp, sp, %0", i, e);
442 if (!req(i->to, R))
443 emitf("mov %=, sp", i, e);
444 break;
445 }
446 }
447
448 static void
449 framelayout(E *e)
450 {
451 int *r;
452 uint o;
453 uint64_t f;
454
455 for (o=0, r=arm64_rclob; *r>=0; r++)
456 o += 1 & (e->fn->reg >> *r);
457 f = e->fn->slot;
458 f = (f + 3) & -4;
459 o += o & 1;
460 e->padding = 4*(f-e->fn->slot);
461 e->frame = 4*f + 8*o;
462 }
463
464 /*
465
466 Stack-frame layout:
467
468 +=============+
469 | varargs |
470 | save area |
471 +-------------+
472 | callee-save | ^
473 | registers | |
474 +-------------+ |
475 | ... | |
476 | spill slots | |
477 | ... | | e->frame
478 +-------------+ |
479 | ... | |
480 | locals | |
481 | ... | |
482 +-------------+ |
483 | e->padding | v
484 +-------------+
485 | saved x29 |
486 | saved x30 |
487 +=============+ <- x29
488
489 */
490
491 void
492 arm64_emitfn(Fn *fn, FILE *out)
493 {
494 static char *ctoa[] = {
495 #define X(c, s) [c] = s,
496 CMP(X)
497 #undef X
498 };
499 static int id0;
500 int s, n, c, lbl, *r;
501 uint64_t o;
502 Blk *b, *t;
503 Ins *i;
504 E *e;
505
506 e = &(E){.f = out, .fn = fn};
507 if (T.apple)
508 e->fn->lnk.align = 4;
509 emitfnlnk(e->fn->name, &e->fn->lnk, e->f);
510 framelayout(e);
511
512 if (e->fn->vararg && !T.apple) {
513 for (n=7; n>=0; n--)
514 fprintf(e->f, "\tstr\tq%d, [sp, -16]!\n", n);
515 for (n=7; n>=0; n-=2)
516 fprintf(e->f, "\tstp\tx%d, x%d, [sp, -16]!\n", n-1, n);
517 }
518
519 if (e->frame + 16 <= 512)
520 fprintf(e->f,
521 "\tstp\tx29, x30, [sp, -%"PRIu64"]!\n",
522 e->frame + 16
523 );
524 else if (e->frame <= 4095)
525 fprintf(e->f,
526 "\tsub\tsp, sp, #%"PRIu64"\n"
527 "\tstp\tx29, x30, [sp, -16]!\n",
528 e->frame
529 );
530 else if (e->frame <= 65535)
531 fprintf(e->f,
532 "\tmov\tx16, #%"PRIu64"\n"
533 "\tsub\tsp, sp, x16\n"
534 "\tstp\tx29, x30, [sp, -16]!\n",
535 e->frame
536 );
537 else
538 fprintf(e->f,
539 "\tmov\tx16, #%"PRIu64"\n"
540 "\tmovk\tx16, #%"PRIu64", lsl #16\n"
541 "\tsub\tsp, sp, x16\n"
542 "\tstp\tx29, x30, [sp, -16]!\n",
543 e->frame & 0xFFFF, e->frame >> 16
544 );
545 fputs("\tmov\tx29, sp\n", e->f);
546 s = (e->frame - e->padding) / 4;
547 for (r=arm64_rclob; *r>=0; r++)
548 if (e->fn->reg & BIT(*r)) {
549 s -= 2;
550 i = &(Ins){.arg = {TMP(*r), SLOT(s)}};
551 i->op = *r >= V0 ? Ostored : Ostorel;
552 emitins(i, e);
553 }
554
555 for (lbl=0, b=e->fn->start; b; b=b->link) {
556 if (lbl || b->npred > 1)
557 fprintf(e->f, "%s%d:\n", T.asloc, id0+b->id);
558 for (i=b->ins; i!=&b->ins[b->nins]; i++)
559 emitins(i, e);
560 lbl = 1;
561 switch (b->jmp.type) {
562 case Jret0:
563 s = (e->frame - e->padding) / 4;
564 for (r=arm64_rclob; *r>=0; r++)
565 if (e->fn->reg & BIT(*r)) {
566 s -= 2;
567 i = &(Ins){Oload, 0, TMP(*r), {SLOT(s)}};
568 i->cls = *r >= V0 ? Kd : Kl;
569 emitins(i, e);
570 }
571 if (e->fn->dynalloc)
572 fputs("\tmov sp, x29\n", e->f);
573 o = e->frame + 16;
574 if (e->fn->vararg && !T.apple)
575 o += 192;
576 if (o <= 504)
577 fprintf(e->f,
578 "\tldp\tx29, x30, [sp], %"PRIu64"\n",
579 o
580 );
581 else if (o - 16 <= 4095)
582 fprintf(e->f,
583 "\tldp\tx29, x30, [sp], 16\n"
584 "\tadd\tsp, sp, #%"PRIu64"\n",
585 o - 16
586 );
587 else if (o - 16 <= 65535)
588 fprintf(e->f,
589 "\tldp\tx29, x30, [sp], 16\n"
590 "\tmov\tx16, #%"PRIu64"\n"
591 "\tadd\tsp, sp, x16\n",
592 o - 16
593 );
594 else
595 fprintf(e->f,
596 "\tldp\tx29, x30, [sp], 16\n"
597 "\tmov\tx16, #%"PRIu64"\n"
598 "\tmovk\tx16, #%"PRIu64", lsl #16\n"
599 "\tadd\tsp, sp, x16\n",
600 (o - 16) & 0xFFFF, (o - 16) >> 16
601 );
602 fprintf(e->f, "\tret\n");
603 break;
604 case Jjmp:
605 Jmp:
606 if (b->s1 != b->link)
607 fprintf(e->f,
608 "\tb\t%s%d\n",
609 T.asloc, id0+b->s1->id
610 );
611 else
612 lbl = 0;
613 break;
614 default:
615 c = b->jmp.type - Jjf;
616 if (c < 0 || c > NCmp)
617 die("unhandled jump %d", b->jmp.type);
618 if (b->link == b->s2) {
619 t = b->s1;
620 b->s1 = b->s2;
621 b->s2 = t;
622 } else
623 c = cmpneg(c);
624 fprintf(e->f,
625 "\tb%s\t%s%d\n",
626 ctoa[c], T.asloc, id0+b->s2->id
627 );
628 goto Jmp;
629 }
630 }
631 id0 += e->fn->nblk;
632 }
QBE - Compiler Backend