fix various codegen bugs on arm64
[qbe.git] / amd64 / all.h
blob3a2db0e9868a2b4b747fd467fa0b2347c1ee1005
1 #include "../all.h"
3 typedef struct Amd64Op Amd64Op;
5 enum Amd64Reg {
6 RAX = RXX+1, /* caller-save */
7 RCX,
8 RDX,
9 RSI,
10 RDI,
11 R8,
12 R9,
13 R10,
14 R11,
16 RBX, /* callee-save */
17 R12,
18 R13,
19 R14,
20 R15,
22 RBP, /* globally live */
23 RSP,
25 XMM0, /* sse */
26 XMM1,
27 XMM2,
28 XMM3,
29 XMM4,
30 XMM5,
31 XMM6,
32 XMM7,
33 XMM8,
34 XMM9,
35 XMM10,
36 XMM11,
37 XMM12,
38 XMM13,
39 XMM14,
40 XMM15,
42 NFPR = XMM14 - XMM0 + 1, /* reserve XMM15 */
43 NGPR = RSP - RAX + 1,
44 NGPS = R11 - RAX + 1,
45 NFPS = NFPR,
46 NCLR = R15 - RBX + 1,
48 MAKESURE(reg_not_tmp, XMM15 < (int)Tmp0);
50 struct Amd64Op {
51 char nmem;
52 char zflag;
53 char lflag;
56 /* targ.c */
57 extern Amd64Op amd64_op[];
59 /* sysv.c (abi) */
60 extern int amd64_sysv_rsave[];
61 extern int amd64_sysv_rclob[];
62 bits amd64_sysv_retregs(Ref, int[2]);
63 bits amd64_sysv_argregs(Ref, int[2]);
64 void amd64_sysv_abi(Fn *);
66 /* isel.c */
67 void amd64_isel(Fn *);
69 /* emit.c */
70 void amd64_emitfn(Fn *, FILE *);