1 #ifndef QEMU_CACHE_UTILS_H
2 #define QEMU_CACHE_UTILS_H
5 struct qemu_cache_conf
{
6 unsigned long dcache_bsize
;
7 unsigned long icache_bsize
;
10 extern struct qemu_cache_conf qemu_cache_conf
;
12 void qemu_cache_utils_init(char **envp
);
14 /* mildly adjusted code from tcg-dyngen.c */
15 static inline void flush_icache_range(unsigned long start
, unsigned long stop
)
17 unsigned long p
, start1
, stop1
;
18 unsigned long dsize
= qemu_cache_conf
.dcache_bsize
;
19 unsigned long isize
= qemu_cache_conf
.icache_bsize
;
21 start1
= start
& ~(dsize
- 1);
22 stop1
= (stop
+ dsize
- 1) & ~(dsize
- 1);
23 for (p
= start1
; p
< stop1
; p
+= dsize
) {
24 asm volatile ("dcbst 0,%0" : : "r"(p
) : "memory");
26 asm volatile ("sync" : : : "memory");
28 start
&= start
& ~(isize
- 1);
29 stop1
= (stop
+ isize
- 1) & ~(isize
- 1);
30 for (p
= start1
; p
< stop1
; p
+= isize
) {
31 asm volatile ("icbi 0,%0" : : "r"(p
) : "memory");
33 asm volatile ("sync" : : : "memory");
34 asm volatile ("isync" : : : "memory");
38 * Is this correct for PPC?
40 static inline void dma_flush_range(unsigned long start
, unsigned long stop
)
44 #elif defined(__ia64__)
45 static inline void flush_icache_range(unsigned long start
, unsigned long stop
)
47 while (start
< stop
) {
48 asm volatile ("fc %0" :: "r"(start
));
51 asm volatile (";;sync.i;;srlz.i;;");
53 #define dma_flush_range(start, end) flush_icache_range(start, end)
54 #define qemu_cache_utils_init(envp) do { (void) (envp); } while (0)
56 static inline void dma_flush_range(unsigned long start
, unsigned long stop
)
59 #define qemu_cache_utils_init(envp) do { (void) (envp); } while (0)
62 #endif /* QEMU_CACHE_UTILS_H */