11 static void test_device_serial_write(void *opaque
, uint32_t addr
, uint32_t data
)
13 struct testdev
*dev
= opaque
;
14 uint8_t buf
[1] = { data
};
17 qemu_chr_write(dev
->chr
, buf
, 1);
21 static void test_device_exit(void *opaque
, uint32_t addr
, uint32_t data
)
26 static uint32_t test_device_memsize_read(void *opaque
, uint32_t addr
)
31 static void test_device_irq_line(void *opaque
, uint32_t addr
, uint32_t data
)
33 qemu_set_irq(isa_get_irq(addr
- 0x2000), !!data
);
36 static uint32 test_device_ioport_data
;
38 static void test_device_ioport_write(void *opaque
, uint32_t addr
, uint32_t data
)
40 test_device_ioport_data
= data
;
43 static uint32_t test_device_ioport_read(void *opaque
, uint32_t addr
)
45 return test_device_ioport_data
;
48 static void test_device_flush_page(void *opaque
, uint32_t addr
, uint32_t data
)
50 target_phys_addr_t len
= 4096;
51 void *a
= cpu_physical_memory_map(data
& ~0xffful
, &len
, 0);
53 mprotect(a
, 4096, PROT_NONE
);
54 mprotect(a
, 4096, PROT_READ
|PROT_WRITE
);
55 cpu_physical_memory_unmap(a
, len
, 0, 0);
58 static char *iomem_buf
;
60 static uint32_t test_iomem_readb(void *opaque
, target_phys_addr_t addr
)
62 return iomem_buf
[addr
];
65 static uint32_t test_iomem_readw(void *opaque
, target_phys_addr_t addr
)
67 return *(uint16_t*)(iomem_buf
+ addr
);
70 static uint32_t test_iomem_readl(void *opaque
, target_phys_addr_t addr
)
72 return *(uint32_t*)(iomem_buf
+ addr
);
75 static void test_iomem_writeb(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
77 iomem_buf
[addr
] = val
;
80 static void test_iomem_writew(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
82 *(uint16_t*)(iomem_buf
+ addr
) = val
;
85 static void test_iomem_writel(void *opaque
, target_phys_addr_t addr
, uint32_t val
)
87 *(uint32_t*)(iomem_buf
+ addr
) = val
;
90 static CPUReadMemoryFunc
* const test_iomem_read
[3] = {
96 static CPUWriteMemoryFunc
* const test_iomem_write
[3] = {
102 static int init_test_device(ISADevice
*isa
)
104 struct testdev
*dev
= DO_UPCAST(struct testdev
, dev
, isa
);
107 register_ioport_write(0xf1, 1, 1, test_device_serial_write
, dev
);
108 register_ioport_write(0xf4, 1, 4, test_device_exit
, dev
);
109 register_ioport_read(0xd1, 1, 4, test_device_memsize_read
, dev
);
110 register_ioport_read(0xe0, 1, 1, test_device_ioport_read
, dev
);
111 register_ioport_write(0xe0, 1, 1, test_device_ioport_write
, dev
);
112 register_ioport_read(0xe0, 1, 2, test_device_ioport_read
, dev
);
113 register_ioport_write(0xe0, 1, 2, test_device_ioport_write
, dev
);
114 register_ioport_read(0xe0, 1, 4, test_device_ioport_read
, dev
);
115 register_ioport_write(0xe0, 1, 4, test_device_ioport_write
, dev
);
116 register_ioport_write(0xe4, 1, 4, test_device_flush_page
, dev
);
117 register_ioport_write(0x2000, 24, 1, test_device_irq_line
, NULL
);
118 iomem_buf
= qemu_mallocz(0x10000);
119 iomem
= cpu_register_io_memory(test_iomem_read
, test_iomem_write
, NULL
,
120 DEVICE_NATIVE_ENDIAN
);
121 cpu_register_physical_memory(0xff000000, 0x10000, iomem
);
125 static ISADeviceInfo testdev_info
= {
126 .qdev
.name
= "testdev",
127 .qdev
.size
= sizeof(struct testdev
),
128 .init
= init_test_device
,
129 .qdev
.props
= (Property
[]) {
130 DEFINE_PROP_CHR("chardev", struct testdev
, chr
),
131 DEFINE_PROP_END_OF_LIST(),
135 static void testdev_register_devices(void)
137 isa_qdev_register(&testdev_info
);
140 device_init(testdev_register_devices
)