hw/ppc_chrp.c

   1 /*
   2  * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
   3  *
   4  * Copyright (c) 2004-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25 #include "hw.h"
  26 #include "ppc.h"
  27 #include "ppc_mac.h"
  28 #include "mac_dbdma.h"
  29 #include "nvram.h"
  30 #include "pc.h"
  31 #include "pci.h"
  32 #include "net.h"
  33 #include "sysemu.h"
  34 #include "boards.h"
  35 #include "escc.h"
  36
  37 #define MAX_IDE_BUS 2
  38
  39 /* UniN device */
  40 static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
  41 {
  42 }
  43
  44 static uint32_t unin_readl (void *opaque, target_phys_addr_t addr)
  45 {
  46     return 0;
  47 }
  48
  49 static CPUWriteMemoryFunc *unin_write[] = {
  50     &unin_writel,
  51     &unin_writel,
  52     &unin_writel,
  53 };
  54
  55 static CPUReadMemoryFunc *unin_read[] = {
  56     &unin_readl,
  57     &unin_readl,
  58     &unin_readl,
  59 };
  60
  61 /* PowerPC Mac99 hardware initialisation */
  62 static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
  63                              const char *boot_device,
  64                              const char *kernel_filename,
  65                              const char *kernel_cmdline,
  66                              const char *initrd_filename,
  67                              const char *cpu_model)
  68 {
  69     CPUState *env = NULL, *envs[MAX_CPUS];
  70     char buf[1024];
  71     qemu_irq *pic, **openpic_irqs;
  72     int unin_memory;
  73     int linux_boot, i;
  74     unsigned long bios_offset, vga_bios_offset;
  75     uint32_t kernel_base, kernel_size, initrd_base, initrd_size;
  76     PCIBus *pci_bus;
  77     nvram_t nvram;
  78 #if 0
  79     MacIONVRAMState *nvr;
  80     int nvram_mem_index;
  81 #endif
  82     m48t59_t *m48t59;
  83     int vga_bios_size, bios_size;
  84     qemu_irq *dummy_irq;
  85     int pic_mem_index, dbdma_mem_index, cuda_mem_index, escc_mem_index;
  86     int ide_mem_index[2];
  87     int ppc_boot_device;
  88     int index;
  89     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
  90     void *dbdma;
  91
  92     linux_boot = (kernel_filename != NULL);
  93
  94     /* init CPUs */
  95     if (cpu_model == NULL)
  96         cpu_model = "default";
  97     for (i = 0; i < smp_cpus; i++) {
  98         env = cpu_init(cpu_model);
  99         if (!env) {
 100             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 101             exit(1);
 102         }
 103         /* Set time-base frequency to 100 Mhz */
 104         cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL);
 105 #if 0
 106         env->osi_call = vga_osi_call;
 107 #endif
 108         qemu_register_reset(&cpu_ppc_reset, env);
 109         envs[i] = env;
 110     }
 111     if (env->nip < 0xFFF80000) {
 112         /* Special test for PowerPC 601:
 113          * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
 114          * But the NVRAM is located at 0xFFF04000...
 115          */
 116         cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
 117     }
 118
 119     /* allocate RAM */
 120     cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
 121
 122     /* allocate and load BIOS */
 123     bios_offset = ram_size + vga_ram_size;
 124     if (bios_name == NULL)
 125         bios_name = BIOS_FILENAME;
 126     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 127     bios_size = load_image(buf, phys_ram_base + bios_offset);
 128     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 129         cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
 130         exit(1);
 131     }
 132     bios_size = (bios_size + 0xfff) & ~0xfff;
 133     if (bios_size > 0x00080000) {
 134         /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
 135         cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
 136     }
 137     cpu_register_physical_memory((uint32_t)(-bios_size),
 138                                  bios_size, bios_offset | IO_MEM_ROM);
 139
 140     /* allocate and load VGA BIOS */
 141     vga_bios_offset = bios_offset + bios_size;
 142     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 143     vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
 144     if (vga_bios_size < 0) {
 145         /* if no bios is present, we can still work */
 146         fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
 147         vga_bios_size = 0;
 148     } else {
 149         /* set a specific header (XXX: find real Apple format for NDRV
 150            drivers) */
 151         phys_ram_base[vga_bios_offset] = 'N';
 152         phys_ram_base[vga_bios_offset + 1] = 'D';
 153         phys_ram_base[vga_bios_offset + 2] = 'R';
 154         phys_ram_base[vga_bios_offset + 3] = 'V';
 155         cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
 156                      vga_bios_size);
 157         vga_bios_size += 8;
 158     }
 159     vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff;
 160
 161     if (linux_boot) {
 162         kernel_base = KERNEL_LOAD_ADDR;
 163         /* now we can load the kernel */
 164         kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base);
 165         if (kernel_size < 0) {
 166             cpu_abort(env, "qemu: could not load kernel '%s'\n",
 167                       kernel_filename);
 168             exit(1);
 169         }
 170         /* load initrd */
 171         if (initrd_filename) {
 172             initrd_base = INITRD_LOAD_ADDR;
 173             initrd_size = load_image(initrd_filename,
 174                                      phys_ram_base + initrd_base);
 175             if (initrd_size < 0) {
 176                 cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
 177                           initrd_filename);
 178                 exit(1);
 179             }
 180         } else {
 181             initrd_base = 0;
 182             initrd_size = 0;
 183         }
 184         ppc_boot_device = 'm';
 185     } else {
 186         kernel_base = 0;
 187         kernel_size = 0;
 188         initrd_base = 0;
 189         initrd_size = 0;
 190         ppc_boot_device = '\0';
 191         /* We consider that NewWorld PowerMac never have any floppy drive
 192          * For now, OHW cannot boot from the network.
 193          */
 194         for (i = 0; boot_device[i] != '\0'; i++) {
 195             if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
 196                 ppc_boot_device = boot_device[i];
 197                 break;
 198             }
 199         }
 200         if (ppc_boot_device == '\0') {
 201             fprintf(stderr, "No valid boot device for Mac99 machine\n");
 202             exit(1);
 203         }
 204     }
 205
 206     isa_mem_base = 0x80000000;
 207
 208     /* Register 8 MB of ISA IO space */
 209     isa_mmio_init(0xf2000000, 0x00800000);
 210
 211     /* UniN init */
 212     unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL);
 213     cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory);
 214
 215     openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
 216     openpic_irqs[0] =
 217         qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 218     for (i = 0; i < smp_cpus; i++) {
 219         /* Mac99 IRQ connection between OpenPIC outputs pins
 220          * and PowerPC input pins
 221          */
 222         switch (PPC_INPUT(env)) {
 223         case PPC_FLAGS_INPUT_6xx:
 224             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 225             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 226                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 227             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 228                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 229             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 230                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
 231             /* Not connected ? */
 232             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 233             /* Check this */
 234             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 235                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
 236             break;
 237 #if defined(TARGET_PPC64)
 238         case PPC_FLAGS_INPUT_970:
 239             openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
 240             openpic_irqs[i][OPENPIC_OUTPUT_INT] =
 241                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 242             openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
 243                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
 244             openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
 245                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
 246             /* Not connected ? */
 247             openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
 248             /* Check this */
 249             openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
 250                 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
 251             break;
 252 #endif /* defined(TARGET_PPC64) */
 253         default:
 254             cpu_abort(env, "Bus model not supported on mac99 machine\n");
 255             exit(1);
 256         }
 257     }
 258     pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL);
 259     pci_bus = pci_pmac_init(pic);
 260     /* init basic PC hardware */
 261     pci_vga_init(pci_bus, phys_ram_base + ram_size,
 262                  ram_size, vga_ram_size,
 263                  vga_bios_offset, vga_bios_size);
 264
 265     /* XXX: suppress that */
 266     dummy_irq = i8259_init(NULL);
 267
 268     escc_mem_index = escc_init(0x80013000, dummy_irq[4], dummy_irq[5],
 269                                serial_hds[0], serial_hds[1], ESCC_CLOCK, 4);
 270
 271     for(i = 0; i < nb_nics; i++)
 272         pci_nic_init(pci_bus, &nd_table[i], -1, "ne2k_pci");
 273
 274     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
 275         fprintf(stderr, "qemu: too many IDE bus\n");
 276         exit(1);
 277     }
 278     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
 279         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
 280         if (index != -1)
 281             hd[i] = drives_table[index].bdrv;
 282         else
 283             hd[i] = NULL;
 284     }
 285     dbdma = DBDMA_init(&dbdma_mem_index);
 286 #if 1
 287     ide_mem_index[0] = pmac_ide_init(&hd[0], pic[0x13], dbdma, 0x14, pic[0x01]);
 288     ide_mem_index[1] = pmac_ide_init(&hd[2], pic[0x14], dbdma, 0x16, pic[0x02]);
 289 #else
 290     pci_cmd646_ide_init(pci_bus, &hd[0], 0);
 291 #endif
 292     /* cuda also initialize ADB */
 293     cuda_init(&cuda_mem_index, pic[0x19]);
 294
 295     adb_kbd_init(&adb_bus);
 296     adb_mouse_init(&adb_bus);
 297
 298
 299     macio_init(pci_bus, PCI_DEVICE_ID_APPLE_UNI_N_KEYL, 0, pic_mem_index,
 300                dbdma_mem_index, cuda_mem_index, NULL, 2, ide_mem_index,
 301                escc_mem_index);
 302
 303     if (usb_enabled) {
 304         usb_ohci_init_pci(pci_bus, 3, -1);
 305     }
 306
 307     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 308         graphic_depth = 15;
 309 #if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
 310     /* The NewWorld NVRAM is not located in the MacIO device */
 311     nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
 312     pmac_format_nvram_partition(nvr, 0x2000);
 313     macio_nvram_map(nvr, 0xFFF04000);
 314     nvram.opaque = nvr;
 315     nvram.read_fn = &macio_nvram_read;
 316     nvram.write_fn = &macio_nvram_write;
 317 #else
 318     m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59);
 319     nvram.opaque = m48t59;
 320     nvram.read_fn = &m48t59_read;
 321     nvram.write_fn = &m48t59_write;
 322 #endif
 323     PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
 324                          ppc_boot_device, kernel_base, kernel_size,
 325                          kernel_cmdline,
 326                          initrd_base, initrd_size,
 327                          /* XXX: need an option to load a NVRAM image */
 328                          0,
 329                          graphic_width, graphic_height, graphic_depth);
 330     /* No PCI init: the BIOS will do it */
 331
 332     /* Special port to get debug messages from Open-Firmware */
 333     register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL);
 334 }
 335
 336 QEMUMachine core99_machine = {
 337     .name = "mac99",
 338     .desc = "Mac99 based PowerMAC",
 339     .init = ppc_core99_init,
 340     .ram_require = BIOS_SIZE + VGA_RAM_SIZE,
 341     .max_cpus = MAX_CPUS,
 342 };