hw/virtio-pci.c

   1 /*
   2  * Virtio PCI Bindings
   3  *
   4  * Copyright IBM, Corp. 2007
   5  * Copyright (c) 2009 CodeSourcery
   6  *
   7  * Authors:
   8  *  Anthony Liguori   <aliguori@us.ibm.com>
   9  *  Paul Brook        <paul@codesourcery.com>
  10  *
  11  * This work is licensed under the terms of the GNU GPL, version 2.  See
  12  * the COPYING file in the top-level directory.
  13  *
  14  */
  15
  16 #include <inttypes.h>
  17
  18 #include "virtio.h"
  19 #include "pci.h"
  20 //#include "sysemu.h"
  21 #include "msix.h"
  22 #include "net.h"
  23
  24 /* from Linux's linux/virtio_pci.h */
  25
  26 /* A 32-bit r/o bitmask of the features supported by the host */
  27 #define VIRTIO_PCI_HOST_FEATURES        0
  28
  29 /* A 32-bit r/w bitmask of features activated by the guest */
  30 #define VIRTIO_PCI_GUEST_FEATURES       4
  31
  32 /* A 32-bit r/w PFN for the currently selected queue */
  33 #define VIRTIO_PCI_QUEUE_PFN            8
  34
  35 /* A 16-bit r/o queue size for the currently selected queue */
  36 #define VIRTIO_PCI_QUEUE_NUM            12
  37
  38 /* A 16-bit r/w queue selector */
  39 #define VIRTIO_PCI_QUEUE_SEL            14
  40
  41 /* A 16-bit r/w queue notifier */
  42 #define VIRTIO_PCI_QUEUE_NOTIFY         16
  43
  44 /* An 8-bit device status register.  */
  45 #define VIRTIO_PCI_STATUS               18
  46
  47 /* An 8-bit r/o interrupt status register.  Reading the value will return the
  48  * current contents of the ISR and will also clear it.  This is effectively
  49  * a read-and-acknowledge. */
  50 #define VIRTIO_PCI_ISR                  19
  51
  52 /* MSI-X registers: only enabled if MSI-X is enabled. */
  53 /* A 16-bit vector for configuration changes. */
  54 #define VIRTIO_MSI_CONFIG_VECTOR        20
  55 /* A 16-bit vector for selected queue notifications. */
  56 #define VIRTIO_MSI_QUEUE_VECTOR         22
  57
  58 /* Config space size */
  59 #define VIRTIO_PCI_CONFIG_NOMSI         20
  60 #define VIRTIO_PCI_CONFIG_MSI           24
  61 #define VIRTIO_PCI_REGION_SIZE(dev)     (msix_present(dev) ? \
  62                                          VIRTIO_PCI_CONFIG_MSI : \
  63                                          VIRTIO_PCI_CONFIG_NOMSI)
  64
  65 /* The remaining space is defined by each driver as the per-driver
  66  * configuration space */
  67 #define VIRTIO_PCI_CONFIG(dev)          (msix_enabled(dev) ? \
  68                                          VIRTIO_PCI_CONFIG_MSI : \
  69                                          VIRTIO_PCI_CONFIG_NOMSI)
  70
  71 /* Virtio ABI version, if we increment this, we break the guest driver. */
  72 #define VIRTIO_PCI_ABI_VERSION          0
  73
  74 /* How many bits to shift physical queue address written to QUEUE_PFN.
  75  * 12 is historical, and due to x86 page size. */
  76 #define VIRTIO_PCI_QUEUE_ADDR_SHIFT    12
  77
  78 /* QEMU doesn't strictly need write barriers since everything runs in
  79  * lock-step.  We'll leave the calls to wmb() in though to make it obvious for
  80  * KVM or if kqemu gets SMP support.
  81  */
  82 #define wmb() do { } while (0)
  83
  84 /* PCI bindings.  */
  85
  86 typedef struct {
  87     PCIDevice pci_dev;
  88     VirtIODevice *vdev;
  89     uint32_t addr;
  90     uint32_t class_code;
  91     uint32_t nvectors;
  92 } VirtIOPCIProxy;
  93
  94 /* virtio device */
  95
  96 static void virtio_pci_notify(void *opaque, uint16_t vector)
  97 {
  98     VirtIOPCIProxy *proxy = opaque;
  99     if (msix_enabled(&proxy->pci_dev))
 100         msix_notify(&proxy->pci_dev, vector);
 101     else
 102         qemu_set_irq(proxy->pci_dev.irq[0], proxy->vdev->isr & 1);
 103 }
 104
 105 static void virtio_pci_save_config(void * opaque, QEMUFile *f)
 106 {
 107     VirtIOPCIProxy *proxy = opaque;
 108     pci_device_save(&proxy->pci_dev, f);
 109     msix_save(&proxy->pci_dev, f);
 110     if (msix_present(&proxy->pci_dev))
 111         qemu_put_be16(f, proxy->vdev->config_vector);
 112 }
 113
 114 static void virtio_pci_save_queue(void * opaque, int n, QEMUFile *f)
 115 {
 116     VirtIOPCIProxy *proxy = opaque;
 117     if (msix_present(&proxy->pci_dev))
 118         qemu_put_be16(f, virtio_queue_vector(proxy->vdev, n));
 119 }
 120
 121 static int virtio_pci_load_config(void * opaque, QEMUFile *f)
 122 {
 123     VirtIOPCIProxy *proxy = opaque;
 124     int ret;
 125     ret = pci_device_load(&proxy->pci_dev, f);
 126     if (ret) {
 127         return ret;
 128     }
 129     msix_load(&proxy->pci_dev, f);
 130     if (msix_present(&proxy->pci_dev)) {
 131         qemu_get_be16s(f, &proxy->vdev->config_vector);
 132     } else {
 133         proxy->vdev->config_vector = VIRTIO_NO_VECTOR;
 134     }
 135     if (proxy->vdev->config_vector != VIRTIO_NO_VECTOR) {
 136         return msix_vector_use(&proxy->pci_dev, proxy->vdev->config_vector);
 137     }
 138     return 0;
 139 }
 140
 141 static int virtio_pci_load_queue(void * opaque, int n, QEMUFile *f)
 142 {
 143     VirtIOPCIProxy *proxy = opaque;
 144     uint16_t vector;
 145     if (msix_present(&proxy->pci_dev)) {
 146         qemu_get_be16s(f, &vector);
 147     } else {
 148         vector = VIRTIO_NO_VECTOR;
 149     }
 150     virtio_queue_set_vector(proxy->vdev, n, vector);
 151     if (vector != VIRTIO_NO_VECTOR) {
 152         return msix_vector_use(&proxy->pci_dev, vector);
 153     }
 154     return 0;
 155 }
 156
 157 static void virtio_pci_reset(void *opaque)
 158 {
 159     VirtIOPCIProxy *proxy = opaque;
 160     virtio_reset(proxy->vdev);
 161     msix_reset(&proxy->pci_dev);
 162 }
 163
 164 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
 165 {
 166     VirtIOPCIProxy *proxy = opaque;
 167     VirtIODevice *vdev = proxy->vdev;
 168     target_phys_addr_t pa;
 169
 170     switch (addr) {
 171     case VIRTIO_PCI_GUEST_FEATURES:
 172         /* Guest does not negotiate properly?  We have to assume nothing. */
 173         if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
 174             if (vdev->bad_features)
 175                 val = vdev->bad_features(vdev);
 176             else
 177                 val = 0;
 178         }
 179         if (vdev->set_features)
 180             vdev->set_features(vdev, val);
 181         vdev->features = val;
 182         break;
 183     case VIRTIO_PCI_QUEUE_PFN:
 184         pa = (target_phys_addr_t)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
 185         if (pa == 0)
 186             virtio_pci_reset(proxy);
 187         else
 188             virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
 189         break;
 190     case VIRTIO_PCI_QUEUE_SEL:
 191         if (val < VIRTIO_PCI_QUEUE_MAX)
 192             vdev->queue_sel = val;
 193         break;
 194     case VIRTIO_PCI_QUEUE_NOTIFY:
 195         virtio_queue_notify(vdev, val);
 196         break;
 197     case VIRTIO_PCI_STATUS:
 198         vdev->status = val & 0xFF;
 199         if (vdev->status == 0)
 200             virtio_pci_reset(proxy);
 201         break;
 202     case VIRTIO_MSI_CONFIG_VECTOR:
 203         msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
 204         /* Make it possible for guest to discover an error took place. */
 205         if (msix_vector_use(&proxy->pci_dev, val) < 0)
 206             val = VIRTIO_NO_VECTOR;
 207         vdev->config_vector = val;
 208         break;
 209     case VIRTIO_MSI_QUEUE_VECTOR:
 210         msix_vector_unuse(&proxy->pci_dev,
 211                           virtio_queue_vector(vdev, vdev->queue_sel));
 212         /* Make it possible for guest to discover an error took place. */
 213         if (msix_vector_use(&proxy->pci_dev, val) < 0)
 214             val = VIRTIO_NO_VECTOR;
 215         virtio_queue_set_vector(vdev, vdev->queue_sel, val);
 216         break;
 217     default:
 218         fprintf(stderr, "%s: unexpected address 0x%x value 0x%x\n",
 219                 __func__, addr, val);
 220         break;
 221     }
 222 }
 223
 224 static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
 225 {
 226     VirtIODevice *vdev = proxy->vdev;
 227     uint32_t ret = 0xFFFFFFFF;
 228
 229     switch (addr) {
 230     case VIRTIO_PCI_HOST_FEATURES:
 231         ret = vdev->get_features(vdev);
 232         ret |= (1 << VIRTIO_F_NOTIFY_ON_EMPTY);
 233         ret |= (1 << VIRTIO_RING_F_INDIRECT_DESC);
 234         ret |= (1 << VIRTIO_F_BAD_FEATURE);
 235         break;
 236     case VIRTIO_PCI_GUEST_FEATURES:
 237         ret = vdev->features;
 238         break;
 239     case VIRTIO_PCI_QUEUE_PFN:
 240         ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
 241               >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
 242         break;
 243     case VIRTIO_PCI_QUEUE_NUM:
 244         ret = virtio_queue_get_num(vdev, vdev->queue_sel);
 245         break;
 246     case VIRTIO_PCI_QUEUE_SEL:
 247         ret = vdev->queue_sel;
 248         break;
 249     case VIRTIO_PCI_STATUS:
 250         ret = vdev->status;
 251         break;
 252     case VIRTIO_PCI_ISR:
 253         /* reading from the ISR also clears it. */
 254         ret = vdev->isr;
 255         vdev->isr = 0;
 256         qemu_set_irq(proxy->pci_dev.irq[0], 0);
 257         break;
 258     case VIRTIO_MSI_CONFIG_VECTOR:
 259         ret = vdev->config_vector;
 260         break;
 261     case VIRTIO_MSI_QUEUE_VECTOR:
 262         ret = virtio_queue_vector(vdev, vdev->queue_sel);
 263         break;
 264     default:
 265         break;
 266     }
 267
 268     return ret;
 269 }
 270
 271 static uint32_t virtio_pci_config_readb(void *opaque, uint32_t addr)
 272 {
 273     VirtIOPCIProxy *proxy = opaque;
 274     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 275     addr -= proxy->addr;
 276     if (addr < config)
 277         return virtio_ioport_read(proxy, addr);
 278     addr -= config;
 279     return virtio_config_readb(proxy->vdev, addr);
 280 }
 281
 282 static uint32_t virtio_pci_config_readw(void *opaque, uint32_t addr)
 283 {
 284     VirtIOPCIProxy *proxy = opaque;
 285     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 286     addr -= proxy->addr;
 287     if (addr < config)
 288         return virtio_ioport_read(proxy, addr);
 289     addr -= config;
 290     return virtio_config_readw(proxy->vdev, addr);
 291 }
 292
 293 static uint32_t virtio_pci_config_readl(void *opaque, uint32_t addr)
 294 {
 295     VirtIOPCIProxy *proxy = opaque;
 296     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 297     addr -= proxy->addr;
 298     if (addr < config)
 299         return virtio_ioport_read(proxy, addr);
 300     addr -= config;
 301     return virtio_config_readl(proxy->vdev, addr);
 302 }
 303
 304 static void virtio_pci_config_writeb(void *opaque, uint32_t addr, uint32_t val)
 305 {
 306     VirtIOPCIProxy *proxy = opaque;
 307     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 308     addr -= proxy->addr;
 309     if (addr < config) {
 310         virtio_ioport_write(proxy, addr, val);
 311         return;
 312     }
 313     addr -= config;
 314     virtio_config_writeb(proxy->vdev, addr, val);
 315 }
 316
 317 static void virtio_pci_config_writew(void *opaque, uint32_t addr, uint32_t val)
 318 {
 319     VirtIOPCIProxy *proxy = opaque;
 320     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 321     addr -= proxy->addr;
 322     if (addr < config) {
 323         virtio_ioport_write(proxy, addr, val);
 324         return;
 325     }
 326     addr -= config;
 327     virtio_config_writew(proxy->vdev, addr, val);
 328 }
 329
 330 static void virtio_pci_config_writel(void *opaque, uint32_t addr, uint32_t val)
 331 {
 332     VirtIOPCIProxy *proxy = opaque;
 333     uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
 334     addr -= proxy->addr;
 335     if (addr < config) {
 336         virtio_ioport_write(proxy, addr, val);
 337         return;
 338     }
 339     addr -= config;
 340     virtio_config_writel(proxy->vdev, addr, val);
 341 }
 342
 343 static void virtio_map(PCIDevice *pci_dev, int region_num,
 344                        uint32_t addr, uint32_t size, int type)
 345 {
 346     VirtIOPCIProxy *proxy = container_of(pci_dev, VirtIOPCIProxy, pci_dev);
 347     VirtIODevice *vdev = proxy->vdev;
 348     unsigned config_len = VIRTIO_PCI_REGION_SIZE(pci_dev) + vdev->config_len;
 349
 350     proxy->addr = addr;
 351
 352     register_ioport_write(addr, config_len, 1, virtio_pci_config_writeb, proxy);
 353     register_ioport_write(addr, config_len, 2, virtio_pci_config_writew, proxy);
 354     register_ioport_write(addr, config_len, 4, virtio_pci_config_writel, proxy);
 355     register_ioport_read(addr, config_len, 1, virtio_pci_config_readb, proxy);
 356     register_ioport_read(addr, config_len, 2, virtio_pci_config_readw, proxy);
 357     register_ioport_read(addr, config_len, 4, virtio_pci_config_readl, proxy);
 358
 359     if (vdev->config_len)
 360         vdev->get_config(vdev, vdev->config);
 361 }
 362
 363 static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
 364                                 uint32_t val, int len)
 365 {
 366     pci_default_write_config(pci_dev, address, val, len);
 367     msix_write_config(pci_dev, address, val, len);
 368 }
 369
 370 static const VirtIOBindings virtio_pci_bindings = {
 371     .notify = virtio_pci_notify,
 372     .save_config = virtio_pci_save_config,
 373     .load_config = virtio_pci_load_config,
 374     .save_queue = virtio_pci_save_queue,
 375     .load_queue = virtio_pci_load_queue,
 376 };
 377
 378 static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev,
 379                             uint16_t vendor, uint16_t device,
 380                             uint16_t class_code, uint8_t pif)
 381 {
 382     uint8_t *config;
 383     uint32_t size;
 384
 385     proxy->vdev = vdev;
 386
 387     config = proxy->pci_dev.config;
 388     pci_config_set_vendor_id(config, vendor);
 389     pci_config_set_device_id(config, device);
 390
 391     config[0x08] = VIRTIO_PCI_ABI_VERSION;
 392
 393     config[0x09] = pif;
 394     pci_config_set_class(config, class_code);
 395     config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL;
 396
 397     config[0x2c] = vendor & 0xFF;
 398     config[0x2d] = (vendor >> 8) & 0xFF;
 399     config[0x2e] = vdev->device_id & 0xFF;
 400     config[0x2f] = (vdev->device_id >> 8) & 0xFF;
 401
 402     config[0x3d] = 1;
 403
 404     if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, 1, 0)) {
 405         pci_register_bar(&proxy->pci_dev, 1,
 406                          msix_bar_size(&proxy->pci_dev),
 407                          PCI_ADDRESS_SPACE_MEM,
 408                          msix_mmio_map);
 409         proxy->pci_dev.config_write = virtio_write_config;
 410         proxy->pci_dev.unregister = msix_uninit;
 411     } else
 412         vdev->nvectors = 0;
 413
 414     size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) + vdev->config_len;
 415     if (size & (size-1))
 416         size = 1 << qemu_fls(size);
 417
 418     pci_register_bar(&proxy->pci_dev, 0, size, PCI_ADDRESS_SPACE_IO,
 419                            virtio_map);
 420
 421     qemu_register_reset(virtio_pci_reset, proxy);
 422
 423     virtio_bind_device(vdev, &virtio_pci_bindings, proxy);
 424 }
 425
 426 static void virtio_blk_init_pci(PCIDevice *pci_dev)
 427 {
 428     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 429     VirtIODevice *vdev;
 430
 431     if (proxy->class_code != PCI_CLASS_STORAGE_SCSI &&
 432         proxy->class_code != PCI_CLASS_STORAGE_OTHER)
 433         proxy->class_code = PCI_CLASS_STORAGE_SCSI;
 434
 435     vdev = virtio_blk_init(&pci_dev->qdev);
 436     virtio_init_pci(proxy, vdev,
 437                     PCI_VENDOR_ID_REDHAT_QUMRANET,
 438                     PCI_DEVICE_ID_VIRTIO_BLOCK,
 439                     proxy->class_code, 0x00);
 440 }
 441
 442 static void virtio_console_init_pci(PCIDevice *pci_dev)
 443 {
 444     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 445     VirtIODevice *vdev;
 446
 447     if (proxy->class_code != PCI_CLASS_COMMUNICATION_OTHER &&
 448         proxy->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */
 449         proxy->class_code != PCI_CLASS_OTHERS)          /* qemu-kvm  */
 450         proxy->class_code = PCI_CLASS_COMMUNICATION_OTHER;
 451
 452     vdev = virtio_console_init(&pci_dev->qdev);
 453     virtio_init_pci(proxy, vdev,
 454                     PCI_VENDOR_ID_REDHAT_QUMRANET,
 455                     PCI_DEVICE_ID_VIRTIO_CONSOLE,
 456                     proxy->class_code, 0x00);
 457 }
 458
 459 static void virtio_net_init_pci(PCIDevice *pci_dev)
 460 {
 461     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 462     VirtIODevice *vdev;
 463
 464     vdev = virtio_net_init(&pci_dev->qdev);
 465
 466     /* set nvectors from property, unless the user specified something
 467      * via -net nic,model=virtio,vectors=n command line option */
 468     if (pci_dev->qdev.nd->nvectors == NIC_NVECTORS_UNSPECIFIED)
 469         if (proxy->nvectors != NIC_NVECTORS_UNSPECIFIED)
 470             vdev->nvectors = proxy->nvectors;
 471
 472     virtio_init_pci(proxy, vdev,
 473                     PCI_VENDOR_ID_REDHAT_QUMRANET,
 474                     PCI_DEVICE_ID_VIRTIO_NET,
 475                     PCI_CLASS_NETWORK_ETHERNET,
 476                     0x00);
 477
 478     /* make the actual value visible */
 479     proxy->nvectors = vdev->nvectors;
 480 }
 481
 482 static void virtio_balloon_init_pci(PCIDevice *pci_dev)
 483 {
 484     VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
 485     VirtIODevice *vdev;
 486
 487     vdev = virtio_balloon_init(&pci_dev->qdev);
 488     virtio_init_pci(proxy, vdev,
 489                     PCI_VENDOR_ID_REDHAT_QUMRANET,
 490                     PCI_DEVICE_ID_VIRTIO_BALLOON,
 491                     PCI_CLASS_MEMORY_RAM,
 492                     0x00);
 493 }
 494
 495 static PCIDeviceInfo virtio_info[] = {
 496     {
 497         .qdev.name = "virtio-blk-pci",
 498         .qdev.size = sizeof(VirtIOPCIProxy),
 499         .init      = virtio_blk_init_pci,
 500         .qdev.props = (Property[]) {
 501             {
 502                 .name   = "class",
 503                 .info   = &qdev_prop_hex32,
 504                 .offset = offsetof(VirtIOPCIProxy, class_code),
 505             },
 506             {/* end of list */}
 507         },
 508     },{
 509         .qdev.name  = "virtio-net-pci",
 510         .qdev.size  = sizeof(VirtIOPCIProxy),
 511         .init       = virtio_net_init_pci,
 512         .qdev.props = (Property[]) {
 513             {
 514                 .name   = "vectors",
 515                 .info   = &qdev_prop_uint32,
 516                 .offset = offsetof(VirtIOPCIProxy, nvectors),
 517                 .defval = (uint32_t[]) { NIC_NVECTORS_UNSPECIFIED },
 518             },
 519             {/* end of list */}
 520         },
 521     },{
 522         .qdev.name = "virtio-console-pci",
 523         .qdev.size = sizeof(VirtIOPCIProxy),
 524         .init      = virtio_console_init_pci,
 525         .qdev.props = (Property[]) {
 526             {
 527                 .name   = "class",
 528                 .info   = &qdev_prop_hex32,
 529                 .offset = offsetof(VirtIOPCIProxy, class_code),
 530             },
 531             {/* end of list */}
 532         },
 533     },{
 534         .qdev.name = "virtio-balloon-pci",
 535         .qdev.size = sizeof(VirtIOPCIProxy),
 536         .init      = virtio_balloon_init_pci,
 537     },{
 538         /* end of list */
 539     }
 540 };
 541
 542 static void virtio_pci_register_devices(void)
 543 {
 544     pci_qdev_register_many(virtio_info);
 545 }
 546
 547 device_init(virtio_pci_register_devices)