gdbstub.c

   1 /*
   2  * gdb server stub
   3  *
   4  * Copyright (c) 2003-2005 Fabrice Bellard
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA
  19  */
  20 #include "config.h"
  21 #include "qemu-common.h"
  22 #ifdef CONFIG_USER_ONLY
  23 #include <stdlib.h>
  24 #include <stdio.h>
  25 #include <stdarg.h>
  26 #include <string.h>
  27 #include <errno.h>
  28 #include <unistd.h>
  29 #include <fcntl.h>
  30
  31 #include "qemu.h"
  32 #else
  33 #include "qemu-char.h"
  34 #include "sysemu.h"
  35 #include "gdbstub.h"
  36 #include "qemu-kvm.h"
  37 #endif
  38
  39 #define MAX_PACKET_LENGTH 4096
  40
  41 #include "qemu_socket.h"
  42
  43
  44 enum {
  45     GDB_SIGNAL_0 = 0,
  46     GDB_SIGNAL_INT = 2,
  47     GDB_SIGNAL_TRAP = 5,
  48     GDB_SIGNAL_UNKNOWN = 143
  49 };
  50
  51 #ifdef CONFIG_USER_ONLY
  52
  53 /* Map target signal numbers to GDB protocol signal numbers and vice
  54  * versa.  For user emulation's currently supported systems, we can
  55  * assume most signals are defined.
  56  */
  57
  58 static int gdb_signal_table[] = {
  59     0,
  60     TARGET_SIGHUP,
  61     TARGET_SIGINT,
  62     TARGET_SIGQUIT,
  63     TARGET_SIGILL,
  64     TARGET_SIGTRAP,
  65     TARGET_SIGABRT,
  66     -1, /* SIGEMT */
  67     TARGET_SIGFPE,
  68     TARGET_SIGKILL,
  69     TARGET_SIGBUS,
  70     TARGET_SIGSEGV,
  71     TARGET_SIGSYS,
  72     TARGET_SIGPIPE,
  73     TARGET_SIGALRM,
  74     TARGET_SIGTERM,
  75     TARGET_SIGURG,
  76     TARGET_SIGSTOP,
  77     TARGET_SIGTSTP,
  78     TARGET_SIGCONT,
  79     TARGET_SIGCHLD,
  80     TARGET_SIGTTIN,
  81     TARGET_SIGTTOU,
  82     TARGET_SIGIO,
  83     TARGET_SIGXCPU,
  84     TARGET_SIGXFSZ,
  85     TARGET_SIGVTALRM,
  86     TARGET_SIGPROF,
  87     TARGET_SIGWINCH,
  88     -1, /* SIGLOST */
  89     TARGET_SIGUSR1,
  90     TARGET_SIGUSR2,
  91     TARGET_SIGPWR,
  92     -1, /* SIGPOLL */
  93     -1,
  94     -1,
  95     -1,
  96     -1,
  97     -1,
  98     -1,
  99     -1,
 100     -1,
 101     -1,
 102     -1,
 103     -1,
 104     __SIGRTMIN + 1,
 105     __SIGRTMIN + 2,
 106     __SIGRTMIN + 3,
 107     __SIGRTMIN + 4,
 108     __SIGRTMIN + 5,
 109     __SIGRTMIN + 6,
 110     __SIGRTMIN + 7,
 111     __SIGRTMIN + 8,
 112     __SIGRTMIN + 9,
 113     __SIGRTMIN + 10,
 114     __SIGRTMIN + 11,
 115     __SIGRTMIN + 12,
 116     __SIGRTMIN + 13,
 117     __SIGRTMIN + 14,
 118     __SIGRTMIN + 15,
 119     __SIGRTMIN + 16,
 120     __SIGRTMIN + 17,
 121     __SIGRTMIN + 18,
 122     __SIGRTMIN + 19,
 123     __SIGRTMIN + 20,
 124     __SIGRTMIN + 21,
 125     __SIGRTMIN + 22,
 126     __SIGRTMIN + 23,
 127     __SIGRTMIN + 24,
 128     __SIGRTMIN + 25,
 129     __SIGRTMIN + 26,
 130     __SIGRTMIN + 27,
 131     __SIGRTMIN + 28,
 132     __SIGRTMIN + 29,
 133     __SIGRTMIN + 30,
 134     __SIGRTMIN + 31,
 135     -1, /* SIGCANCEL */
 136     __SIGRTMIN,
 137     __SIGRTMIN + 32,
 138     __SIGRTMIN + 33,
 139     __SIGRTMIN + 34,
 140     __SIGRTMIN + 35,
 141     __SIGRTMIN + 36,
 142     __SIGRTMIN + 37,
 143     __SIGRTMIN + 38,
 144     __SIGRTMIN + 39,
 145     __SIGRTMIN + 40,
 146     __SIGRTMIN + 41,
 147     __SIGRTMIN + 42,
 148     __SIGRTMIN + 43,
 149     __SIGRTMIN + 44,
 150     __SIGRTMIN + 45,
 151     __SIGRTMIN + 46,
 152     __SIGRTMIN + 47,
 153     __SIGRTMIN + 48,
 154     __SIGRTMIN + 49,
 155     __SIGRTMIN + 50,
 156     __SIGRTMIN + 51,
 157     __SIGRTMIN + 52,
 158     __SIGRTMIN + 53,
 159     __SIGRTMIN + 54,
 160     __SIGRTMIN + 55,
 161     __SIGRTMIN + 56,
 162     __SIGRTMIN + 57,
 163     __SIGRTMIN + 58,
 164     __SIGRTMIN + 59,
 165     __SIGRTMIN + 60,
 166     __SIGRTMIN + 61,
 167     __SIGRTMIN + 62,
 168     __SIGRTMIN + 63,
 169     __SIGRTMIN + 64,
 170     __SIGRTMIN + 65,
 171     __SIGRTMIN + 66,
 172     __SIGRTMIN + 67,
 173     __SIGRTMIN + 68,
 174     __SIGRTMIN + 69,
 175     __SIGRTMIN + 70,
 176     __SIGRTMIN + 71,
 177     __SIGRTMIN + 72,
 178     __SIGRTMIN + 73,
 179     __SIGRTMIN + 74,
 180     __SIGRTMIN + 75,
 181     __SIGRTMIN + 76,
 182     __SIGRTMIN + 77,
 183     __SIGRTMIN + 78,
 184     __SIGRTMIN + 79,
 185     __SIGRTMIN + 80,
 186     __SIGRTMIN + 81,
 187     __SIGRTMIN + 82,
 188     __SIGRTMIN + 83,
 189     __SIGRTMIN + 84,
 190     __SIGRTMIN + 85,
 191     __SIGRTMIN + 86,
 192     __SIGRTMIN + 87,
 193     __SIGRTMIN + 88,
 194     __SIGRTMIN + 89,
 195     __SIGRTMIN + 90,
 196     __SIGRTMIN + 91,
 197     __SIGRTMIN + 92,
 198     __SIGRTMIN + 93,
 199     __SIGRTMIN + 94,
 200     __SIGRTMIN + 95,
 201     -1, /* SIGINFO */
 202     -1, /* UNKNOWN */
 203     -1, /* DEFAULT */
 204     -1,
 205     -1,
 206     -1,
 207     -1,
 208     -1,
 209     -1
 210 };
 211 #else
 212 /* In system mode we only need SIGINT and SIGTRAP; other signals
 213    are not yet supported.  */
 214
 215 enum {
 216     TARGET_SIGINT = 2,
 217     TARGET_SIGTRAP = 5
 218 };
 219
 220 static int gdb_signal_table[] = {
 221     -1,
 222     -1,
 223     TARGET_SIGINT,
 224     -1,
 225     -1,
 226     TARGET_SIGTRAP
 227 };
 228 #endif
 229
 230 #ifdef CONFIG_USER_ONLY
 231 static int target_signal_to_gdb (int sig)
 232 {
 233     int i;
 234     for (i = 0; i < ARRAY_SIZE (gdb_signal_table); i++)
 235         if (gdb_signal_table[i] == sig)
 236             return i;
 237     return GDB_SIGNAL_UNKNOWN;
 238 }
 239 #endif
 240
 241 static int gdb_signal_to_target (int sig)
 242 {
 243     if (sig < ARRAY_SIZE (gdb_signal_table))
 244         return gdb_signal_table[sig];
 245     else
 246         return -1;
 247 }
 248
 249 //#define DEBUG_GDB
 250
 251 typedef struct GDBRegisterState {
 252     int base_reg;
 253     int num_regs;
 254     gdb_reg_cb get_reg;
 255     gdb_reg_cb set_reg;
 256     const char *xml;
 257     struct GDBRegisterState *next;
 258 } GDBRegisterState;
 259
 260 enum RSState {
 261     RS_IDLE,
 262     RS_GETLINE,
 263     RS_CHKSUM1,
 264     RS_CHKSUM2,
 265     RS_SYSCALL,
 266 };
 267 typedef struct GDBState {
 268     CPUState *c_cpu; /* current CPU for step/continue ops */
 269     CPUState *g_cpu; /* current CPU for other ops */
 270     CPUState *query_cpu; /* for q{f|s}ThreadInfo */
 271     enum RSState state; /* parsing state */
 272     char line_buf[MAX_PACKET_LENGTH];
 273     int line_buf_index;
 274     int line_csum;
 275     uint8_t last_packet[MAX_PACKET_LENGTH + 4];
 276     int last_packet_len;
 277     int signal;
 278 #ifdef CONFIG_USER_ONLY
 279     int fd;
 280     int running_state;
 281 #else
 282     CharDriverState *chr;
 283 #endif
 284 } GDBState;
 285
 286 /* By default use no IRQs and no timers while single stepping so as to
 287  * make single stepping like an ICE HW step.
 288  */
 289 static int sstep_flags = SSTEP_ENABLE|SSTEP_NOIRQ|SSTEP_NOTIMER;
 290
 291 static GDBState *gdbserver_state;
 292
 293 /* This is an ugly hack to cope with both new and old gdb.
 294    If gdb sends qXfer:features:read then assume we're talking to a newish
 295    gdb that understands target descriptions.  */
 296 static int gdb_has_xml;
 297
 298 #ifdef CONFIG_USER_ONLY
 299 /* XXX: This is not thread safe.  Do we care?  */
 300 static int gdbserver_fd = -1;
 301
 302 static int get_char(GDBState *s)
 303 {
 304     uint8_t ch;
 305     int ret;
 306
 307     for(;;) {
 308         ret = recv(s->fd, &ch, 1, 0);
 309         if (ret < 0) {
 310             if (errno == ECONNRESET)
 311                 s->fd = -1;
 312             if (errno != EINTR && errno != EAGAIN)
 313                 return -1;
 314         } else if (ret == 0) {
 315             close(s->fd);
 316             s->fd = -1;
 317             return -1;
 318         } else {
 319             break;
 320         }
 321     }
 322     return ch;
 323 }
 324 #endif
 325
 326 static gdb_syscall_complete_cb gdb_current_syscall_cb;
 327
 328 enum {
 329     GDB_SYS_UNKNOWN,
 330     GDB_SYS_ENABLED,
 331     GDB_SYS_DISABLED,
 332 } gdb_syscall_mode;
 333
 334 /* If gdb is connected when the first semihosting syscall occurs then use
 335    remote gdb syscalls.  Otherwise use native file IO.  */
 336 int use_gdb_syscalls(void)
 337 {
 338     if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
 339         gdb_syscall_mode = (gdbserver_state ? GDB_SYS_ENABLED
 340                                             : GDB_SYS_DISABLED);
 341     }
 342     return gdb_syscall_mode == GDB_SYS_ENABLED;
 343 }
 344
 345 /* Resume execution.  */
 346 static inline void gdb_continue(GDBState *s)
 347 {
 348 #ifdef CONFIG_USER_ONLY
 349     s->running_state = 1;
 350 #else
 351     vm_start();
 352 #endif
 353 }
 354
 355 static void put_buffer(GDBState *s, const uint8_t *buf, int len)
 356 {
 357 #ifdef CONFIG_USER_ONLY
 358     int ret;
 359
 360     while (len > 0) {
 361         ret = send(s->fd, buf, len, 0);
 362         if (ret < 0) {
 363             if (errno != EINTR && errno != EAGAIN)
 364                 return;
 365         } else {
 366             buf += ret;
 367             len -= ret;
 368         }
 369     }
 370 #else
 371     qemu_chr_write(s->chr, buf, len);
 372 #endif
 373 }
 374
 375 static inline int fromhex(int v)
 376 {
 377     if (v >= '0' && v <= '9')
 378         return v - '0';
 379     else if (v >= 'A' && v <= 'F')
 380         return v - 'A' + 10;
 381     else if (v >= 'a' && v <= 'f')
 382         return v - 'a' + 10;
 383     else
 384         return 0;
 385 }
 386
 387 static inline int tohex(int v)
 388 {
 389     if (v < 10)
 390         return v + '0';
 391     else
 392         return v - 10 + 'a';
 393 }
 394
 395 static void memtohex(char *buf, const uint8_t *mem, int len)
 396 {
 397     int i, c;
 398     char *q;
 399     q = buf;
 400     for(i = 0; i < len; i++) {
 401         c = mem[i];
 402         *q++ = tohex(c >> 4);
 403         *q++ = tohex(c & 0xf);
 404     }
 405     *q = '\0';
 406 }
 407
 408 static void hextomem(uint8_t *mem, const char *buf, int len)
 409 {
 410     int i;
 411
 412     for(i = 0; i < len; i++) {
 413         mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
 414         buf += 2;
 415     }
 416 }
 417
 418 /* return -1 if error, 0 if OK */
 419 static int put_packet_binary(GDBState *s, const char *buf, int len)
 420 {
 421     int csum, i;
 422     uint8_t *p;
 423
 424     for(;;) {
 425         p = s->last_packet;
 426         *(p++) = '$';
 427         memcpy(p, buf, len);
 428         p += len;
 429         csum = 0;
 430         for(i = 0; i < len; i++) {
 431             csum += buf[i];
 432         }
 433         *(p++) = '#';
 434         *(p++) = tohex((csum >> 4) & 0xf);
 435         *(p++) = tohex((csum) & 0xf);
 436
 437         s->last_packet_len = p - s->last_packet;
 438         put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
 439
 440 #ifdef CONFIG_USER_ONLY
 441         i = get_char(s);
 442         if (i < 0)
 443             return -1;
 444         if (i == '+')
 445             break;
 446 #else
 447         break;
 448 #endif
 449     }
 450     return 0;
 451 }
 452
 453 /* return -1 if error, 0 if OK */
 454 static int put_packet(GDBState *s, const char *buf)
 455 {
 456 #ifdef DEBUG_GDB
 457     printf("reply='%s'\n", buf);
 458 #endif
 459
 460     return put_packet_binary(s, buf, strlen(buf));
 461 }
 462
 463 /* The GDB remote protocol transfers values in target byte order.  This means
 464    we can use the raw memory access routines to access the value buffer.
 465    Conveniently, these also handle the case where the buffer is mis-aligned.
 466  */
 467 #define GET_REG8(val) do { \
 468     stb_p(mem_buf, val); \
 469     return 1; \
 470     } while(0)
 471 #define GET_REG16(val) do { \
 472     stw_p(mem_buf, val); \
 473     return 2; \
 474     } while(0)
 475 #define GET_REG32(val) do { \
 476     stl_p(mem_buf, val); \
 477     return 4; \
 478     } while(0)
 479 #define GET_REG64(val) do { \
 480     stq_p(mem_buf, val); \
 481     return 8; \
 482     } while(0)
 483
 484 #if TARGET_LONG_BITS == 64
 485 #define GET_REGL(val) GET_REG64(val)
 486 #define ldtul_p(addr) ldq_p(addr)
 487 #else
 488 #define GET_REGL(val) GET_REG32(val)
 489 #define ldtul_p(addr) ldl_p(addr)
 490 #endif
 491
 492 #if defined(TARGET_I386)
 493
 494 #ifdef TARGET_X86_64
 495 static const int gpr_map[16] = {
 496     R_EAX, R_EBX, R_ECX, R_EDX, R_ESI, R_EDI, R_EBP, R_ESP,
 497     8, 9, 10, 11, 12, 13, 14, 15
 498 };
 499 #else
 500 static const int gpr_map[8] = {0, 1, 2, 3, 4, 5, 6, 7};
 501 #endif
 502
 503 #define NUM_CORE_REGS (CPU_NB_REGS * 2 + 25)
 504
 505 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 506 {
 507     if (n < CPU_NB_REGS) {
 508         GET_REGL(env->regs[gpr_map[n]]);
 509     } else if (n >= CPU_NB_REGS + 8 && n < CPU_NB_REGS + 16) {
 510         /* FIXME: byteswap float values.  */
 511 #ifdef USE_X86LDOUBLE
 512         memcpy(mem_buf, &env->fpregs[n - (CPU_NB_REGS + 8)], 10);
 513 #else
 514         memset(mem_buf, 0, 10);
 515 #endif
 516         return 10;
 517     } else if (n >= CPU_NB_REGS + 24) {
 518         n -= CPU_NB_REGS + 24;
 519         if (n < CPU_NB_REGS) {
 520             stq_p(mem_buf, env->xmm_regs[n].XMM_Q(0));
 521             stq_p(mem_buf + 8, env->xmm_regs[n].XMM_Q(1));
 522             return 16;
 523         } else if (n == CPU_NB_REGS) {
 524             GET_REG32(env->mxcsr);
 525         }
 526     } else {
 527         n -= CPU_NB_REGS;
 528         switch (n) {
 529         case 0: GET_REGL(env->eip);
 530         case 1: GET_REG32(env->eflags);
 531         case 2: GET_REG32(env->segs[R_CS].selector);
 532         case 3: GET_REG32(env->segs[R_SS].selector);
 533         case 4: GET_REG32(env->segs[R_DS].selector);
 534         case 5: GET_REG32(env->segs[R_ES].selector);
 535         case 6: GET_REG32(env->segs[R_FS].selector);
 536         case 7: GET_REG32(env->segs[R_GS].selector);
 537         /* 8...15 x87 regs.  */
 538         case 16: GET_REG32(env->fpuc);
 539         case 17: GET_REG32((env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11);
 540         case 18: GET_REG32(0); /* ftag */
 541         case 19: GET_REG32(0); /* fiseg */
 542         case 20: GET_REG32(0); /* fioff */
 543         case 21: GET_REG32(0); /* foseg */
 544         case 22: GET_REG32(0); /* fooff */
 545         case 23: GET_REG32(0); /* fop */
 546         /* 24+ xmm regs.  */
 547         }
 548     }
 549     return 0;
 550 }
 551
 552 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int i)
 553 {
 554     uint32_t tmp;
 555
 556     if (i < CPU_NB_REGS) {
 557         env->regs[gpr_map[i]] = ldtul_p(mem_buf);
 558         return sizeof(target_ulong);
 559     } else if (i >= CPU_NB_REGS + 8 && i < CPU_NB_REGS + 16) {
 560         i -= CPU_NB_REGS + 8;
 561 #ifdef USE_X86LDOUBLE
 562         memcpy(&env->fpregs[i], mem_buf, 10);
 563 #endif
 564         return 10;
 565     } else if (i >= CPU_NB_REGS + 24) {
 566         i -= CPU_NB_REGS + 24;
 567         if (i < CPU_NB_REGS) {
 568             env->xmm_regs[i].XMM_Q(0) = ldq_p(mem_buf);
 569             env->xmm_regs[i].XMM_Q(1) = ldq_p(mem_buf + 8);
 570             return 16;
 571         } else if (i == CPU_NB_REGS) {
 572             env->mxcsr = ldl_p(mem_buf);
 573             return 4;
 574         }
 575     } else {
 576         i -= CPU_NB_REGS;
 577         switch (i) {
 578         case 0: env->eip = ldtul_p(mem_buf); return sizeof(target_ulong);
 579         case 1: env->eflags = ldl_p(mem_buf); return 4;
 580 #if defined(CONFIG_USER_ONLY)
 581 #define LOAD_SEG(index, sreg)\
 582             tmp = ldl_p(mem_buf);\
 583             if (tmp != env->segs[sreg].selector)\
 584                 cpu_x86_load_seg(env, sreg, tmp);
 585 #else
 586 /* FIXME: Honor segment registers.  Needs to avoid raising an exception
 587    when the selector is invalid.  */
 588 #define LOAD_SEG(index, sreg) do {} while(0)
 589 #endif
 590         case 2: LOAD_SEG(10, R_CS); return 4;
 591         case 3: LOAD_SEG(11, R_SS); return 4;
 592         case 4: LOAD_SEG(12, R_DS); return 4;
 593         case 5: LOAD_SEG(13, R_ES); return 4;
 594         case 6: LOAD_SEG(14, R_FS); return 4;
 595         case 7: LOAD_SEG(15, R_GS); return 4;
 596         /* 8...15 x87 regs.  */
 597         case 16: env->fpuc = ldl_p(mem_buf); return 4;
 598         case 17:
 599                  tmp = ldl_p(mem_buf);
 600                  env->fpstt = (tmp >> 11) & 7;
 601                  env->fpus = tmp & ~0x3800;
 602                  return 4;
 603         case 18: /* ftag */ return 4;
 604         case 19: /* fiseg */ return 4;
 605         case 20: /* fioff */ return 4;
 606         case 21: /* foseg */ return 4;
 607         case 22: /* fooff */ return 4;
 608         case 23: /* fop */ return 4;
 609         /* 24+ xmm regs.  */
 610         }
 611     }
 612     /* Unrecognised register.  */
 613     return 0;
 614 }
 615
 616 #elif defined (TARGET_PPC)
 617
 618 #define NUM_CORE_REGS 71
 619
 620 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 621 {
 622     if (n < 32) {
 623         /* gprs */
 624         GET_REGL(env->gpr[n]);
 625     } else if (n < 64) {
 626         /* fprs */
 627         stfq_p(mem_buf, env->fpr[n-32]);
 628         return 8;
 629     } else {
 630         switch (n) {
 631         case 64: GET_REGL(env->nip);
 632         case 65: GET_REGL(env->msr);
 633         case 66:
 634             {
 635                 uint32_t cr = 0;
 636                 int i;
 637                 for (i = 0; i < 8; i++)
 638                     cr |= env->crf[i] << (32 - ((i + 1) * 4));
 639                 GET_REG32(cr);
 640             }
 641         case 67: GET_REGL(env->lr);
 642         case 68: GET_REGL(env->ctr);
 643         case 69: GET_REGL(env->xer);
 644         case 70: GET_REG32(0); /* fpscr */
 645         }
 646     }
 647     return 0;
 648 }
 649
 650 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 651 {
 652     if (n < 32) {
 653         /* gprs */
 654         env->gpr[n] = ldtul_p(mem_buf);
 655         return sizeof(target_ulong);
 656     } else if (n < 64) {
 657         /* fprs */
 658         env->fpr[n-32] = ldfq_p(mem_buf);
 659         return 8;
 660     } else {
 661         switch (n) {
 662         case 64:
 663             env->nip = ldtul_p(mem_buf);
 664             return sizeof(target_ulong);
 665         case 65:
 666             ppc_store_msr(env, ldtul_p(mem_buf));
 667             return sizeof(target_ulong);
 668         case 66:
 669             {
 670                 uint32_t cr = ldl_p(mem_buf);
 671                 int i;
 672                 for (i = 0; i < 8; i++)
 673                     env->crf[i] = (cr >> (32 - ((i + 1) * 4))) & 0xF;
 674                 return 4;
 675             }
 676         case 67:
 677             env->lr = ldtul_p(mem_buf);
 678             return sizeof(target_ulong);
 679         case 68:
 680             env->ctr = ldtul_p(mem_buf);
 681             return sizeof(target_ulong);
 682         case 69:
 683             env->xer = ldtul_p(mem_buf);
 684             return sizeof(target_ulong);
 685         case 70:
 686             /* fpscr */
 687             return 4;
 688         }
 689     }
 690     return 0;
 691 }
 692
 693 #elif defined (TARGET_SPARC)
 694
 695 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
 696 #define NUM_CORE_REGS 86
 697 #else
 698 #define NUM_CORE_REGS 72
 699 #endif
 700
 701 #ifdef TARGET_ABI32
 702 #define GET_REGA(val) GET_REG32(val)
 703 #else
 704 #define GET_REGA(val) GET_REGL(val)
 705 #endif
 706
 707 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 708 {
 709     if (n < 8) {
 710         /* g0..g7 */
 711         GET_REGA(env->gregs[n]);
 712     }
 713     if (n < 32) {
 714         /* register window */
 715         GET_REGA(env->regwptr[n - 8]);
 716     }
 717 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
 718     if (n < 64) {
 719         /* fprs */
 720         GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
 721     }
 722     /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 723     switch (n) {
 724     case 64: GET_REGA(env->y);
 725     case 65: GET_REGA(GET_PSR(env));
 726     case 66: GET_REGA(env->wim);
 727     case 67: GET_REGA(env->tbr);
 728     case 68: GET_REGA(env->pc);
 729     case 69: GET_REGA(env->npc);
 730     case 70: GET_REGA(env->fsr);
 731     case 71: GET_REGA(0); /* csr */
 732     default: GET_REGA(0);
 733     }
 734 #else
 735     if (n < 64) {
 736         /* f0-f31 */
 737         GET_REG32(*((uint32_t *)&env->fpr[n - 32]));
 738     }
 739     if (n < 80) {
 740         /* f32-f62 (double width, even numbers only) */
 741         uint64_t val;
 742
 743         val = (uint64_t)*((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) << 32;
 744         val |= *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]);
 745         GET_REG64(val);
 746     }
 747     switch (n) {
 748     case 80: GET_REGL(env->pc);
 749     case 81: GET_REGL(env->npc);
 750     case 82: GET_REGL(((uint64_t)GET_CCR(env) << 32) |
 751                            ((env->asi & 0xff) << 24) |
 752                            ((env->pstate & 0xfff) << 8) |
 753                            GET_CWP64(env));
 754     case 83: GET_REGL(env->fsr);
 755     case 84: GET_REGL(env->fprs);
 756     case 85: GET_REGL(env->y);
 757     }
 758 #endif
 759     return 0;
 760 }
 761
 762 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 763 {
 764 #if defined(TARGET_ABI32)
 765     abi_ulong tmp;
 766
 767     tmp = ldl_p(mem_buf);
 768 #else
 769     target_ulong tmp;
 770
 771     tmp = ldtul_p(mem_buf);
 772 #endif
 773
 774     if (n < 8) {
 775         /* g0..g7 */
 776         env->gregs[n] = tmp;
 777     } else if (n < 32) {
 778         /* register window */
 779         env->regwptr[n - 8] = tmp;
 780     }
 781 #if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)
 782     else if (n < 64) {
 783         /* fprs */
 784         *((uint32_t *)&env->fpr[n - 32]) = tmp;
 785     } else {
 786         /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
 787         switch (n) {
 788         case 64: env->y = tmp; break;
 789         case 65: PUT_PSR(env, tmp); break;
 790         case 66: env->wim = tmp; break;
 791         case 67: env->tbr = tmp; break;
 792         case 68: env->pc = tmp; break;
 793         case 69: env->npc = tmp; break;
 794         case 70: env->fsr = tmp; break;
 795         default: return 0;
 796         }
 797     }
 798     return 4;
 799 #else
 800     else if (n < 64) {
 801         /* f0-f31 */
 802         env->fpr[n] = ldfl_p(mem_buf);
 803         return 4;
 804     } else if (n < 80) {
 805         /* f32-f62 (double width, even numbers only) */
 806         *((uint32_t *)&env->fpr[(n - 64) * 2 + 32]) = tmp >> 32;
 807         *((uint32_t *)&env->fpr[(n - 64) * 2 + 33]) = tmp;
 808     } else {
 809         switch (n) {
 810         case 80: env->pc = tmp; break;
 811         case 81: env->npc = tmp; break;
 812         case 82:
 813             PUT_CCR(env, tmp >> 32);
 814             env->asi = (tmp >> 24) & 0xff;
 815             env->pstate = (tmp >> 8) & 0xfff;
 816             PUT_CWP64(env, tmp & 0xff);
 817             break;
 818         case 83: env->fsr = tmp; break;
 819         case 84: env->fprs = tmp; break;
 820         case 85: env->y = tmp; break;
 821         default: return 0;
 822         }
 823     }
 824     return 8;
 825 #endif
 826 }
 827 #elif defined (TARGET_ARM)
 828
 829 /* Old gdb always expect FPA registers.  Newer (xml-aware) gdb only expect
 830    whatever the target description contains.  Due to a historical mishap
 831    the FPA registers appear in between core integer regs and the CPSR.
 832    We hack round this by giving the FPA regs zero size when talking to a
 833    newer gdb.  */
 834 #define NUM_CORE_REGS 26
 835 #define GDB_CORE_XML "arm-core.xml"
 836
 837 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 838 {
 839     if (n < 16) {
 840         /* Core integer register.  */
 841         GET_REG32(env->regs[n]);
 842     }
 843     if (n < 24) {
 844         /* FPA registers.  */
 845         if (gdb_has_xml)
 846             return 0;
 847         memset(mem_buf, 0, 12);
 848         return 12;
 849     }
 850     switch (n) {
 851     case 24:
 852         /* FPA status register.  */
 853         if (gdb_has_xml)
 854             return 0;
 855         GET_REG32(0);
 856     case 25:
 857         /* CPSR */
 858         GET_REG32(cpsr_read(env));
 859     }
 860     /* Unknown register.  */
 861     return 0;
 862 }
 863
 864 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 865 {
 866     uint32_t tmp;
 867
 868     tmp = ldl_p(mem_buf);
 869
 870     /* Mask out low bit of PC to workaround gdb bugs.  This will probably
 871        cause problems if we ever implement the Jazelle DBX extensions.  */
 872     if (n == 15)
 873         tmp &= ~1;
 874
 875     if (n < 16) {
 876         /* Core integer register.  */
 877         env->regs[n] = tmp;
 878         return 4;
 879     }
 880     if (n < 24) { /* 16-23 */
 881         /* FPA registers (ignored).  */
 882         if (gdb_has_xml)
 883             return 0;
 884         return 12;
 885     }
 886     switch (n) {
 887     case 24:
 888         /* FPA status register (ignored).  */
 889         if (gdb_has_xml)
 890             return 0;
 891         return 4;
 892     case 25:
 893         /* CPSR */
 894         cpsr_write (env, tmp, 0xffffffff);
 895         return 4;
 896     }
 897     /* Unknown register.  */
 898     return 0;
 899 }
 900
 901 #elif defined (TARGET_M68K)
 902
 903 #define NUM_CORE_REGS 18
 904
 905 #define GDB_CORE_XML "cf-core.xml"
 906
 907 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 908 {
 909     if (n < 8) {
 910         /* D0-D7 */
 911         GET_REG32(env->dregs[n]);
 912     } else if (n < 16) {
 913         /* A0-A7 */
 914         GET_REG32(env->aregs[n - 8]);
 915     } else {
 916         switch (n) {
 917         case 16: GET_REG32(env->sr);
 918         case 17: GET_REG32(env->pc);
 919         }
 920     }
 921     /* FP registers not included here because they vary between
 922        ColdFire and m68k.  Use XML bits for these.  */
 923     return 0;
 924 }
 925
 926 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 927 {
 928     uint32_t tmp;
 929
 930     tmp = ldl_p(mem_buf);
 931
 932     if (n < 8) {
 933         /* D0-D7 */
 934         env->dregs[n] = tmp;
 935     } else if (n < 8) {
 936         /* A0-A7 */
 937         env->aregs[n - 8] = tmp;
 938     } else {
 939         switch (n) {
 940         case 16: env->sr = tmp; break;
 941         case 17: env->pc = tmp; break;
 942         default: return 0;
 943         }
 944     }
 945     return 4;
 946 }
 947 #elif defined (TARGET_MIPS)
 948
 949 #define NUM_CORE_REGS 73
 950
 951 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
 952 {
 953     if (n < 32) {
 954         GET_REGL(env->active_tc.gpr[n]);
 955     }
 956     if (env->CP0_Config1 & (1 << CP0C1_FP)) {
 957         if (n >= 38 && n < 70) {
 958             if (env->CP0_Status & (1 << CP0St_FR))
 959                 GET_REGL(env->active_fpu.fpr[n - 38].d);
 960             else
 961                 GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]);
 962         }
 963         switch (n) {
 964         case 70: GET_REGL((int32_t)env->active_fpu.fcr31);
 965         case 71: GET_REGL((int32_t)env->active_fpu.fcr0);
 966         }
 967     }
 968     switch (n) {
 969     case 32: GET_REGL((int32_t)env->CP0_Status);
 970     case 33: GET_REGL(env->active_tc.LO[0]);
 971     case 34: GET_REGL(env->active_tc.HI[0]);
 972     case 35: GET_REGL(env->CP0_BadVAddr);
 973     case 36: GET_REGL((int32_t)env->CP0_Cause);
 974     case 37: GET_REGL(env->active_tc.PC);
 975     case 72: GET_REGL(0); /* fp */
 976     case 89: GET_REGL((int32_t)env->CP0_PRid);
 977     }
 978     if (n >= 73 && n <= 88) {
 979         /* 16 embedded regs.  */
 980         GET_REGL(0);
 981     }
 982
 983     return 0;
 984 }
 985
 986 /* convert MIPS rounding mode in FCR31 to IEEE library */
 987 static unsigned int ieee_rm[] =
 988   {
 989     float_round_nearest_even,
 990     float_round_to_zero,
 991     float_round_up,
 992     float_round_down
 993   };
 994 #define RESTORE_ROUNDING_MODE \
 995     set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
 996
 997 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
 998 {
 999     target_ulong tmp;
1000
1001     tmp = ldtul_p(mem_buf);
1002
1003     if (n < 32) {
1004         env->active_tc.gpr[n] = tmp;
1005         return sizeof(target_ulong);
1006     }
1007     if (env->CP0_Config1 & (1 << CP0C1_FP)
1008             && n >= 38 && n < 73) {
1009         if (n < 70) {
1010             if (env->CP0_Status & (1 << CP0St_FR))
1011               env->active_fpu.fpr[n - 38].d = tmp;
1012             else
1013               env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp;
1014         }
1015         switch (n) {
1016         case 70:
1017             env->active_fpu.fcr31 = tmp & 0xFF83FFFF;
1018             /* set rounding mode */
1019             RESTORE_ROUNDING_MODE;
1020 #ifndef CONFIG_SOFTFLOAT
1021             /* no floating point exception for native float */
1022             SET_FP_ENABLE(env->active_fpu.fcr31, 0);
1023 #endif
1024             break;
1025         case 71: env->active_fpu.fcr0 = tmp; break;
1026         }
1027         return sizeof(target_ulong);
1028     }
1029     switch (n) {
1030     case 32: env->CP0_Status = tmp; break;
1031     case 33: env->active_tc.LO[0] = tmp; break;
1032     case 34: env->active_tc.HI[0] = tmp; break;
1033     case 35: env->CP0_BadVAddr = tmp; break;
1034     case 36: env->CP0_Cause = tmp; break;
1035     case 37: env->active_tc.PC = tmp; break;
1036     case 72: /* fp, ignored */ break;
1037     default:
1038         if (n > 89)
1039             return 0;
1040         /* Other registers are readonly.  Ignore writes.  */
1041         break;
1042     }
1043
1044     return sizeof(target_ulong);
1045 }
1046 #elif defined (TARGET_SH4)
1047
1048 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
1049 /* FIXME: We should use XML for this.  */
1050
1051 #define NUM_CORE_REGS 59
1052
1053 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1054 {
1055     if (n < 8) {
1056         if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
1057             GET_REGL(env->gregs[n + 16]);
1058         } else {
1059             GET_REGL(env->gregs[n]);
1060         }
1061     } else if (n < 16) {
1062         GET_REGL(env->gregs[n - 8]);
1063     } else if (n >= 25 && n < 41) {
1064         GET_REGL(env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
1065     } else if (n >= 43 && n < 51) {
1066         GET_REGL(env->gregs[n - 43]);
1067     } else if (n >= 51 && n < 59) {
1068         GET_REGL(env->gregs[n - (51 - 16)]);
1069     }
1070     switch (n) {
1071     case 16: GET_REGL(env->pc);
1072     case 17: GET_REGL(env->pr);
1073     case 18: GET_REGL(env->gbr);
1074     case 19: GET_REGL(env->vbr);
1075     case 20: GET_REGL(env->mach);
1076     case 21: GET_REGL(env->macl);
1077     case 22: GET_REGL(env->sr);
1078     case 23: GET_REGL(env->fpul);
1079     case 24: GET_REGL(env->fpscr);
1080     case 41: GET_REGL(env->ssr);
1081     case 42: GET_REGL(env->spc);
1082     }
1083
1084     return 0;
1085 }
1086
1087 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1088 {
1089     uint32_t tmp;
1090
1091     tmp = ldl_p(mem_buf);
1092
1093     if (n < 8) {
1094         if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
1095             env->gregs[n + 16] = tmp;
1096         } else {
1097             env->gregs[n] = tmp;
1098         }
1099         return 4;
1100     } else if (n < 16) {
1101         env->gregs[n - 8] = tmp;
1102         return 4;
1103     } else if (n >= 25 && n < 41) {
1104         env->fregs[(n - 25) + ((env->fpscr & FPSCR_FR) ? 16 : 0)] = tmp;
1105     } else if (n >= 43 && n < 51) {
1106         env->gregs[n - 43] = tmp;
1107         return 4;
1108     } else if (n >= 51 && n < 59) {
1109         env->gregs[n - (51 - 16)] = tmp;
1110         return 4;
1111     }
1112     switch (n) {
1113     case 16: env->pc = tmp;
1114     case 17: env->pr = tmp;
1115     case 18: env->gbr = tmp;
1116     case 19: env->vbr = tmp;
1117     case 20: env->mach = tmp;
1118     case 21: env->macl = tmp;
1119     case 22: env->sr = tmp;
1120     case 23: env->fpul = tmp;
1121     case 24: env->fpscr = tmp;
1122     case 41: env->ssr = tmp;
1123     case 42: env->spc = tmp;
1124     default: return 0;
1125     }
1126
1127     return 4;
1128 }
1129 #elif defined (TARGET_CRIS)
1130
1131 #define NUM_CORE_REGS 49
1132
1133 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1134 {
1135     uint8_t srs;
1136
1137     srs = env->pregs[PR_SRS];
1138     if (n < 16) {
1139         GET_REG32(env->regs[n]);
1140     }
1141
1142     if (n >= 21 && n < 32) {
1143         GET_REG32(env->pregs[n - 16]);
1144     }
1145     if (n >= 33 && n < 49) {
1146         GET_REG32(env->sregs[srs][n - 33]);
1147     }
1148     switch (n) {
1149     case 16: GET_REG8(env->pregs[0]);
1150     case 17: GET_REG8(env->pregs[1]);
1151     case 18: GET_REG32(env->pregs[2]);
1152     case 19: GET_REG8(srs);
1153     case 20: GET_REG16(env->pregs[4]);
1154     case 32: GET_REG32(env->pc);
1155     }
1156
1157     return 0;
1158 }
1159
1160 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1161 {
1162     uint32_t tmp;
1163
1164     if (n > 49)
1165         return 0;
1166
1167     tmp = ldl_p(mem_buf);
1168
1169     if (n < 16) {
1170         env->regs[n] = tmp;
1171     }
1172
1173     if (n >= 21 && n < 32) {
1174         env->pregs[n - 16] = tmp;
1175     }
1176
1177     /* FIXME: Should support function regs be writable?  */
1178     switch (n) {
1179     case 16: return 1;
1180     case 17: return 1;
1181     case 18: env->pregs[PR_PID] = tmp; break;
1182     case 19: return 1;
1183     case 20: return 2;
1184     case 32: env->pc = tmp; break;
1185     }
1186
1187     return 4;
1188 }
1189 #elif defined (TARGET_ALPHA)
1190
1191 #define NUM_CORE_REGS 65
1192
1193 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1194 {
1195     if (n < 31) {
1196        GET_REGL(env->ir[n]);
1197     }
1198     else if (n == 31) {
1199        GET_REGL(0);
1200     }
1201     else if (n<63) {
1202        uint64_t val;
1203
1204        val=*((uint64_t *)&env->fir[n-32]);
1205        GET_REGL(val);
1206     }
1207     else if (n==63) {
1208        GET_REGL(env->fpcr);
1209     }
1210     else if (n==64) {
1211        GET_REGL(env->pc);
1212     }
1213     else {
1214        GET_REGL(0);
1215     }
1216
1217     return 0;
1218 }
1219
1220 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1221 {
1222     target_ulong tmp;
1223     tmp = ldtul_p(mem_buf);
1224
1225     if (n < 31) {
1226         env->ir[n] = tmp;
1227     }
1228
1229     if (n > 31 && n < 63) {
1230         env->fir[n - 32] = ldfl_p(mem_buf);
1231     }
1232
1233     if (n == 64 ) {
1234        env->pc=tmp;
1235     }
1236
1237     return 8;
1238 }
1239 #else
1240
1241 #define NUM_CORE_REGS 0
1242
1243 static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n)
1244 {
1245     return 0;
1246 }
1247
1248 static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n)
1249 {
1250     return 0;
1251 }
1252
1253 #endif
1254
1255 static int num_g_regs = NUM_CORE_REGS;
1256
1257 #ifdef GDB_CORE_XML
1258 /* Encode data using the encoding for 'x' packets.  */
1259 static int memtox(char *buf, const char *mem, int len)
1260 {
1261     char *p = buf;
1262     char c;
1263
1264     while (len--) {
1265         c = *(mem++);
1266         switch (c) {
1267         case '#': case '$': case '*': case '}':
1268             *(p++) = '}';
1269             *(p++) = c ^ 0x20;
1270             break;
1271         default:
1272             *(p++) = c;
1273             break;
1274         }
1275     }
1276     return p - buf;
1277 }
1278
1279 static const char *get_feature_xml(const char *p, const char **newp)
1280 {
1281     extern const char *const xml_builtin[][2];
1282     size_t len;
1283     int i;
1284     const char *name;
1285     static char target_xml[1024];
1286
1287     len = 0;
1288     while (p[len] && p[len] != ':')
1289         len++;
1290     *newp = p + len;
1291
1292     name = NULL;
1293     if (strncmp(p, "target.xml", len) == 0) {
1294         /* Generate the XML description for this CPU.  */
1295         if (!target_xml[0]) {
1296             GDBRegisterState *r;
1297
1298             snprintf(target_xml, sizeof(target_xml),
1299                      "<?xml version=\"1.0\"?>"
1300                      "<!DOCTYPE target SYSTEM \"gdb-target.dtd\">"
1301                      "<target>"
1302                      "<xi:include href=\"%s\"/>",
1303                      GDB_CORE_XML);
1304
1305             for (r = first_cpu->gdb_regs; r; r = r->next) {
1306                 strcat(target_xml, "<xi:include href=\"");
1307                 strcat(target_xml, r->xml);
1308                 strcat(target_xml, "\"/>");
1309             }
1310             strcat(target_xml, "</target>");
1311         }
1312         return target_xml;
1313     }
1314     for (i = 0; ; i++) {
1315         name = xml_builtin[i][0];
1316         if (!name || (strncmp(name, p, len) == 0 && strlen(name) == len))
1317             break;
1318     }
1319     return name ? xml_builtin[i][1] : NULL;
1320 }
1321 #endif
1322
1323 static int gdb_read_register(CPUState *env, uint8_t *mem_buf, int reg)
1324 {
1325     GDBRegisterState *r;
1326
1327     if (reg < NUM_CORE_REGS)
1328         return cpu_gdb_read_register(env, mem_buf, reg);
1329
1330     for (r = env->gdb_regs; r; r = r->next) {
1331         if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1332             return r->get_reg(env, mem_buf, reg - r->base_reg);
1333         }
1334     }
1335     return 0;
1336 }
1337
1338 static int gdb_write_register(CPUState *env, uint8_t *mem_buf, int reg)
1339 {
1340     GDBRegisterState *r;
1341
1342     if (reg < NUM_CORE_REGS)
1343         return cpu_gdb_write_register(env, mem_buf, reg);
1344
1345     for (r = env->gdb_regs; r; r = r->next) {
1346         if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1347             return r->set_reg(env, mem_buf, reg - r->base_reg);
1348         }
1349     }
1350     return 0;
1351 }
1352
1353 /* Register a supplemental set of CPU registers.  If g_pos is nonzero it
1354    specifies the first register number and these registers are included in
1355    a standard "g" packet.  Direction is relative to gdb, i.e. get_reg is
1356    gdb reading a CPU register, and set_reg is gdb modifying a CPU register.
1357  */
1358
1359 void gdb_register_coprocessor(CPUState * env,
1360                              gdb_reg_cb get_reg, gdb_reg_cb set_reg,
1361                              int num_regs, const char *xml, int g_pos)
1362 {
1363     GDBRegisterState *s;
1364     GDBRegisterState **p;
1365     static int last_reg = NUM_CORE_REGS;
1366
1367     s = (GDBRegisterState *)qemu_mallocz(sizeof(GDBRegisterState));
1368     s->base_reg = last_reg;
1369     s->num_regs = num_regs;
1370     s->get_reg = get_reg;
1371     s->set_reg = set_reg;
1372     s->xml = xml;
1373     p = &env->gdb_regs;
1374     while (*p) {
1375         /* Check for duplicates.  */
1376         if (strcmp((*p)->xml, xml) == 0)
1377             return;
1378         p = &(*p)->next;
1379     }
1380     /* Add to end of list.  */
1381     last_reg += num_regs;
1382     *p = s;
1383     if (g_pos) {
1384         if (g_pos != s->base_reg) {
1385             fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n"
1386                     "Expected %d got %d\n", xml, g_pos, s->base_reg);
1387         } else {
1388             num_g_regs = last_reg;
1389         }
1390     }
1391 }
1392
1393 #ifndef CONFIG_USER_ONLY
1394 static const int xlat_gdb_type[] = {
1395     [GDB_WATCHPOINT_WRITE]  = BP_GDB | BP_MEM_WRITE,
1396     [GDB_WATCHPOINT_READ]   = BP_GDB | BP_MEM_READ,
1397     [GDB_WATCHPOINT_ACCESS] = BP_GDB | BP_MEM_ACCESS,
1398 };
1399 #endif
1400
1401 static int gdb_breakpoint_insert(target_ulong addr, target_ulong len, int type)
1402 {
1403     CPUState *env;
1404     int err = 0;
1405
1406     if (kvm_enabled())
1407         return kvm_insert_breakpoint(gdbserver_state->c_cpu, addr, len, type);
1408
1409     switch (type) {
1410     case GDB_BREAKPOINT_SW:
1411     case GDB_BREAKPOINT_HW:
1412         for (env = first_cpu; env != NULL; env = env->next_cpu) {
1413             err = cpu_breakpoint_insert(env, addr, BP_GDB, NULL);
1414             if (err)
1415                 break;
1416         }
1417         return err;
1418 #ifndef CONFIG_USER_ONLY
1419     case GDB_WATCHPOINT_WRITE:
1420     case GDB_WATCHPOINT_READ:
1421     case GDB_WATCHPOINT_ACCESS:
1422         for (env = first_cpu; env != NULL; env = env->next_cpu) {
1423             err = cpu_watchpoint_insert(env, addr, len, xlat_gdb_type[type],
1424                                         NULL);
1425             if (err)
1426                 break;
1427         }
1428         return err;
1429 #endif
1430     default:
1431         return -ENOSYS;
1432     }
1433 }
1434
1435 static int gdb_breakpoint_remove(target_ulong addr, target_ulong len, int type)
1436 {
1437     CPUState *env;
1438     int err = 0;
1439
1440     if (kvm_enabled())
1441         return kvm_remove_breakpoint(gdbserver_state->c_cpu, addr, len, type);
1442
1443     switch (type) {
1444     case GDB_BREAKPOINT_SW:
1445     case GDB_BREAKPOINT_HW:
1446         for (env = first_cpu; env != NULL; env = env->next_cpu) {
1447             err = cpu_breakpoint_remove(env, addr, BP_GDB);
1448             if (err)
1449                 break;
1450         }
1451         return err;
1452 #ifndef CONFIG_USER_ONLY
1453     case GDB_WATCHPOINT_WRITE:
1454     case GDB_WATCHPOINT_READ:
1455     case GDB_WATCHPOINT_ACCESS:
1456         for (env = first_cpu; env != NULL; env = env->next_cpu) {
1457             err = cpu_watchpoint_remove(env, addr, len, xlat_gdb_type[type]);
1458             if (err)
1459                 break;
1460         }
1461         return err;
1462 #endif
1463     default:
1464         return -ENOSYS;
1465     }
1466 }
1467
1468 static void gdb_breakpoint_remove_all(void)
1469 {
1470     CPUState *env;
1471
1472     if (kvm_enabled()) {
1473         kvm_remove_all_breakpoints(gdbserver_state->c_cpu);
1474         return;
1475     }
1476
1477     for (env = first_cpu; env != NULL; env = env->next_cpu) {
1478         cpu_breakpoint_remove_all(env, BP_GDB);
1479 #ifndef CONFIG_USER_ONLY
1480         cpu_watchpoint_remove_all(env, BP_GDB);
1481 #endif
1482     }
1483 }
1484
1485 static int gdb_handle_packet(GDBState *s, const char *line_buf)
1486 {
1487     CPUState *env;
1488     const char *p;
1489     int ch, reg_size, type, res, thread;
1490     char buf[MAX_PACKET_LENGTH];
1491     uint8_t mem_buf[MAX_PACKET_LENGTH];
1492     uint8_t *registers;
1493     target_ulong addr, len;
1494
1495 #ifdef DEBUG_GDB
1496     printf("command='%s'\n", line_buf);
1497 #endif
1498     p = line_buf;
1499     ch = *p++;
1500     switch(ch) {
1501     case '?':
1502         /* TODO: Make this return the correct value for user-mode.  */
1503         snprintf(buf, sizeof(buf), "T%02xthread:%02x;", GDB_SIGNAL_TRAP,
1504                  s->c_cpu->cpu_index+1);
1505         put_packet(s, buf);
1506         /* Remove all the breakpoints when this query is issued,
1507          * because gdb is doing and initial connect and the state
1508          * should be cleaned up.
1509          */
1510         gdb_breakpoint_remove_all();
1511         break;
1512     case 'c':
1513         if (*p != '\0') {
1514             addr = strtoull(p, (char **)&p, 16);
1515 #if defined(TARGET_I386)
1516             s->c_cpu->eip = addr;
1517             kvm_load_registers(s->c_cpu);
1518 #elif defined (TARGET_PPC)
1519             s->c_cpu->nip = addr;
1520             kvm_load_registers(s->c_cpu);
1521 #elif defined (TARGET_SPARC)
1522             s->c_cpu->pc = addr;
1523             s->c_cpu->npc = addr + 4;
1524 #elif defined (TARGET_ARM)
1525             s->c_cpu->regs[15] = addr;
1526 #elif defined (TARGET_SH4)
1527             s->c_cpu->pc = addr;
1528 #elif defined (TARGET_MIPS)
1529             s->c_cpu->active_tc.PC = addr;
1530 #elif defined (TARGET_CRIS)
1531             s->c_cpu->pc = addr;
1532 #elif defined (TARGET_ALPHA)
1533             s->c_cpu->pc = addr;
1534 #endif
1535         }
1536         s->signal = 0;
1537         gdb_continue(s);
1538         return RS_IDLE;
1539     case 'C':
1540         s->signal = gdb_signal_to_target (strtoul(p, (char **)&p, 16));
1541         if (s->signal == -1)
1542             s->signal = 0;
1543         gdb_continue(s);
1544         return RS_IDLE;
1545     case 'k':
1546         /* Kill the target */
1547         fprintf(stderr, "\nQEMU: Terminated via GDBstub\n");
1548         exit(0);
1549     case 'D':
1550         /* Detach packet */
1551         gdb_breakpoint_remove_all();
1552         gdb_continue(s);
1553         put_packet(s, "OK");
1554         break;
1555     case 's':
1556         if (*p != '\0') {
1557             addr = strtoull(p, (char **)&p, 16);
1558 #if defined(TARGET_I386)
1559             s->c_cpu->eip = addr;
1560             kvm_load_registers(s->c_cpu);
1561 #elif defined (TARGET_PPC)
1562             s->c_cpu->nip = addr;
1563             kvm_load_registers(s->c_cpu);
1564 #elif defined (TARGET_SPARC)
1565             s->c_cpu->pc = addr;
1566             s->c_cpu->npc = addr + 4;
1567 #elif defined (TARGET_ARM)
1568             s->c_cpu->regs[15] = addr;
1569 #elif defined (TARGET_SH4)
1570             s->c_cpu->pc = addr;
1571 #elif defined (TARGET_MIPS)
1572             s->c_cpu->active_tc.PC = addr;
1573 #elif defined (TARGET_CRIS)
1574             s->c_cpu->pc = addr;
1575 #elif defined (TARGET_ALPHA)
1576             s->c_cpu->pc = addr;
1577 #endif
1578         }
1579         cpu_single_step(s->c_cpu, sstep_flags);
1580         gdb_continue(s);
1581         return RS_IDLE;
1582     case 'F':
1583         {
1584             target_ulong ret;
1585             target_ulong err;
1586
1587             ret = strtoull(p, (char **)&p, 16);
1588             if (*p == ',') {
1589                 p++;
1590                 err = strtoull(p, (char **)&p, 16);
1591             } else {
1592                 err = 0;
1593             }
1594             if (*p == ',')
1595                 p++;
1596             type = *p;
1597             if (gdb_current_syscall_cb)
1598                 gdb_current_syscall_cb(s->c_cpu, ret, err);
1599             if (type == 'C') {
1600                 put_packet(s, "T02");
1601             } else {
1602                 gdb_continue(s);
1603             }
1604         }
1605         break;
1606     case 'g':
1607         kvm_save_registers(s->g_cpu);
1608         len = 0;
1609         for (addr = 0; addr < num_g_regs; addr++) {
1610             reg_size = gdb_read_register(s->g_cpu, mem_buf + len, addr);
1611             len += reg_size;
1612         }
1613         memtohex(buf, mem_buf, len);
1614         put_packet(s, buf);
1615         break;
1616     case 'G':
1617         registers = mem_buf;
1618         len = strlen(p) / 2;
1619         hextomem((uint8_t *)registers, p, len);
1620         for (addr = 0; addr < num_g_regs && len > 0; addr++) {
1621             reg_size = gdb_write_register(s->g_cpu, registers, addr);
1622             len -= reg_size;
1623             registers += reg_size;
1624         }
1625         kvm_load_registers(s->g_cpu);
1626         put_packet(s, "OK");
1627         break;
1628     case 'm':
1629         addr = strtoull(p, (char **)&p, 16);
1630         if (*p == ',')
1631             p++;
1632         len = strtoull(p, NULL, 16);
1633         if (cpu_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 0) != 0) {
1634             put_packet (s, "E14");
1635         } else {
1636             memtohex(buf, mem_buf, len);
1637             put_packet(s, buf);
1638         }
1639         break;
1640     case 'M':
1641         addr = strtoull(p, (char **)&p, 16);
1642         if (*p == ',')
1643             p++;
1644         len = strtoull(p, (char **)&p, 16);
1645         if (*p == ':')
1646             p++;
1647         hextomem(mem_buf, p, len);
1648         if (cpu_memory_rw_debug(s->g_cpu, addr, mem_buf, len, 1) != 0)
1649             put_packet(s, "E14");
1650         else
1651             put_packet(s, "OK");
1652         break;
1653     case 'p':
1654         /* Older gdb are really dumb, and don't use 'g' if 'p' is avaialable.
1655            This works, but can be very slow.  Anything new enough to
1656            understand XML also knows how to use this properly.  */
1657         if (!gdb_has_xml)
1658             goto unknown_command;
1659         addr = strtoull(p, (char **)&p, 16);
1660         reg_size = gdb_read_register(s->g_cpu, mem_buf, addr);
1661         if (reg_size) {
1662             memtohex(buf, mem_buf, reg_size);
1663             put_packet(s, buf);
1664         } else {
1665             put_packet(s, "E14");
1666         }
1667         break;
1668     case 'P':
1669         if (!gdb_has_xml)
1670             goto unknown_command;
1671         addr = strtoull(p, (char **)&p, 16);
1672         if (*p == '=')
1673             p++;
1674         reg_size = strlen(p) / 2;
1675         hextomem(mem_buf, p, reg_size);
1676         gdb_write_register(s->g_cpu, mem_buf, addr);
1677         put_packet(s, "OK");
1678         break;
1679     case 'Z':
1680     case 'z':
1681         type = strtoul(p, (char **)&p, 16);
1682         if (*p == ',')
1683             p++;
1684         addr = strtoull(p, (char **)&p, 16);
1685         if (*p == ',')
1686             p++;
1687         len = strtoull(p, (char **)&p, 16);
1688         if (ch == 'Z')
1689             res = gdb_breakpoint_insert(addr, len, type);
1690         else
1691             res = gdb_breakpoint_remove(addr, len, type);
1692         if (res >= 0)
1693              put_packet(s, "OK");
1694         else if (res == -ENOSYS)
1695             put_packet(s, "");
1696         else
1697             put_packet(s, "E22");
1698         break;
1699     case 'H':
1700         type = *p++;
1701         thread = strtoull(p, (char **)&p, 16);
1702         if (thread == -1 || thread == 0) {
1703             put_packet(s, "OK");
1704             break;
1705         }
1706         for (env = first_cpu; env != NULL; env = env->next_cpu)
1707             if (env->cpu_index + 1 == thread)
1708                 break;
1709         if (env == NULL) {
1710             put_packet(s, "E22");
1711             break;
1712         }
1713         switch (type) {
1714         case 'c':
1715             s->c_cpu = env;
1716             put_packet(s, "OK");
1717             break;
1718         case 'g':
1719             s->g_cpu = env;
1720             put_packet(s, "OK");
1721             break;
1722         default:
1723              put_packet(s, "E22");
1724              break;
1725         }
1726         break;
1727     case 'T':
1728         thread = strtoull(p, (char **)&p, 16);
1729 #ifndef CONFIG_USER_ONLY
1730         if (thread > 0 && thread < smp_cpus + 1)
1731 #else
1732         if (thread == 1)
1733 #endif
1734              put_packet(s, "OK");
1735         else
1736             put_packet(s, "E22");
1737         break;
1738     case 'q':
1739     case 'Q':
1740         /* parse any 'q' packets here */
1741         if (!strcmp(p,"qemu.sstepbits")) {
1742             /* Query Breakpoint bit definitions */
1743             snprintf(buf, sizeof(buf), "ENABLE=%x,NOIRQ=%x,NOTIMER=%x",
1744                      SSTEP_ENABLE,
1745                      SSTEP_NOIRQ,
1746                      SSTEP_NOTIMER);
1747             put_packet(s, buf);
1748             break;
1749         } else if (strncmp(p,"qemu.sstep",10) == 0) {
1750             /* Display or change the sstep_flags */
1751             p += 10;
1752             if (*p != '=') {
1753                 /* Display current setting */
1754                 snprintf(buf, sizeof(buf), "0x%x", sstep_flags);
1755                 put_packet(s, buf);
1756                 break;
1757             }
1758             p++;
1759             type = strtoul(p, (char **)&p, 16);
1760             sstep_flags = type;
1761             put_packet(s, "OK");
1762             break;
1763         } else if (strcmp(p,"C") == 0) {
1764             /* "Current thread" remains vague in the spec, so always return
1765              *  the first CPU (gdb returns the first thread). */
1766             put_packet(s, "QC1");
1767             break;
1768         } else if (strcmp(p,"fThreadInfo") == 0) {
1769             s->query_cpu = first_cpu;
1770             goto report_cpuinfo;
1771         } else if (strcmp(p,"sThreadInfo") == 0) {
1772         report_cpuinfo:
1773             if (s->query_cpu) {
1774                 snprintf(buf, sizeof(buf), "m%x", s->query_cpu->cpu_index+1);
1775                 put_packet(s, buf);
1776                 s->query_cpu = s->query_cpu->next_cpu;
1777             } else
1778                 put_packet(s, "l");
1779             break;
1780         } else if (strncmp(p,"ThreadExtraInfo,", 16) == 0) {
1781             thread = strtoull(p+16, (char **)&p, 16);
1782             for (env = first_cpu; env != NULL; env = env->next_cpu)
1783                 if (env->cpu_index + 1 == thread) {
1784                     kvm_save_registers(env);
1785                     len = snprintf((char *)mem_buf, sizeof(mem_buf),
1786                                    "CPU#%d [%s]", env->cpu_index,
1787                                    env->halted ? "halted " : "running");
1788                     memtohex(buf, mem_buf, len);
1789                     put_packet(s, buf);
1790                     break;
1791                 }
1792             break;
1793         }
1794 #ifdef CONFIG_LINUX_USER
1795         else if (strncmp(p, "Offsets", 7) == 0) {
1796             TaskState *ts = s->c_cpu->opaque;
1797
1798             snprintf(buf, sizeof(buf),
1799                      "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1800                      ";Bss=" TARGET_ABI_FMT_lx,
1801                      ts->info->code_offset,
1802                      ts->info->data_offset,
1803                      ts->info->data_offset);
1804             put_packet(s, buf);
1805             break;
1806         }
1807 #endif
1808         if (strncmp(p, "Supported", 9) == 0) {
1809             snprintf(buf, sizeof(buf), "PacketSize=%x", MAX_PACKET_LENGTH);
1810 #ifdef GDB_CORE_XML
1811             strcat(buf, ";qXfer:features:read+");
1812 #endif
1813             put_packet(s, buf);
1814             break;
1815         }
1816 #ifdef GDB_CORE_XML
1817         if (strncmp(p, "Xfer:features:read:", 19) == 0) {
1818             const char *xml;
1819             target_ulong total_len;
1820
1821             gdb_has_xml = 1;
1822             p += 19;
1823             xml = get_feature_xml(p, &p);
1824             if (!xml) {
1825                 snprintf(buf, sizeof(buf), "E00");
1826                 put_packet(s, buf);
1827                 break;
1828             }
1829
1830             if (*p == ':')
1831                 p++;
1832             addr = strtoul(p, (char **)&p, 16);
1833             if (*p == ',')
1834                 p++;
1835             len = strtoul(p, (char **)&p, 16);
1836
1837             total_len = strlen(xml);
1838             if (addr > total_len) {
1839                 snprintf(buf, sizeof(buf), "E00");
1840                 put_packet(s, buf);
1841                 break;
1842             }
1843             if (len > (MAX_PACKET_LENGTH - 5) / 2)
1844                 len = (MAX_PACKET_LENGTH - 5) / 2;
1845             if (len < total_len - addr) {
1846                 buf[0] = 'm';
1847                 len = memtox(buf + 1, xml + addr, len);
1848             } else {
1849                 buf[0] = 'l';
1850                 len = memtox(buf + 1, xml + addr, total_len - addr);
1851             }
1852             put_packet_binary(s, buf, len + 1);
1853             break;
1854         }
1855 #endif
1856         /* Unrecognised 'q' command.  */
1857         goto unknown_command;
1858
1859     default:
1860     unknown_command:
1861         /* put empty packet */
1862         buf[0] = '\0';
1863         put_packet(s, buf);
1864         break;
1865     }
1866     return RS_IDLE;
1867 }
1868
1869 void gdb_set_stop_cpu(CPUState *env)
1870 {
1871     gdbserver_state->c_cpu = env;
1872     gdbserver_state->g_cpu = env;
1873 }
1874
1875 #ifndef CONFIG_USER_ONLY
1876 static void gdb_vm_stopped(void *opaque, int reason)
1877 {
1878     GDBState *s = gdbserver_state;
1879     CPUState *env = s->c_cpu;
1880     char buf[256];
1881     const char *type;
1882     int ret;
1883
1884     if (s->state == RS_SYSCALL)
1885         return;
1886
1887     /* disable single step if it was enable */
1888     cpu_single_step(env, 0);
1889
1890     if (reason == EXCP_DEBUG) {
1891         if (env->watchpoint_hit) {
1892             switch (env->watchpoint_hit->flags & BP_MEM_ACCESS) {
1893             case BP_MEM_READ:
1894                 type = "r";
1895                 break;
1896             case BP_MEM_ACCESS:
1897                 type = "a";
1898                 break;
1899             default:
1900                 type = "";
1901                 break;
1902             }
1903             snprintf(buf, sizeof(buf),
1904                      "T%02xthread:%02x;%swatch:" TARGET_FMT_lx ";",
1905                      GDB_SIGNAL_TRAP, env->cpu_index+1, type,
1906                      env->watchpoint_hit->vaddr);
1907             put_packet(s, buf);
1908             env->watchpoint_hit = NULL;
1909             return;
1910         }
1911         tb_flush(env);
1912         ret = GDB_SIGNAL_TRAP;
1913     } else if (reason == EXCP_INTERRUPT) {
1914         ret = GDB_SIGNAL_INT;
1915     } else {
1916         ret = 0;
1917     }
1918     snprintf(buf, sizeof(buf), "T%02xthread:%02x;", ret, env->cpu_index+1);
1919     put_packet(s, buf);
1920 }
1921 #endif
1922
1923 /* Send a gdb syscall request.
1924    This accepts limited printf-style format specifiers, specifically:
1925     %x  - target_ulong argument printed in hex.
1926     %lx - 64-bit argument printed in hex.
1927     %s  - string pointer (target_ulong) and length (int) pair.  */
1928 void gdb_do_syscall(gdb_syscall_complete_cb cb, const char *fmt, ...)
1929 {
1930     va_list va;
1931     char buf[256];
1932     char *p;
1933     target_ulong addr;
1934     uint64_t i64;
1935     GDBState *s;
1936
1937     s = gdbserver_state;
1938     if (!s)
1939         return;
1940     gdb_current_syscall_cb = cb;
1941     s->state = RS_SYSCALL;
1942 #ifndef CONFIG_USER_ONLY
1943     vm_stop(EXCP_DEBUG);
1944 #endif
1945     s->state = RS_IDLE;
1946     va_start(va, fmt);
1947     p = buf;
1948     *(p++) = 'F';
1949     while (*fmt) {
1950         if (*fmt == '%') {
1951             fmt++;
1952             switch (*fmt++) {
1953             case 'x':
1954                 addr = va_arg(va, target_ulong);
1955                 p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx, addr);
1956                 break;
1957             case 'l':
1958                 if (*(fmt++) != 'x')
1959                     goto bad_format;
1960                 i64 = va_arg(va, uint64_t);
1961                 p += snprintf(p, &buf[sizeof(buf)] - p, "%" PRIx64, i64);
1962                 break;
1963             case 's':
1964                 addr = va_arg(va, target_ulong);
1965                 p += snprintf(p, &buf[sizeof(buf)] - p, TARGET_FMT_lx "/%x",
1966                               addr, va_arg(va, int));
1967                 break;
1968             default:
1969             bad_format:
1970                 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1971                         fmt - 1);
1972                 break;
1973             }
1974         } else {
1975             *(p++) = *(fmt++);
1976         }
1977     }
1978     *p = 0;
1979     va_end(va);
1980     put_packet(s, buf);
1981 #ifdef CONFIG_USER_ONLY
1982     gdb_handlesig(s->c_cpu, 0);
1983 #else
1984     cpu_interrupt(s->c_cpu, CPU_INTERRUPT_EXIT);
1985 #endif
1986 }
1987
1988 static void gdb_read_byte(GDBState *s, int ch)
1989 {
1990     int i, csum;
1991     uint8_t reply;
1992
1993 #ifndef CONFIG_USER_ONLY
1994     if (s->last_packet_len) {
1995         /* Waiting for a response to the last packet.  If we see the start
1996            of a new command then abandon the previous response.  */
1997         if (ch == '-') {
1998 #ifdef DEBUG_GDB
1999             printf("Got NACK, retransmitting\n");
2000 #endif
2001             put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
2002         }
2003 #ifdef DEBUG_GDB
2004         else if (ch == '+')
2005             printf("Got ACK\n");
2006         else
2007             printf("Got '%c' when expecting ACK/NACK\n", ch);
2008 #endif
2009         if (ch == '+' || ch == '$')
2010             s->last_packet_len = 0;
2011         if (ch != '$')
2012             return;
2013     }
2014     if (vm_running) {
2015         /* when the CPU is running, we cannot do anything except stop
2016            it when receiving a char */
2017         vm_stop(EXCP_INTERRUPT);
2018     } else
2019 #endif
2020     {
2021         switch(s->state) {
2022         case RS_IDLE:
2023             if (ch == '$') {
2024                 s->line_buf_index = 0;
2025                 s->state = RS_GETLINE;
2026             }
2027             break;
2028         case RS_GETLINE:
2029             if (ch == '#') {
2030             s->state = RS_CHKSUM1;
2031             } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
2032                 s->state = RS_IDLE;
2033             } else {
2034             s->line_buf[s->line_buf_index++] = ch;
2035             }
2036             break;
2037         case RS_CHKSUM1:
2038             s->line_buf[s->line_buf_index] = '\0';
2039             s->line_csum = fromhex(ch) << 4;
2040             s->state = RS_CHKSUM2;
2041             break;
2042         case RS_CHKSUM2:
2043             s->line_csum |= fromhex(ch);
2044             csum = 0;
2045             for(i = 0; i < s->line_buf_index; i++) {
2046                 csum += s->line_buf[i];
2047             }
2048             if (s->line_csum != (csum & 0xff)) {
2049                 reply = '-';
2050                 put_buffer(s, &reply, 1);
2051                 s->state = RS_IDLE;
2052             } else {
2053                 reply = '+';
2054                 put_buffer(s, &reply, 1);
2055                 s->state = gdb_handle_packet(s, s->line_buf);
2056             }
2057             break;
2058         default:
2059             abort();
2060         }
2061     }
2062 }
2063
2064 #ifdef CONFIG_USER_ONLY
2065 int
2066 gdb_queuesig (void)
2067 {
2068     GDBState *s;
2069
2070     s = gdbserver_state;
2071
2072     if (gdbserver_fd < 0 || s->fd < 0)
2073         return 0;
2074     else
2075         return 1;
2076 }
2077
2078 int
2079 gdb_handlesig (CPUState *env, int sig)
2080 {
2081   GDBState *s;
2082   char buf[256];
2083   int n;
2084
2085   s = gdbserver_state;
2086   if (gdbserver_fd < 0 || s->fd < 0)
2087     return sig;
2088
2089   /* disable single step if it was enabled */
2090   cpu_single_step(env, 0);
2091   tb_flush(env);
2092
2093   if (sig != 0)
2094     {
2095       snprintf(buf, sizeof(buf), "S%02x", target_signal_to_gdb (sig));
2096       put_packet(s, buf);
2097     }
2098   /* put_packet() might have detected that the peer terminated the
2099      connection.  */
2100   if (s->fd < 0)
2101       return sig;
2102
2103   sig = 0;
2104   s->state = RS_IDLE;
2105   s->running_state = 0;
2106   while (s->running_state == 0) {
2107       n = read (s->fd, buf, 256);
2108       if (n > 0)
2109         {
2110           int i;
2111
2112           for (i = 0; i < n; i++)
2113             gdb_read_byte (s, buf[i]);
2114         }
2115       else if (n == 0 || errno != EAGAIN)
2116         {
2117           /* XXX: Connection closed.  Should probably wait for annother
2118              connection before continuing.  */
2119           return sig;
2120         }
2121   }
2122   sig = s->signal;
2123   s->signal = 0;
2124   return sig;
2125 }
2126
2127 /* Tell the remote gdb that the process has exited.  */
2128 void gdb_exit(CPUState *env, int code)
2129 {
2130   GDBState *s;
2131   char buf[4];
2132
2133   s = gdbserver_state;
2134   if (gdbserver_fd < 0 || s->fd < 0)
2135     return;
2136
2137   snprintf(buf, sizeof(buf), "W%02x", code);
2138   put_packet(s, buf);
2139 }
2140
2141 /* Tell the remote gdb that the process has exited due to SIG.  */
2142 void gdb_signalled(CPUState *env, int sig)
2143 {
2144   GDBState *s;
2145   char buf[4];
2146
2147   s = gdbserver_state;
2148   if (gdbserver_fd < 0 || s->fd < 0)
2149     return;
2150
2151   snprintf(buf, sizeof(buf), "X%02x", target_signal_to_gdb (sig));
2152   put_packet(s, buf);
2153 }
2154
2155 static void gdb_accept(void)
2156 {
2157     GDBState *s;
2158     struct sockaddr_in sockaddr;
2159     socklen_t len;
2160     int val, fd;
2161
2162     for(;;) {
2163         len = sizeof(sockaddr);
2164         fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
2165         if (fd < 0 && errno != EINTR) {
2166             perror("accept");
2167             return;
2168         } else if (fd >= 0) {
2169             break;
2170         }
2171     }
2172
2173     /* set short latency */
2174     val = 1;
2175     setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
2176
2177     s = qemu_mallocz(sizeof(GDBState));
2178     if (!s) {
2179         errno = ENOMEM;
2180         perror("accept");
2181         return;
2182     }
2183
2184     memset (s, 0, sizeof (GDBState));
2185     s->c_cpu = first_cpu;
2186     s->g_cpu = first_cpu;
2187     s->fd = fd;
2188     gdb_has_xml = 0;
2189
2190     gdbserver_state = s;
2191
2192     fcntl(fd, F_SETFL, O_NONBLOCK);
2193 }
2194
2195 static int gdbserver_open(int port)
2196 {
2197     struct sockaddr_in sockaddr;
2198     int fd, val, ret;
2199
2200     fd = socket(PF_INET, SOCK_STREAM, 0);
2201     if (fd < 0) {
2202         perror("socket");
2203         return -1;
2204     }
2205
2206     /* allow fast reuse */
2207     val = 1;
2208     setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
2209
2210     sockaddr.sin_family = AF_INET;
2211     sockaddr.sin_port = htons(port);
2212     sockaddr.sin_addr.s_addr = 0;
2213     ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
2214     if (ret < 0) {
2215         perror("bind");
2216         return -1;
2217     }
2218     ret = listen(fd, 0);
2219     if (ret < 0) {
2220         perror("listen");
2221         return -1;
2222     }
2223     return fd;
2224 }
2225
2226 int gdbserver_start(int port)
2227 {
2228     gdbserver_fd = gdbserver_open(port);
2229     if (gdbserver_fd < 0)
2230         return -1;
2231     /* accept connections */
2232     gdb_accept();
2233     return 0;
2234 }
2235
2236 /* Disable gdb stub for child processes.  */
2237 void gdbserver_fork(CPUState *env)
2238 {
2239     GDBState *s = gdbserver_state;
2240     if (gdbserver_fd < 0 || s->fd < 0)
2241       return;
2242     close(s->fd);
2243     s->fd = -1;
2244     cpu_breakpoint_remove_all(env, BP_GDB);
2245     cpu_watchpoint_remove_all(env, BP_GDB);
2246 }
2247 #else
2248 static int gdb_chr_can_receive(void *opaque)
2249 {
2250   /* We can handle an arbitrarily large amount of data.
2251    Pick the maximum packet size, which is as good as anything.  */
2252   return MAX_PACKET_LENGTH;
2253 }
2254
2255 static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
2256 {
2257     int i;
2258
2259     for (i = 0; i < size; i++) {
2260         gdb_read_byte(gdbserver_state, buf[i]);
2261     }
2262 }
2263
2264 static void gdb_chr_event(void *opaque, int event)
2265 {
2266     switch (event) {
2267     case CHR_EVENT_RESET:
2268         vm_stop(EXCP_INTERRUPT);
2269         gdb_has_xml = 0;
2270         break;
2271     default:
2272         break;
2273     }
2274 }
2275
2276 int gdbserver_start(const char *port)
2277 {
2278     GDBState *s;
2279     char gdbstub_port_name[128];
2280     int port_num;
2281     char *p;
2282     CharDriverState *chr;
2283
2284     if (!port || !*port)
2285       return -1;
2286
2287     port_num = strtol(port, &p, 10);
2288     if (*p == 0) {
2289         /* A numeric value is interpreted as a port number.  */
2290         snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
2291                  "tcp::%d,nowait,nodelay,server", port_num);
2292         port = gdbstub_port_name;
2293     }
2294
2295     chr = qemu_chr_open("gdb", port);
2296     if (!chr)
2297         return -1;
2298
2299     s = qemu_mallocz(sizeof(GDBState));
2300     if (!s) {
2301         return -1;
2302     }
2303     s->c_cpu = first_cpu;
2304     s->g_cpu = first_cpu;
2305     s->chr = chr;
2306     gdbserver_state = s;
2307     qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
2308                           gdb_chr_event, NULL);
2309     qemu_add_vm_stop_handler(gdb_vm_stopped, NULL);
2310     return 0;
2311 }
2312 #endif