hw/pc.c

   1 /*
   2  * QEMU PC System Emulator
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24 #include "hw.h"
  25 #include "pc.h"
  26 #include "fdc.h"
  27 #include "pci.h"
  28 #include "block.h"
  29 #include "sysemu.h"
  30 #include "audio/audio.h"
  31 #include "net.h"
  32 #include "smbus.h"
  33 #include "boards.h"
  34 #include "console.h"
  35 #include "fw_cfg.h"
  36
  37 #include "qemu-kvm.h"
  38
  39 /* output Bochs bios info messages */
  40 //#define DEBUG_BIOS
  41
  42 #define BIOS_FILENAME "bios.bin"
  43 #define VGABIOS_FILENAME "vgabios.bin"
  44 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
  45 #define EXTBOOT_FILENAME "extboot.bin"
  46
  47 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
  48
  49 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
  50 #define ACPI_DATA_SIZE       0x10000
  51 #define BIOS_CFG_IOPORT 0x510
  52
  53 #define MAX_IDE_BUS 2
  54
  55 static fdctrl_t *floppy_controller;
  56 static RTCState *rtc_state;
  57 static PITState *pit;
  58 static IOAPICState *ioapic;
  59 static PCIDevice *i440fx_state;
  60
  61 static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
  62 {
  63 }
  64
  65 /* MSDOS compatibility mode FPU exception support */
  66 static qemu_irq ferr_irq;
  67 /* XXX: add IGNNE support */
  68 void cpu_set_ferr(CPUX86State *s)
  69 {
  70     qemu_irq_raise(ferr_irq);
  71 }
  72
  73 static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
  74 {
  75     qemu_irq_lower(ferr_irq);
  76 }
  77
  78 /* TSC handling */
  79 uint64_t cpu_get_tsc(CPUX86State *env)
  80 {
  81     /* Note: when using kqemu, it is more logical to return the host TSC
  82        because kqemu does not trap the RDTSC instruction for
  83        performance reasons */
  84 #ifdef USE_KQEMU
  85     if (env->kqemu_enabled) {
  86         return cpu_get_real_ticks();
  87     } else
  88 #endif
  89     {
  90         return cpu_get_ticks();
  91     }
  92 }
  93
  94 /* SMM support */
  95 void cpu_smm_update(CPUState *env)
  96 {
  97     if (i440fx_state && env == first_cpu)
  98         i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
  99 }
 100
 101
 102 /* IRQ handling */
 103 int cpu_get_pic_interrupt(CPUState *env)
 104 {
 105     int intno;
 106
 107     intno = apic_get_interrupt(env);
 108     if (intno >= 0) {
 109         /* set irq request if a PIC irq is still pending */
 110         /* XXX: improve that */
 111         pic_update_irq(isa_pic);
 112         return intno;
 113     }
 114     /* read the irq from the PIC */
 115     if (!apic_accept_pic_intr(env))
 116         return -1;
 117
 118     intno = pic_read_irq(isa_pic);
 119     return intno;
 120 }
 121
 122 static void pic_irq_request(void *opaque, int irq, int level)
 123 {
 124     CPUState *env = first_cpu;
 125
 126     if (env->apic_state) {
 127         while (env) {
 128             if (apic_accept_pic_intr(env))
 129                 apic_deliver_pic_intr(env, level);
 130             env = env->next_cpu;
 131         }
 132     } else {
 133         if (level)
 134             cpu_interrupt(env, CPU_INTERRUPT_HARD);
 135         else
 136             cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
 137     }
 138 }
 139
 140 /* PC cmos mappings */
 141
 142 #define REG_EQUIPMENT_BYTE          0x14
 143
 144 static int cmos_get_fd_drive_type(int fd0)
 145 {
 146     int val;
 147
 148     switch (fd0) {
 149     case 0:
 150         /* 1.44 Mb 3"5 drive */
 151         val = 4;
 152         break;
 153     case 1:
 154         /* 2.88 Mb 3"5 drive */
 155         val = 5;
 156         break;
 157     case 2:
 158         /* 1.2 Mb 5"5 drive */
 159         val = 2;
 160         break;
 161     default:
 162         val = 0;
 163         break;
 164     }
 165     return val;
 166 }
 167
 168 static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
 169 {
 170     RTCState *s = rtc_state;
 171     int cylinders, heads, sectors;
 172     bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
 173     rtc_set_memory(s, type_ofs, 47);
 174     rtc_set_memory(s, info_ofs, cylinders);
 175     rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
 176     rtc_set_memory(s, info_ofs + 2, heads);
 177     rtc_set_memory(s, info_ofs + 3, 0xff);
 178     rtc_set_memory(s, info_ofs + 4, 0xff);
 179     rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
 180     rtc_set_memory(s, info_ofs + 6, cylinders);
 181     rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
 182     rtc_set_memory(s, info_ofs + 8, sectors);
 183 }
 184
 185 /* convert boot_device letter to something recognizable by the bios */
 186 static int boot_device2nibble(char boot_device)
 187 {
 188     switch(boot_device) {
 189     case 'a':
 190     case 'b':
 191         return 0x01; /* floppy boot */
 192     case 'c':
 193         return 0x02; /* hard drive boot */
 194     case 'd':
 195         return 0x03; /* CD-ROM boot */
 196     case 'n':
 197         return 0x04; /* Network boot */
 198     }
 199     return 0;
 200 }
 201
 202 /* copy/pasted from cmos_init, should be made a general function
 203  and used there as well */
 204 static int pc_boot_set(void *opaque, const char *boot_device)
 205 {
 206 #define PC_MAX_BOOT_DEVICES 3
 207     RTCState *s = (RTCState *)opaque;
 208     int nbds, bds[3] = { 0, };
 209     int i;
 210
 211     nbds = strlen(boot_device);
 212     if (nbds > PC_MAX_BOOT_DEVICES) {
 213         term_printf("Too many boot devices for PC\n");
 214         return(1);
 215     }
 216     for (i = 0; i < nbds; i++) {
 217         bds[i] = boot_device2nibble(boot_device[i]);
 218         if (bds[i] == 0) {
 219             term_printf("Invalid boot device for PC: '%c'\n",
 220                     boot_device[i]);
 221             return(1);
 222         }
 223     }
 224     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 225     rtc_set_memory(s, 0x38, (bds[2] << 4));
 226     return(0);
 227 }
 228
 229 /* hd_table must contain 4 block drivers */
 230 static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
 231                       const char *boot_device, BlockDriverState **hd_table,
 232                       int smp_cpus)
 233 {
 234     RTCState *s = rtc_state;
 235     int nbds, bds[3] = { 0, };
 236     int val;
 237     int fd0, fd1, nb;
 238     int i;
 239
 240     /* various important CMOS locations needed by PC/Bochs bios */
 241
 242     /* memory size */
 243     val = 640; /* base memory in K */
 244     rtc_set_memory(s, 0x15, val);
 245     rtc_set_memory(s, 0x16, val >> 8);
 246
 247     val = (ram_size / 1024) - 1024;
 248     if (val > 65535)
 249         val = 65535;
 250     rtc_set_memory(s, 0x17, val);
 251     rtc_set_memory(s, 0x18, val >> 8);
 252     rtc_set_memory(s, 0x30, val);
 253     rtc_set_memory(s, 0x31, val >> 8);
 254
 255     if (above_4g_mem_size) {
 256         rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
 257         rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
 258         rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
 259     }
 260     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 261
 262     if (ram_size > (16 * 1024 * 1024))
 263         val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
 264     else
 265         val = 0;
 266     if (val > 65535)
 267         val = 65535;
 268     rtc_set_memory(s, 0x34, val);
 269     rtc_set_memory(s, 0x35, val >> 8);
 270
 271     /* set the number of CPU */
 272     rtc_set_memory(s, 0x5f, smp_cpus - 1);
 273
 274     /* set boot devices, and disable floppy signature check if requested */
 275 #define PC_MAX_BOOT_DEVICES 3
 276     nbds = strlen(boot_device);
 277     if (nbds > PC_MAX_BOOT_DEVICES) {
 278         fprintf(stderr, "Too many boot devices for PC\n");
 279         exit(1);
 280     }
 281     for (i = 0; i < nbds; i++) {
 282         bds[i] = boot_device2nibble(boot_device[i]);
 283         if (bds[i] == 0) {
 284             fprintf(stderr, "Invalid boot device for PC: '%c'\n",
 285                     boot_device[i]);
 286             exit(1);
 287         }
 288     }
 289     rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
 290     rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
 291
 292     /* floppy type */
 293
 294     fd0 = fdctrl_get_drive_type(floppy_controller, 0);
 295     fd1 = fdctrl_get_drive_type(floppy_controller, 1);
 296
 297     val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
 298     rtc_set_memory(s, 0x10, val);
 299
 300     val = 0;
 301     nb = 0;
 302     if (fd0 < 3)
 303         nb++;
 304     if (fd1 < 3)
 305         nb++;
 306     switch (nb) {
 307     case 0:
 308         break;
 309     case 1:
 310         val |= 0x01; /* 1 drive, ready for boot */
 311         break;
 312     case 2:
 313         val |= 0x41; /* 2 drives, ready for boot */
 314         break;
 315     }
 316     val |= 0x02; /* FPU is there */
 317     val |= 0x04; /* PS/2 mouse installed */
 318     rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
 319
 320     /* hard drives */
 321
 322     rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
 323     if (hd_table[0])
 324         cmos_init_hd(0x19, 0x1b, hd_table[0]);
 325     if (hd_table[1])
 326         cmos_init_hd(0x1a, 0x24, hd_table[1]);
 327
 328     val = 0;
 329     for (i = 0; i < 4; i++) {
 330         if (hd_table[i]) {
 331             int cylinders, heads, sectors, translation;
 332             /* NOTE: bdrv_get_geometry_hint() returns the physical
 333                 geometry.  It is always such that: 1 <= sects <= 63, 1
 334                 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
 335                 geometry can be different if a translation is done. */
 336             translation = bdrv_get_translation_hint(hd_table[i]);
 337             if (translation == BIOS_ATA_TRANSLATION_AUTO) {
 338                 bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
 339                 if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
 340                     /* No translation. */
 341                     translation = 0;
 342                 } else {
 343                     /* LBA translation. */
 344                     translation = 1;
 345                 }
 346             } else {
 347                 translation--;
 348             }
 349             val |= translation << (i * 2);
 350         }
 351     }
 352     rtc_set_memory(s, 0x39, val);
 353 }
 354
 355 void ioport_set_a20(int enable)
 356 {
 357     /* XXX: send to all CPUs ? */
 358     cpu_x86_set_a20(first_cpu, enable);
 359 }
 360
 361 int ioport_get_a20(void)
 362 {
 363     return ((first_cpu->a20_mask >> 20) & 1);
 364 }
 365
 366 static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
 367 {
 368     ioport_set_a20((val >> 1) & 1);
 369     /* XXX: bit 0 is fast reset */
 370 }
 371
 372 static uint32_t ioport92_read(void *opaque, uint32_t addr)
 373 {
 374     return ioport_get_a20() << 1;
 375 }
 376
 377 /***********************************************************/
 378 /* Bochs BIOS debug ports */
 379
 380 static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
 381 {
 382     static const char shutdown_str[8] = "Shutdown";
 383     static int shutdown_index = 0;
 384
 385     switch(addr) {
 386         /* Bochs BIOS messages */
 387     case 0x400:
 388     case 0x401:
 389         fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
 390         exit(1);
 391     case 0x402:
 392     case 0x403:
 393 #ifdef DEBUG_BIOS
 394         fprintf(stderr, "%c", val);
 395 #endif
 396         break;
 397     case 0x8900:
 398         /* same as Bochs power off */
 399         if (val == shutdown_str[shutdown_index]) {
 400             shutdown_index++;
 401             if (shutdown_index == 8) {
 402                 shutdown_index = 0;
 403                 qemu_system_shutdown_request();
 404             }
 405         } else {
 406             shutdown_index = 0;
 407         }
 408         break;
 409
 410         /* LGPL'ed VGA BIOS messages */
 411     case 0x501:
 412     case 0x502:
 413         fprintf(stderr, "VGA BIOS panic, line %d\n", val);
 414         exit(1);
 415     case 0x500:
 416     case 0x503:
 417 #ifdef DEBUG_BIOS
 418         fprintf(stderr, "%c", val);
 419 #endif
 420         break;
 421     }
 422 }
 423
 424 static void bochs_bios_init(void)
 425 {
 426     void *fw_cfg;
 427
 428     register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
 429     register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
 430     register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
 431     register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
 432     register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
 433
 434     register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
 435     register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
 436     register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
 437     register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
 438
 439     fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
 440     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 441     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 442 }
 443
 444 /* Generate an initial boot sector which sets state and jump to
 445    a specified vector */
 446 static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
 447 {
 448     uint8_t bootsect[512], *p;
 449     int i;
 450     int hda = extboot_drive;
 451
 452     if (hda == -1)
 453       hda = drive_get_index(IF_IDE, 0, 0);
 454     if (hda == -1) {
 455         fprintf(stderr, "A disk image must be given for 'hda' when booting "
 456                 "a Linux kernel\n(if you really don't want it, use /dev/zero)\n");
 457         exit(1);
 458     }
 459
 460     memset(bootsect, 0, sizeof(bootsect));
 461
 462     /* Copy the MSDOS partition table if possible */
 463     bdrv_read(drives_table[hda].bdrv, 0, bootsect, 1);
 464
 465     /* Make sure we have a partition signature */
 466     bootsect[510] = 0x55;
 467     bootsect[511] = 0xaa;
 468
 469     /* Actual code */
 470     p = bootsect;
 471     *p++ = 0xfa;                /* CLI */
 472     *p++ = 0xfc;                /* CLD */
 473
 474     for (i = 0; i < 6; i++) {
 475         if (i == 1)             /* Skip CS */
 476             continue;
 477
 478         *p++ = 0xb8;            /* MOV AX,imm16 */
 479         *p++ = segs[i];
 480         *p++ = segs[i] >> 8;
 481         *p++ = 0x8e;            /* MOV <seg>,AX */
 482         *p++ = 0xc0 + (i << 3);
 483     }
 484
 485     for (i = 0; i < 8; i++) {
 486         *p++ = 0x66;            /* 32-bit operand size */
 487         *p++ = 0xb8 + i;        /* MOV <reg>,imm32 */
 488         *p++ = gpr[i];
 489         *p++ = gpr[i] >> 8;
 490         *p++ = gpr[i] >> 16;
 491         *p++ = gpr[i] >> 24;
 492     }
 493
 494     *p++ = 0xea;                /* JMP FAR */
 495     *p++ = ip;                  /* IP */
 496     *p++ = ip >> 8;
 497     *p++ = segs[1];             /* CS */
 498     *p++ = segs[1] >> 8;
 499
 500     bdrv_set_boot_sector(drives_table[hda].bdrv, bootsect, sizeof(bootsect));
 501 }
 502
 503 static long get_file_size(FILE *f)
 504 {
 505     long where, size;
 506
 507     /* XXX: on Unix systems, using fstat() probably makes more sense */
 508
 509     where = ftell(f);
 510     fseek(f, 0, SEEK_END);
 511     size = ftell(f);
 512     fseek(f, where, SEEK_SET);
 513
 514     return size;
 515 }
 516
 517 static void load_linux(const char *kernel_filename,
 518                        const char *initrd_filename,
 519                        const char *kernel_cmdline)
 520 {
 521     uint16_t protocol;
 522     uint32_t gpr[8];
 523     uint16_t seg[6];
 524     uint16_t real_seg;
 525     int setup_size, kernel_size, initrd_size, cmdline_size;
 526     uint32_t initrd_max;
 527     uint8_t header[1024];
 528     target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr;
 529     FILE *f, *fi;
 530
 531     /* Align to 16 bytes as a paranoia measure */
 532     cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
 533
 534     /* load the kernel header */
 535     f = fopen(kernel_filename, "rb");
 536     if (!f || !(kernel_size = get_file_size(f)) ||
 537         fread(header, 1, 1024, f) != 1024) {
 538         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 539                 kernel_filename);
 540         exit(1);
 541     }
 542
 543     /* kernel protocol version */
 544 #if 0
 545     fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
 546 #endif
 547     if (ldl_p(header+0x202) == 0x53726448)
 548         protocol = lduw_p(header+0x206);
 549     else
 550         protocol = 0;
 551
 552     if (protocol < 0x200 || !(header[0x211] & 0x01)) {
 553         /* Low kernel */
 554         real_addr    = 0x90000;
 555         cmdline_addr = 0x9a000 - cmdline_size;
 556         prot_addr    = 0x10000;
 557     } else if (protocol < 0x202) {
 558         /* High but ancient kernel */
 559         real_addr    = 0x90000;
 560         cmdline_addr = 0x9a000 - cmdline_size;
 561         prot_addr    = 0x100000;
 562     } else {
 563         /* High and recent kernel */
 564         real_addr    = 0x10000;
 565         cmdline_addr = 0x20000;
 566         prot_addr    = 0x100000;
 567     }
 568
 569 #if 0
 570     fprintf(stderr,
 571             "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
 572             "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
 573             "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
 574             real_addr,
 575             cmdline_addr,
 576             prot_addr);
 577 #endif
 578
 579     /* highest address for loading the initrd */
 580     if (protocol >= 0x203)
 581         initrd_max = ldl_p(header+0x22c);
 582     else
 583         initrd_max = 0x37ffffff;
 584
 585     if (initrd_max >= ram_size-ACPI_DATA_SIZE)
 586         initrd_max = ram_size-ACPI_DATA_SIZE-1;
 587
 588     /* kernel command line */
 589     pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
 590
 591     if (protocol >= 0x202) {
 592         stl_p(header+0x228, cmdline_addr);
 593     } else {
 594         stw_p(header+0x20, 0xA33F);
 595         stw_p(header+0x22, cmdline_addr-real_addr);
 596     }
 597
 598     /* loader type */
 599     /* High nybble = B reserved for Qemu; low nybble is revision number.
 600        If this code is substantially changed, you may want to consider
 601        incrementing the revision. */
 602     if (protocol >= 0x200)
 603         header[0x210] = 0xB0;
 604
 605     /* heap */
 606     if (protocol >= 0x201) {
 607         header[0x211] |= 0x80;  /* CAN_USE_HEAP */
 608         stw_p(header+0x224, cmdline_addr-real_addr-0x200);
 609     }
 610
 611     /* load initrd */
 612     if (initrd_filename) {
 613         if (protocol < 0x200) {
 614             fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
 615             exit(1);
 616         }
 617
 618         fi = fopen(initrd_filename, "rb");
 619         if (!fi) {
 620             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 621                     initrd_filename);
 622             exit(1);
 623         }
 624
 625         initrd_size = get_file_size(fi);
 626         initrd_addr = (initrd_max-initrd_size) & ~4095;
 627
 628         fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx
 629                 "\n", initrd_size, initrd_addr);
 630
 631         if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
 632             fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
 633                     initrd_filename);
 634             exit(1);
 635         }
 636         fclose(fi);
 637
 638         stl_p(header+0x218, initrd_addr);
 639         stl_p(header+0x21c, initrd_size);
 640     }
 641
 642     /* store the finalized header and load the rest of the kernel */
 643     cpu_physical_memory_write(real_addr, header, 1024);
 644
 645     setup_size = header[0x1f1];
 646     if (setup_size == 0)
 647         setup_size = 4;
 648
 649     setup_size = (setup_size+1)*512;
 650     kernel_size -= setup_size;  /* Size of protected-mode code */
 651
 652     if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) ||
 653         !fread_targphys_ok(prot_addr, kernel_size, f)) {
 654         fprintf(stderr, "qemu: read error on kernel '%s'\n",
 655                 kernel_filename);
 656         exit(1);
 657     }
 658     fclose(f);
 659
 660     /* generate bootsector to set up the initial register state */
 661     real_seg = real_addr >> 4;
 662     seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
 663     seg[1] = real_seg+0x20;     /* CS */
 664     memset(gpr, 0, sizeof gpr);
 665     gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */
 666
 667     generate_bootsect(gpr, seg, 0);
 668 }
 669
 670 static void main_cpu_reset(void *opaque)
 671 {
 672     CPUState *env = opaque;
 673     cpu_reset(env);
 674 }
 675
 676 static const int ide_iobase[2] = { 0x1f0, 0x170 };
 677 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
 678 static const int ide_irq[2] = { 14, 15 };
 679
 680 #define NE2000_NB_MAX 6
 681
 682 static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
 683 static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
 684
 685 static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
 686 static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
 687
 688 static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
 689 static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
 690
 691 #ifdef HAS_AUDIO
 692 static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
 693 {
 694     struct soundhw *c;
 695     int audio_enabled = 0;
 696
 697     for (c = soundhw; !audio_enabled && c->name; ++c) {
 698         audio_enabled = c->enabled;
 699     }
 700
 701     if (audio_enabled) {
 702         AudioState *s;
 703
 704         s = AUD_init ();
 705         if (s) {
 706             for (c = soundhw; c->name; ++c) {
 707                 if (c->enabled) {
 708                     if (c->isa) {
 709                         c->init.init_isa (s, pic);
 710                     }
 711                     else {
 712                         if (pci_bus) {
 713                             c->init.init_pci (pci_bus, s);
 714                         }
 715                     }
 716                 }
 717             }
 718         }
 719     }
 720 }
 721 #endif
 722
 723 static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
 724 {
 725     static int nb_ne2k = 0;
 726
 727     if (nb_ne2k == NE2000_NB_MAX)
 728         return;
 729     isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
 730     nb_ne2k++;
 731 }
 732
 733 typedef struct rom_reset_data {
 734     uint8_t *data;
 735     target_phys_addr_t addr;
 736     unsigned size;
 737 } RomResetData;
 738
 739 static void option_rom_reset(void *_rrd)
 740 {
 741     RomResetData *rrd = _rrd;
 742
 743     cpu_physical_memory_write_rom(rrd->addr, rrd->data, rrd->size);
 744 }
 745
 746 static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size)
 747 {
 748     RomResetData *rrd = qemu_malloc(sizeof *rrd);
 749
 750     rrd->data = qemu_malloc(size);
 751     cpu_physical_memory_read(addr, rrd->data, size);
 752     rrd->addr = addr;
 753     rrd->size = size;
 754     qemu_register_reset(option_rom_reset, rrd);
 755 }
 756
 757 static int load_option_rom(const char *filename, int offset, int type)
 758 {
 759     ram_addr_t option_rom_offset;
 760     int size, ret;
 761
 762     size = get_image_size(filename);
 763     if (size < 0) {
 764         fprintf(stderr, "Could not load option rom '%s'\n", filename);
 765         exit(1);
 766     }
 767     if (size > (0x10000 - offset))
 768         goto option_rom_error;
 769     option_rom_offset = qemu_ram_alloc(size);
 770     ret = load_image(filename, phys_ram_base + option_rom_offset);
 771     if (ret != size) {
 772     option_rom_error:
 773         fprintf(stderr, "Too many option ROMS\n");
 774         exit(1);
 775     }
 776     size = (size + 4095) & ~4095;
 777     cpu_register_physical_memory(0xd0000 + offset,
 778                                  size, option_rom_offset | type);
 779     option_rom_setup_reset(0xd0000 + offset, size);
 780
 781     return size;
 782 }
 783
 784 CPUState *pc_new_cpu(int cpu, const char *cpu_model, int pci_enabled)
 785 {
 786         CPUState *env = cpu_init(cpu_model);
 787         if (!env) {
 788             fprintf(stderr, "Unable to find x86 CPU definition\n");
 789             exit(1);
 790         }
 791         if (cpu != 0)
 792             env->halted = 1;
 793         if (smp_cpus > 1) {
 794             /* XXX: enable it in all cases */
 795             env->cpuid_features |= CPUID_APIC;
 796         }
 797         qemu_register_reset(main_cpu_reset, env);
 798         if (pci_enabled) {
 799             apic_init(env);
 800         }
 801         return env;
 802 }
 803
 804 /* PC hardware initialisation */
 805 static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
 806                      const char *boot_device, DisplayState *ds,
 807                      const char *kernel_filename, const char *kernel_cmdline,
 808                      const char *initrd_filename,
 809                      int pci_enabled, const char *cpu_model)
 810 {
 811     char buf[1024];
 812     int ret, linux_boot, i;
 813     ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
 814     ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
 815     int bios_size, isa_bios_size, vga_bios_size, opt_rom_offset;
 816     PCIBus *pci_bus;
 817     int piix3_devfn = -1;
 818     CPUState *env;
 819     NICInfo *nd;
 820     qemu_irq *cpu_irq;
 821     qemu_irq *i8259;
 822     int index;
 823     BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 824     BlockDriverState *fd[MAX_FD];
 825
 826     if (ram_size >= 0xe0000000 ) {
 827         above_4g_mem_size = ram_size - 0xe0000000;
 828         below_4g_mem_size = 0xe0000000;
 829     } else {
 830         below_4g_mem_size = ram_size;
 831     }
 832
 833     linux_boot = (kernel_filename != NULL);
 834
 835     /* init CPUs */
 836     if (cpu_model == NULL) {
 837 #ifdef TARGET_X86_64
 838         cpu_model = "qemu64";
 839 #else
 840         cpu_model = "qemu32";
 841 #endif
 842     }
 843
 844     for(i = 0; i < smp_cpus; i++) {
 845         env = pc_new_cpu(i, cpu_model, pci_enabled);
 846     }
 847
 848     vmport_init();
 849
 850     /* allocate RAM */
 851     ram_addr = qemu_ram_alloc(0xa0000);
 852     cpu_register_physical_memory(0, 0xa0000, ram_addr);
 853
 854     /* Allocate, even though we won't register, so we don't break the
 855      * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
 856      * and some bios areas, which will be registered later
 857      */
 858     ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
 859     ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
 860     cpu_register_physical_memory(0x100000,
 861                  below_4g_mem_size - 0x100000,
 862                  ram_addr);
 863
 864     /* above 4giga memory allocation */
 865     if (above_4g_mem_size > 0) {
 866         if (hpagesize) {
 867             if (ram_addr & (hpagesize-1)) {
 868                 unsigned long aligned_addr;
 869                 aligned_addr = (ram_addr + hpagesize - 1) & ~(hpagesize-1);
 870                 qemu_ram_alloc(aligned_addr - ram_addr);
 871                 ram_addr = aligned_addr;
 872             }
 873         }
 874         ram_addr = qemu_ram_alloc(above_4g_mem_size);
 875         cpu_register_physical_memory(0x100000000ULL,
 876                                      above_4g_mem_size,
 877                                      ram_addr);
 878     }
 879
 880     /* allocate VGA RAM */
 881     vga_ram_addr = qemu_ram_alloc(vga_ram_size);
 882
 883     /* BIOS load */
 884     if (bios_name == NULL)
 885         bios_name = BIOS_FILENAME;
 886     snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
 887     bios_size = get_image_size(buf);
 888     if (bios_size <= 0 ||
 889         (bios_size % 65536) != 0) {
 890         goto bios_error;
 891     }
 892     bios_offset = qemu_ram_alloc(bios_size);
 893     ret = load_image(buf, phys_ram_base + bios_offset);
 894     if (ret != bios_size) {
 895     bios_error:
 896         fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
 897         exit(1);
 898     }
 899
 900     /* VGA BIOS load */
 901     if (cirrus_vga_enabled) {
 902         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
 903     } else {
 904         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
 905     }
 906     vga_bios_size = get_image_size(buf);
 907     if (vga_bios_size <= 0 || vga_bios_size > 65536)
 908         goto vga_bios_error;
 909     vga_bios_offset = qemu_ram_alloc(65536);
 910
 911     ret = load_image(buf, phys_ram_base + vga_bios_offset);
 912     if (ret != vga_bios_size) {
 913     vga_bios_error:
 914         fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
 915         exit(1);
 916     }
 917
 918     /* setup basic memory access */
 919     cpu_register_physical_memory(0xc0000, 0x10000,
 920                                  vga_bios_offset | IO_MEM_ROM);
 921
 922     /* map the last 128KB of the BIOS in ISA space */
 923     isa_bios_size = bios_size;
 924     if (isa_bios_size > (128 * 1024))
 925         isa_bios_size = 128 * 1024;
 926     cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
 927                                  IO_MEM_UNASSIGNED);
 928     /* kvm tpr optimization needs the bios accessible for write, at least to qemu itself */
 929     cpu_register_physical_memory(0x100000 - isa_bios_size,
 930                                  isa_bios_size,
 931                                  (bios_offset + bios_size - isa_bios_size) /* | IO_MEM_ROM */);
 932
 933     /* XXX: for DDIM support, "ROM space" should be writable during
 934        initialization, and (optionally) marked readonly by the BIOS
 935        before INT 19h.  See the PNPBIOS specification, appendix B.
 936        DDIM support is mandatory for proper PCI expansion ROM support. */
 937     opt_rom_offset = 0;
 938     for (i = 0; i < nb_option_roms; i++)
 939         opt_rom_offset += load_option_rom(option_rom[i], opt_rom_offset,
 940                                           IO_MEM_ROM);
 941
 942     if (extboot_drive != -1) {
 943         snprintf(buf, sizeof(buf), "%s/%s", bios_dir, EXTBOOT_FILENAME);
 944         opt_rom_offset += load_option_rom(buf, opt_rom_offset, IO_MEM_RAM);
 945     }
 946
 947     /* map all the bios at the top of memory */
 948     cpu_register_physical_memory((uint32_t)(-bios_size),
 949                                  bios_size, bios_offset | IO_MEM_ROM);
 950
 951     bochs_bios_init();
 952
 953     if (linux_boot)
 954         load_linux(kernel_filename, initrd_filename, kernel_cmdline);
 955
 956     cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
 957     i8259 = i8259_init(cpu_irq[0]);
 958     ferr_irq = i8259[13];
 959
 960     if (pci_enabled) {
 961         pci_bus = i440fx_init(&i440fx_state, i8259);
 962         piix3_devfn = piix3_init(pci_bus, -1);
 963     } else {
 964         pci_bus = NULL;
 965     }
 966
 967     /* init basic PC hardware */
 968     register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
 969
 970     register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
 971
 972     if (cirrus_vga_enabled) {
 973         if (pci_enabled) {
 974             pci_cirrus_vga_init(pci_bus,
 975                                 ds, phys_ram_base + vga_ram_addr,
 976                                 vga_ram_addr, vga_ram_size);
 977         } else {
 978             isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr,
 979                                 vga_ram_addr, vga_ram_size);
 980         }
 981     } else if (vmsvga_enabled) {
 982         if (pci_enabled)
 983             pci_vmsvga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
 984                             vga_ram_addr, vga_ram_size);
 985         else
 986             fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
 987     } else {
 988         if (pci_enabled) {
 989             pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr,
 990                          vga_ram_addr, vga_ram_size, 0, 0);
 991         } else {
 992             isa_vga_init(ds, phys_ram_base + vga_ram_addr,
 993                          vga_ram_addr, vga_ram_size);
 994         }
 995     }
 996
 997     rtc_state = rtc_init(0x70, i8259[8]);
 998
 999     qemu_register_boot_set(pc_boot_set, rtc_state);
1000
1001     register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1002     register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1003
1004     if (pci_enabled) {
1005         ioapic = ioapic_init();
1006     }
1007 #ifdef USE_KVM_PIT
1008     if (kvm_enabled() && qemu_kvm_pit_in_kernel())
1009         pit = kvm_pit_init(0x40, i8259[0]);
1010     else
1011 #endif
1012         pit = pit_init(0x40, i8259[0]);
1013     pcspk_init(pit);
1014     if (pci_enabled) {
1015         pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
1016     }
1017
1018     for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1019         if (serial_hds[i]) {
1020             serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
1021                         serial_hds[i]);
1022         }
1023     }
1024
1025     for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1026         if (parallel_hds[i]) {
1027             parallel_init(parallel_io[i], i8259[parallel_irq[i]],
1028                           parallel_hds[i]);
1029         }
1030     }
1031
1032     for(i = 0; i < nb_nics; i++) {
1033         nd = &nd_table[i];
1034         if (!nd->model) {
1035             if (pci_enabled) {
1036                 nd->model = "rtl8139";
1037             } else {
1038                 nd->model = "ne2k_isa";
1039             }
1040         }
1041         if (strcmp(nd->model, "ne2k_isa") == 0) {
1042             pc_init_ne2k_isa(nd, i8259);
1043         } else if (pci_enabled) {
1044             if (strcmp(nd->model, "?") == 0)
1045                 fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
1046             if (!pci_nic_init(pci_bus, nd, -1))
1047                 exit(1);
1048         } else if (strcmp(nd->model, "?") == 0) {
1049             fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
1050             exit(1);
1051         } else {
1052             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
1053             exit(1);
1054         }
1055     }
1056
1057     qemu_system_hot_add_init(cpu_model);
1058
1059     if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1060         fprintf(stderr, "qemu: too many IDE bus\n");
1061         exit(1);
1062     }
1063
1064     for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1065         index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1066         if (index != -1)
1067             hd[i] = drives_table[index].bdrv;
1068         else
1069             hd[i] = NULL;
1070     }
1071
1072     if (pci_enabled) {
1073         pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
1074     } else {
1075         for(i = 0; i < MAX_IDE_BUS; i++) {
1076             isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]],
1077                          hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1078         }
1079     }
1080
1081     i8042_init(i8259[1], i8259[12], 0x60);
1082     DMA_init(0);
1083 #ifdef HAS_AUDIO
1084     audio_init(pci_enabled ? pci_bus : NULL, i8259);
1085 #endif
1086
1087     for(i = 0; i < MAX_FD; i++) {
1088         index = drive_get_index(IF_FLOPPY, 0, i);
1089         if (index != -1)
1090             fd[i] = drives_table[index].bdrv;
1091         else
1092             fd[i] = NULL;
1093     }
1094     floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd);
1095
1096     cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd,
1097               smp_cpus);
1098
1099     if (pci_enabled && usb_enabled) {
1100         usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1101     }
1102
1103     if (pci_enabled && acpi_enabled) {
1104         uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1105         i2c_bus *smbus;
1106
1107         /* TODO: Populate SPD eeprom data.  */
1108         smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]);
1109         for (i = 0; i < 8; i++) {
1110             smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256));
1111         }
1112     }
1113
1114     if (i440fx_state) {
1115         i440fx_init_memory_mappings(i440fx_state);
1116     }
1117
1118     if (pci_enabled) {
1119         int max_bus;
1120         int bus, unit;
1121         void *scsi;
1122
1123         max_bus = drive_get_max_bus(IF_SCSI);
1124
1125         for (bus = 0; bus <= max_bus; bus++) {
1126             scsi = lsi_scsi_init(pci_bus, -1);
1127             for (unit = 0; unit < LSI_MAX_DEVS; unit++) {
1128                 index = drive_get_index(IF_SCSI, bus, unit);
1129                 if (index == -1)
1130                     continue;
1131                 lsi_scsi_attach(scsi, drives_table[index].bdrv, unit);
1132             }
1133         }
1134     }
1135
1136     /* Add virtio block devices */
1137     if (pci_enabled) {
1138         int index;
1139         int unit_id = 0;
1140
1141         while ((index = drive_get_index(IF_VIRTIO, 0, unit_id)) != -1) {
1142             virtio_blk_init(pci_bus, 0x1AF4, 0x1001,
1143                             drives_table[index].bdrv);
1144             unit_id++;
1145         }
1146     }
1147
1148     if (extboot_drive != -1) {
1149         DriveInfo *info = &drives_table[extboot_drive];
1150         int cyls, heads, secs;
1151
1152         if (info->type != IF_IDE && info->type != IF_VIRTIO) {
1153             bdrv_guess_geometry(info->bdrv, &cyls, &heads, &secs);
1154             bdrv_set_geometry_hint(info->bdrv, cyls, heads, secs);
1155         }
1156
1157         extboot_init(info->bdrv, 1);
1158     }
1159
1160     if (pci_enabled)
1161         virtio_balloon_init(pci_bus);
1162 }
1163
1164 static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size,
1165                         const char *boot_device, DisplayState *ds,
1166                         const char *kernel_filename,
1167                         const char *kernel_cmdline,
1168                         const char *initrd_filename,
1169                         const char *cpu_model)
1170 {
1171     pc_init1(ram_size, vga_ram_size, boot_device, ds,
1172              kernel_filename, kernel_cmdline,
1173              initrd_filename, 1, cpu_model);
1174 }
1175
1176 static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size,
1177                         const char *boot_device, DisplayState *ds,
1178                         const char *kernel_filename,
1179                         const char *kernel_cmdline,
1180                         const char *initrd_filename,
1181                         const char *cpu_model)
1182 {
1183     pc_init1(ram_size, vga_ram_size, boot_device, ds,
1184              kernel_filename, kernel_cmdline,
1185              initrd_filename, 0, cpu_model);
1186 }
1187
1188 QEMUMachine pc_machine = {
1189     .name = "pc",
1190     .desc = "Standard PC",
1191     .init = pc_init_pci,
1192     .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1193 };
1194
1195 QEMUMachine isapc_machine = {
1196     .name = "isapc",
1197     .desc = "ISA-only PC",
1198     .init = pc_init_isa,
1199     .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE,
1200 };