Fix 32-bit overflow in parallels image support
[qemu-kvm/fedora.git] / dyngen-exec.h
blobc0077634e51b467308761f1e3182e0de6eba971d
1 /*
2 * dyngen defines for micro operation code
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #if !defined(__DYNGEN_EXEC_H__)
20 #define __DYNGEN_EXEC_H__
22 /* prevent Solaris from trying to typedef FILE in gcc's
23 include/floatingpoint.h which will conflict with the
24 definition down below */
25 #ifdef __sun__
26 #define _FILEDEFED
27 #endif
29 /* NOTE: standard headers should be used with special care at this
30 point because host CPU registers are used as global variables. Some
31 host headers do not allow that. */
32 #include <stddef.h>
33 #include <stdint.h>
35 #ifdef __OpenBSD__
36 #include <sys/types.h>
37 #endif
39 /* XXX: This may be wrong for 64-bit ILP32 hosts. */
40 typedef void * host_reg_t;
42 #ifdef HOST_BSD
43 typedef struct __sFILE FILE;
44 #else
45 typedef struct FILE FILE;
46 #endif
47 extern int fprintf(FILE *, const char *, ...);
48 extern int fputs(const char *, FILE *);
49 extern int printf(const char *, ...);
50 #undef NULL
51 #define NULL 0
53 #if defined(__i386__)
54 #define AREG0 "ebp"
55 #define AREG1 "ebx"
56 #define AREG2 "esi"
57 #elif defined(__x86_64__)
58 #define AREG0 "r14"
59 #define AREG1 "r15"
60 #define AREG2 "r12"
61 #elif defined(_ARCH_PPC)
62 #define AREG0 "r27"
63 #define AREG1 "r24"
64 #define AREG2 "r25"
65 #elif defined(__arm__)
66 #define AREG0 "r7"
67 #define AREG1 "r4"
68 #define AREG2 "r5"
69 #elif defined(__hppa__)
70 #define AREG0 "r17"
71 #define AREG1 "r14"
72 #define AREG2 "r15"
73 #elif defined(__mips__)
74 #define AREG0 "fp"
75 #define AREG1 "s0"
76 #define AREG2 "s1"
77 #elif defined(__sparc__)
78 #ifdef HOST_SOLARIS
79 #define AREG0 "g2"
80 #define AREG1 "g3"
81 #define AREG2 "g4"
82 #else
83 #ifdef __sparc_v9__
84 #define AREG0 "g5"
85 #define AREG1 "g6"
86 #define AREG2 "g7"
87 #else
88 #define AREG0 "g6"
89 #define AREG1 "g1"
90 #define AREG2 "g2"
91 #endif
92 #endif
93 #elif defined(__s390__)
94 #define AREG0 "r10"
95 #define AREG1 "r7"
96 #define AREG2 "r8"
97 #elif defined(__alpha__)
98 /* Note $15 is the frame pointer, so anything in op-i386.c that would
99 require a frame pointer, like alloca, would probably loose. */
100 #define AREG0 "$15"
101 #define AREG1 "$9"
102 #define AREG2 "$10"
103 #elif defined(__mc68000)
104 #define AREG0 "%a5"
105 #define AREG1 "%a4"
106 #define AREG2 "%d7"
107 #elif defined(__ia64__)
108 #define AREG0 "r7"
109 #define AREG1 "r4"
110 #define AREG2 "r5"
111 #else
112 #error unsupported CPU
113 #endif
115 #define xglue(x, y) x ## y
116 #define glue(x, y) xglue(x, y)
117 #define stringify(s) tostring(s)
118 #define tostring(s) #s
120 /* The return address may point to the start of the next instruction.
121 Subtracting one gets us the call instruction itself. */
122 #if defined(__s390__)
123 # define GETPC() ((void*)(((unsigned long)__builtin_return_address(0) & 0x7fffffffUL) - 1))
124 #elif defined(__arm__)
125 /* Thumb return addresses have the low bit set, so we need to subtract two.
126 This is still safe in ARM mode because instructions are 4 bytes. */
127 # define GETPC() ((void *)((unsigned long)__builtin_return_address(0) - 2))
128 #else
129 # define GETPC() ((void *)((unsigned long)__builtin_return_address(0) - 1))
130 #endif
132 #endif /* !defined(__DYNGEN_EXEC_H__) */